Update to the device framework.

[palacios.git] / palacios / src / palacios / vmm_direct_paging_32.h

diff --git a/palacios/src/palacios/vmm_direct_paging_32.h b/palacios/src/palacios/vmm_direct_paging_32.h
index 42da5b1..2e7fb47 100644 (file)
--- a/palacios/src/palacios/vmm_direct_paging_32.h
+++ b/palacios/src/palacios/vmm_direct_paging_32.h
@@ -18,7 +18,6 @@
  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
  */
 
-
 #ifndef __VMM_DIRECT_PAGING_32_H__
 #define __VMM_DIRECT_PAGING_32_H__
 
@@ -107,4 +106,40 @@ static inline int handle_passthrough_pagefault_32(struct guest_info * info,
 }
 
 
+
+
+static inline int invalidate_addr_32(struct guest_info * info, addr_t inv_addr) {
+    pde32_t * pde = NULL;
+    pte32_t * pte = NULL;
+
+    // TODO:
+    // Call INVLPGA
+
+    // clear the page table entry
+    int pde_index = PDE32_INDEX(inv_addr);
+    int pte_index = PTE32_INDEX(inv_addr);
+
+    
+    // Lookup the correct PDE address based on the PAGING MODE
+    if (info->shdw_pg_mode == SHADOW_PAGING) {
+       pde = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+    } else {
+       pde = CR3_TO_PDE32_VA(info->direct_map_pt);
+    }    
+
+    if (pde[pde_index].present == 0) {
+       return 0;
+    } else if (pde[pde_index].large_page) {
+       pde[pde_index].present = 0;
+       return 0;
+    }
+
+    pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
+
+    pte[pte_index].present = 0;
+
+    return 0;
+}
+
+
 #endif