#include <palacios/vmcs.h>
#include <palacios/vmx_lowlevel.h>
#include <palacios/vmm.h>
+#include <palacios/vmx.h>
+#include <palacios/vm_guest_mem.h>
+#include <palacios/vmm_ctrl_regs.h>
+#include <palacios/vmm_lowlevel.h>
+
+
+
+
+
+static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
+ int ret = 0;
+ ret = vmcs_write(field, val);
+
+ if (ret != VMX_SUCCESS) {
+ PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
+ return 1;
+ }
+
+ return 0;
+}
+
+static int inline check_vmcs_read(vmcs_field_t field, void * val) {
+ int ret = 0;
+ ret = vmcs_read(field, val);
+
+ if (ret != VMX_SUCCESS) {
+ PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
+ }
+
+ return ret;
+}
+
+
+
+
+
+
+
+typedef enum { ES = 0,
+ CS = 2,
+ SS = 4,
+ DS = 6,
+ FS = 8,
+ GS = 10,
+ LDTR = 12,
+ TR = 14,
+ GDTR = 16,
+ IDTR = 18} vmcs_seg_offsets_t;
+
+typedef enum {BASE = VMCS_GUEST_ES_BASE,
+ LIMIT = VMCS_GUEST_ES_LIMIT,
+ ACCESS = VMCS_GUEST_ES_ACCESS,
+ SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t;
+
+
+
+static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
+ vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
+ vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
+ vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
+ vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
+ struct vmcs_segment vmcs_seg;
+
+ memset(&vmcs_seg, 0, sizeof(struct vmcs_segment));
+
+ check_vmcs_read(limit, &(vmcs_seg.limit));
+ check_vmcs_read(base, &(vmcs_seg.base));
+
+ if ((seg_type != GDTR) && (seg_type != IDTR)) {
+ check_vmcs_read(selector, &(vmcs_seg.selector));
+ check_vmcs_read(access, &(vmcs_seg.access.val));
+ }
+
+ v3_vmxseg_to_seg(&vmcs_seg, seg);
+
+ return 0;
+}
+
+static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
+ vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
+ vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
+ vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
+ vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
+ struct vmcs_segment vmcs_seg;
+
+ v3_seg_to_vmxseg(seg, &vmcs_seg);
+
+ check_vmcs_write(limit, vmcs_seg.limit);
+ check_vmcs_write(base, vmcs_seg.base);
+
+ if ((seg_type != GDTR) && (seg_type != IDTR)) {
+ check_vmcs_write(access, vmcs_seg.access.val);
+ check_vmcs_write(selector, vmcs_seg.selector);
+ }
+
+ return 0;
+}
+
+int v3_read_vmcs_segments(struct v3_segments * segs) {
+ v3_read_vmcs_segment(&(segs->cs), CS);
+ v3_read_vmcs_segment(&(segs->ds), DS);
+ v3_read_vmcs_segment(&(segs->es), ES);
+ v3_read_vmcs_segment(&(segs->fs), FS);
+ v3_read_vmcs_segment(&(segs->gs), GS);
+ v3_read_vmcs_segment(&(segs->ss), SS);
+ v3_read_vmcs_segment(&(segs->ldtr), LDTR);
+ v3_read_vmcs_segment(&(segs->gdtr), GDTR);
+ v3_read_vmcs_segment(&(segs->idtr), IDTR);
+ v3_read_vmcs_segment(&(segs->tr), TR);
+
+ return 0;
+}
+
+int v3_write_vmcs_segments(struct v3_segments * segs) {
+ v3_write_vmcs_segment(&(segs->cs), CS);
+ v3_write_vmcs_segment(&(segs->ds), DS);
+ v3_write_vmcs_segment(&(segs->es), ES);
+ v3_write_vmcs_segment(&(segs->fs), FS);
+ v3_write_vmcs_segment(&(segs->gs), GS);
+ v3_write_vmcs_segment(&(segs->ss), SS);
+ v3_write_vmcs_segment(&(segs->ldtr), LDTR);
+ v3_write_vmcs_segment(&(segs->gdtr), GDTR);
+ v3_write_vmcs_segment(&(segs->idtr), IDTR);
+ v3_write_vmcs_segment(&(segs->tr), TR);
+
+ return 0;
+}
+
+
+void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) {
+ memset(seg, 0, sizeof(struct v3_segment));
+
+ seg->selector = vmcs_seg->selector;
+ seg->limit = vmcs_seg->limit;
+ seg->base = vmcs_seg->base;
+
+ seg->type = vmcs_seg->access.type;
+ seg->system = vmcs_seg->access.desc_type;
+ seg->dpl = vmcs_seg->access.dpl;
+ seg->present = vmcs_seg->access.present;
+ seg->avail = vmcs_seg->access.avail;
+ seg->long_mode = vmcs_seg->access.long_mode;
+ seg->db = vmcs_seg->access.db;
+ seg->granularity = vmcs_seg->access.granularity;
+ seg->unusable = vmcs_seg->access.unusable;
+
+}
+
+void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) {
+ memset(vmcs_seg, 0, sizeof(struct vmcs_segment));
+
+ vmcs_seg->selector = seg->selector;
+ vmcs_seg->limit = seg->limit;
+ vmcs_seg->base = seg->base;
+
+ vmcs_seg->access.type = seg->type;
+ vmcs_seg->access.desc_type = seg->system;
+ vmcs_seg->access.dpl = seg->dpl;
+ vmcs_seg->access.present = seg->present;
+ vmcs_seg->access.avail = seg->avail;
+ vmcs_seg->access.long_mode = seg->long_mode;
+ vmcs_seg->access.db = seg->db;
+ vmcs_seg->access.granularity = seg->granularity;
+ vmcs_seg->access.unusable = seg->unusable;
+}
+
+
+
+
+int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
+ int vmx_ret = 0;
+ struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
+
+ vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value);
+ vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value);
+
+ if (arch_data->pri_proc_ctrls.sec_ctrls) {
+ vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value);
+ }
+
+ vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value);
+ vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value);
+
+ return vmx_ret;
+}
+
+
+
+
+
+
+int v3_vmx_save_vmcs(struct guest_info * info) {
+ struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
+ int error = 0;
+
+ check_vmcs_read(VMCS_GUEST_RIP, &(info->rip));
+ check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp));
+
+ check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0));
+ check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0));
+ check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3));
+ check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4));
+ check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4));
+ check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7));
+
+ check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags));
+ if (((struct vmx_data *)info->vmm_data)->ia32e_avail) {
+#ifdef __V3_64BIT__
+ check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer));
+#else
+ uint32_t hi, lo;
+ check_vmcs_read(VMCS_GUEST_EFER, &hi);
+ check_vmcs_read(VMCS_GUEST_EFER_HIGH, &lo);
+ info->ctrl_regs.efer = ((uint64_t) hi << 32) | lo;
+#endif
+ }
+
+ error = v3_read_vmcs_segments(&(info->segments));
+
+ return error;
+}
+
+
+int v3_vmx_restore_vmcs(struct guest_info * info) {
+ struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
+ int error = 0;
+
+ check_vmcs_write(VMCS_GUEST_RIP, info->rip);
+ check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
+
+ check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
+ check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
+ check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
+ check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
+ check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4);
+ check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7);
+
+ check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
+
+ if (((struct vmx_data *)info->vmm_data)->ia32e_avail) {
+ check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer);
+ }
+
+ error = v3_write_vmcs_segments(&(info->segments));
+
+ return error;
+
+}
+
+
+
+int v3_update_vmcs_host_state(struct guest_info * info) {
+ int vmx_ret = 0;
+ addr_t tmp;
+ struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
+ struct v3_msr tmp_msr;
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%cr0, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%cr0, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp);
+
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%cr3, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%cr3, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp);
+
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%cr4, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%cr4, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp);
+
+
+
+ vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, arch_data->host_state.gdtr.base);
+ vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, arch_data->host_state.idtr.base);
+ vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, arch_data->host_state.tr.base);
+
+#define FS_BASE_MSR 0xc0000100
+#define GS_BASE_MSR 0xc0000101
+
+ // FS.BASE MSR
+ v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value);
+
+ // GS.BASE MSR
+ v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value);
+
+
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%cs, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%cs, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp);
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%ss, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%ss, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp);
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%ds, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%ds, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp);
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%es, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%es, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp);
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%fs, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%fs, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp);
+
+#ifdef __V3_64BIT__
+ __asm__ __volatile__ ( "movq %%gs, %0; "
+ : "=q"(tmp)
+ :
+ );
+#else
+ __asm__ __volatile__ ( "movl %%gs, %0; "
+ : "=q"(tmp)
+ :
+ );
+#endif
+ vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp);
+
+ vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, arch_data->host_state.tr.selector);
+
+
+#define SYSENTER_CS_MSR 0x00000174
+#define SYSENTER_ESP_MSR 0x00000175
+#define SYSENTER_EIP_MSR 0x00000176
+
+ // SYSENTER CS MSR
+ v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo);
+
+ // SYSENTER_ESP MSR
+ v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value);
+
+ // SYSENTER_EIP MSR
+ v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value);
+
+ return vmx_ret;
+}
+
-// static const char * v3_vmcs_field_to_str(vmcs_field_t field);
-//extern char * exception_names;
-//
-// Ignores "HIGH" addresses - 32 bit only for now
-//
static inline void print_vmcs_field(vmcs_field_t vmcs_index) {
}
+static void print_vmcs_segments() {
+ struct v3_segments segs;
-static void print_guest_state()
-{
- PrintDebug("VMCS_GUEST_STATE\n");
- print_vmcs_field(VMCS_GUEST_RIP);
- print_vmcs_field(VMCS_GUEST_RSP);
- print_vmcs_field(VMCS_GUEST_RFLAGS);
- print_vmcs_field(VMCS_GUEST_CR0);
- print_vmcs_field(VMCS_GUEST_CR3);
- print_vmcs_field(VMCS_GUEST_CR4);
- print_vmcs_field(VMCS_GUEST_DR7);
-
+ v3_read_vmcs_segments(&segs);
+ v3_print_segments(&segs);
- PrintDebug("\n");
PrintDebug(" ==> CS\n");
print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
print_vmcs_field(VMCS_GUEST_IDTR_BASE);
print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
+
+}
+
+
+
+
+static void print_guest_state()
+{
+ PrintDebug("VMCS_GUEST_STATE\n");
+ print_vmcs_field(VMCS_GUEST_RIP);
+ print_vmcs_field(VMCS_GUEST_RSP);
+ print_vmcs_field(VMCS_GUEST_RFLAGS);
+ print_vmcs_field(VMCS_GUEST_CR0);
+ print_vmcs_field(VMCS_GUEST_CR3);
+ print_vmcs_field(VMCS_GUEST_CR4);
+ print_vmcs_field(VMCS_GUEST_DR7);
+
+
+ PrintDebug("\n");
+
+ print_vmcs_segments();
+
PrintDebug("\n");
print_vmcs_field(VMCS_GUEST_DBG_CTL);
print_vmcs_field(VMCS_EXIT_INSTR_LEN);
print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
- print_vmcs_field(VMCS_VMX_INSTR_INFO);
+ print_vmcs_field(VMCS_EXIT_INSTR_INFO);
print_vmcs_field(VMCS_IO_RCX);
print_vmcs_field(VMCS_IO_RSI);
case VMCS_IDT_VECTOR_INFO:
case VMCS_IDT_VECTOR_ERR:
case VMCS_EXIT_INSTR_LEN:
- case VMCS_VMX_INSTR_INFO:
+ case VMCS_EXIT_INSTR_INFO:
case VMCS_GUEST_ES_LIMIT:
case VMCS_GUEST_CS_LIMIT:
case VMCS_GUEST_SS_LIMIT:
case VMCS_GUEST_DBG_CTL_HIGH:
case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
+ case VMCS_GUEST_EFER_HIGH:
return 4;
/* Natural Width Control Fields */
case VMCS_HOST_SYSENTER_EIP:
case VMCS_HOST_RSP:
case VMCS_HOST_RIP:
+ case VMCS_GUEST_EFER:
return sizeof(addr_t);
default:
- PrintError("Invalid VMCS field\n");
+ PrintError("Invalid VMCS field: 0x%x\n", field);
return -1;
}
}
static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO";
static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR";
static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH";
-static const char VMCS_VMX_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
+static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT";
static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT";
static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT";
return VMCS_IDT_VECTOR_ERR_STR;
case VMCS_EXIT_INSTR_LEN:
return VMCS_EXIT_INSTR_LEN_STR;
- case VMCS_VMX_INSTR_INFO:
- return VMCS_VMX_INSTR_INFO_STR;
+ case VMCS_EXIT_INSTR_INFO:
+ return VMCS_EXIT_INSTR_INFO_STR;
case VMCS_GUEST_ES_LIMIT:
return VMCS_GUEST_ES_LIMIT_STR;
case VMCS_GUEST_CS_LIMIT: