#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_lowlevel.h>
#include <palacios/vmm_sprintf.h>
+#include <palacios/vmm_muxer.h>
+#include <palacios/vmm_xed.h>
+#include <palacios/vmm_direct_paging.h>
return -1;
}
- if (guest_va_to_host_va(info, gdt->base, &gdt_addr) == -1) {
+ if (v3_gva_to_hva(info, gdt->base, &gdt_addr) == -1) {
PrintError("Unable to translate GDT address\n");
return -1;
}
}
+static int safe_gva_to_hva(struct guest_info * info, addr_t linear_addr, addr_t * host_addr) {
+ /* select the proper translation based on guest mode */
+ if (info->mem_mode == PHYSICAL_MEM) {
+ if (v3_gpa_to_hva(info, linear_addr, host_addr) == -1) return -1;
+ } else if (info->mem_mode == VIRTUAL_MEM) {
+ if (v3_gva_to_hva(info, linear_addr, host_addr) == -1) return -1;
+ }
+ return 0;
+}
+
+static int v3_print_disassembly(struct guest_info * info) {
+ int passed_rip = 0;
+ addr_t rip, rip_linear, rip_host;
+
+ /* we don't know where the instructions preceding RIP start, so we just take
+ * a guess and hope the instruction stream synced up with our disassembly
+ * some time before RIP; if it has not we correct RIP at that point
+ */
+
+ /* start disassembly 64 bytes before current RIP, continue 32 bytes after */
+ rip = (addr_t) info->rip - 64;
+ while ((int) (rip - info->rip) < 32) {
+ /* always print RIP, even if the instructions before were bad */
+ if (!passed_rip && rip >= info->rip) {
+ if (rip != info->rip) {
+ V3_Print("***** bad disassembly up to this point *****\n");
+ rip = info->rip;
+ }
+ passed_rip = 1;
+ }
+
+ /* look up host virtual address for this instruction */
+ rip_linear = get_addr_linear(info, rip, &(info->segments.cs));
+ if (safe_gva_to_hva(info, rip_linear, &rip_host) < 0) {
+ rip++;
+ continue;
+ }
+
+ /* print disassembled instrcution (updates rip) */
+ if (v3_disasm(info, (void *) rip_host, &rip, rip == info->rip) < 0) {
+ rip++;
+ continue;
+ }
+ }
+
+ return 0;
+}
+
+
void v3_print_guest_state(struct guest_info * info) {
addr_t linear_addr = 0;
}
v3_print_GPRs(info);
+ v3_print_mem_map(info->vm_info);
+
v3_print_stack(info);
+
+ v3_print_disassembly(info);
}
V3_Print("Stack at %p:\n", (void *)linear_addr);
if (info->mem_mode == PHYSICAL_MEM) {
- if (guest_pa_to_host_va(info, linear_addr, &host_addr) == -1) {
+ if (v3_gpa_to_hva(info, linear_addr, &host_addr) == -1) {
PrintError("Could not translate Stack address\n");
return;
}
} else if (info->mem_mode == VIRTUAL_MEM) {
- if (guest_va_to_host_va(info, linear_addr, &host_addr) == -1) {
+ if (v3_gva_to_hva(info, linear_addr, &host_addr) == -1) {
PrintError("Could not translate Virtual Stack address\n");
return;
}
v3_reg_t * reg_ptr;
char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", NULL};
- reg_ptr= (v3_reg_t *)regs;
+ reg_ptr = (v3_reg_t *)regs;
V3_Print("32 bit GPRs:\n");
#include <palacios/vmcs.h>
#include <palacios/vmcb.h>
static int info_hcall(struct guest_info * core, uint_t hcall_id, void * priv_data) {
- v3_cpu_arch_t cpu_type = v3_get_cpu_type(v3_get_cpu_id());
-
+ v3_cpu_arch_t cpu_type = v3_get_cpu_type(V3_Get_CPU());
+ int cpu_valid = 0;
+
+ V3_Print("************** Guest State ************\n");
v3_print_guest_state(core);
-
// init SVM/VMX
#ifdef CONFIG_SVM
if ((cpu_type == V3_SVM_CPU) || (cpu_type == V3_SVM_REV3_CPU)) {
+ cpu_valid = 1;
PrintDebugVMCB((vmcb_t *)(core->vmm_data));
}
#endif
#ifdef CONFIG_VMX
- else if ((cpu_type == V3_VMX_CPU) || (cpu_type == V3_VMX_EPT_CPU)) {
+ if ((cpu_type == V3_VMX_CPU) || (cpu_type == V3_VMX_EPT_CPU)) {
+ cpu_valid = 1;
v3_print_vmcs();
}
#endif
- else {
- PrintError("Invalid CPU Type\n");
+ if (!cpu_valid) {
+ PrintError("Invalid CPU Type 0x%x\n", cpu_type);
return -1;
}
int v3_init_vm(struct v3_vm_info * vm) {
- v3_cpu_arch_t cpu_type = v3_get_cpu_type(v3_get_cpu_id());
+ v3_cpu_arch_t cpu_type = v3_get_cpu_type(V3_Get_CPU());
+
+ if (v3_get_foreground_vm() == NULL) {
+ v3_set_foreground_vm(vm);
+ }
#ifdef CONFIG_TELEMETRY
v3_init_telemetry(vm);
return -1;
}
+ v3_init_mem_hooks(vm);
if (v3_init_shdw_impl(vm) == -1) {
PrintError("VM initialization error in shadow implementaion\n");
}
+ v3_init_time_vm(vm);
+
#ifdef CONFIG_SYMBIOTIC
v3_init_symbiotic_vm(vm);
// init SVM/VMX
+ switch (cpu_type) {
#ifdef CONFIG_SVM
- if ((cpu_type == V3_SVM_CPU) || (cpu_type == V3_SVM_REV3_CPU)) {
- v3_init_svm_io_map(vm);
- v3_init_svm_msr_map(vm);
- }
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ v3_init_svm_io_map(vm);
+ v3_init_svm_msr_map(vm);
+ break;
#endif
#ifdef CONFIG_VMX
- else if ((cpu_type == V3_VMX_CPU) || (cpu_type == V3_VMX_EPT_CPU)) {
- v3_init_vmx_io_map(vm);
- v3_init_vmx_msr_map(vm);
- }
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ v3_init_vmx_io_map(vm);
+ v3_init_vmx_msr_map(vm);
+ break;
#endif
- else {
- PrintError("Invalid CPU Type\n");
- return -1;
+ default:
+ PrintError("Invalid CPU Type 0x%x\n", cpu_type);
+ return -1;
}
+ v3_register_hypercall(vm, GUEST_INFO_HCALL, info_hcall, NULL);
+ V3_Print("GUEST_INFO_HCALL=%x\n", GUEST_INFO_HCALL);
- v3_register_hypercall(vm, GUEST_INFO_HCALL, info_hcall, NULL);
+ return 0;
+}
- V3_Print("GUEST_INFO_HCALL=%x\n", GUEST_INFO_HCALL);
+int v3_free_vm_internal(struct v3_vm_info * vm) {
+ v3_cpu_arch_t cpu_type = v3_get_cpu_type(V3_Get_CPU());
+
+ v3_remove_hypercall(vm, GUEST_INFO_HCALL);
+
+
+ // init SVM/VMX
+ switch (cpu_type) {
+#ifdef CONFIG_SVM
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ v3_deinit_svm_io_map(vm);
+ v3_deinit_svm_msr_map(vm);
+ break;
+#endif
+#ifdef CONFIG_VMX
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ v3_deinit_vmx_io_map(vm);
+ v3_deinit_vmx_msr_map(vm);
+ break;
+#endif
+ default:
+ PrintError("Invalid CPU Type 0x%x\n", cpu_type);
+ return -1;
+ }
+
+ v3_deinit_dev_mgr(vm);
+
+ v3_deinit_time_vm(vm);
+
+ v3_deinit_shdw_impl(vm);
+ v3_deinit_mem_hooks(vm);
+ v3_delete_mem_map(vm);
+
+ v3_deinit_intr_routers(vm);
+ v3_deinit_host_events(vm);
+
+ v3_deinit_cpuid_map(vm);
+ v3_deinit_msr_map(vm);
+ v3_deinit_io_map(vm);
+ v3_deinit_hypercall_map(vm);
+
+#ifdef CONFIG_TELEMETRY
+ //v3_deinit_telemetry(vm);
+#endif
return 0;
}
+
int v3_init_core(struct guest_info * core) {
- v3_cpu_arch_t cpu_type = v3_get_cpu_type(v3_get_cpu_id());
+ v3_cpu_arch_t cpu_type = v3_get_cpu_type(V3_Get_CPU());
struct v3_vm_info * vm = core->vm_info;
/*
v3_init_shdw_pg_state(core);
}
- v3_init_time(core);
+ v3_init_time_core(core);
v3_init_intr_controllers(core);
v3_init_exception_state(core);
#endif
// init SVM/VMX
+
+
+ switch (cpu_type) {
#ifdef CONFIG_SVM
- if ((cpu_type == V3_SVM_CPU) || (cpu_type == V3_SVM_REV3_CPU)) {
- if (v3_init_svm_vmcb(core, vm->vm_class) == -1) {
- PrintError("Error in SVM initialization\n");
- return -1;
- }
- }
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ if (v3_init_svm_vmcb(core, vm->vm_class) == -1) {
+ PrintError("Error in SVM initialization\n");
+ return -1;
+ }
+ break;
#endif
#ifdef CONFIG_VMX
- else if ((cpu_type == V3_VMX_CPU) || (cpu_type == V3_VMX_EPT_CPU)) {
- if (v3_init_vmx_vmcs(core, vm->vm_class) == -1) {
- PrintError("Error in VMX initialization\n");
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ if (v3_init_vmx_vmcs(core, vm->vm_class) == -1) {
+ PrintError("Error in VMX initialization\n");
+ return -1;
+ }
+ break;
+#endif
+ default:
+ PrintError("Invalid CPU Type 0x%x\n", cpu_type);
return -1;
- }
}
+
+ return 0;
+}
+
+
+
+int v3_free_core(struct guest_info * core) {
+ v3_cpu_arch_t cpu_type = v3_get_cpu_type(V3_Get_CPU());
+
+
+#ifdef CONFIG_SYMBIOTIC
+ //v3_deinit_symbiotic_core(core);
#endif
- else {
- PrintError("Invalid CPU Type\n");
- return -1;
+
+ v3_deinit_decoder(core);
+
+ v3_deinit_intr_controllers(core);
+ v3_deinit_time_core(core);
+
+ if (core->shdw_pg_mode == SHADOW_PAGING) {
+ v3_deinit_shdw_pg_state(core);
+ }
+
+ v3_free_passthrough_pts(core);
+
+ switch (cpu_type) {
+#ifdef CONFIG_SVM
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ if (v3_deinit_svm_vmcb(core) == -1) {
+ PrintError("Error in SVM initialization\n");
+ return -1;
+ }
+ break;
+#endif
+#ifdef CONFIG_VMX
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ if (v3_deinit_vmx_vmcs(core) == -1) {
+ PrintError("Error in VMX initialization\n");
+ return -1;
+ }
+ break;
+#endif
+ default:
+ PrintError("Invalid CPU Type 0x%x\n", cpu_type);
+ return -1;
}
return 0;
}
+
+
+
