#; -*- fundamental -*-
-
.text
.align 4
#define clgi .byte 0x0F,0x01,0xDD
+#define SVM_VM_HSAVE_PA_MSR .dword 0xc0010117
+
+
#ifdef __V3_32BIT__
+// Note that RAX is saved in the VMCB, so we don't touch it here
+
#define Save_SVM_Registers(location) \
pushl %eax; \
movl location, %eax; \
movl %ebx, 32(%eax); \
movl %edx, 40(%eax); \
movl %ecx, 48(%eax); \
- pushl %ebx; \
- movl 8(%esp), %ebx; \
- movl %ebx, 56(%eax); \
- popl %ebx; \
popl %eax;
popl %eax;
+// 32 bit GCC passes arguments via stack
+
v3_svm_launch:
push %ebp;
movl %esp, %ebp;
pushf;
- push %fs;
- push %gs;
pusha;
+ movl 16(%ebp), %eax;
+ vmsave;
+
pushl 12(%ebp);
pushl 8(%ebp);
addl $4, %esp;
+
+ movl 16(%ebp), %eax;
+ vmload;
+
popa;
- pop %gs;
- pop %fs;
popf;
pop %ebp;
ret
#elif __V3_64BIT__
+// Note that RAX is saved in the VMCB, so we don't touch it here
+
#define Save_SVM_Registers(location) \
pushq %rax; \
movq location, %rax; \
movq %rbx, 32(%rax); \
movq %rdx, 40(%rax); \
movq %rcx, 48(%rax); \
- pushq %rbx; \
- movq 16(%rsp), %rbx; \
- movq %rbx, 56(%rax); \
- popq %rbx; \
\
movq %r8, 64(%rax); \
movq %r9, 72(%rax); \
popq %rbx; \
popq %rbp;
+
+// Note that this is only for 64 bit GCC, 32 bit GCC passes via stack
// VMCB => RDI
// vm_regs => RSI
-// ptr to fs => RDX
-// ptr to gs => RCX
+// HOST VMCB => RDX
v3_svm_launch:
pushf;
- push %fs;
- push %gs;
PUSHA
-
-
-
-// pushq %rdx // fs
-// pushq %rcx // gs
-
-
-// pushq (%rdx)
-// pop %fs
-// pushq (%rcx)
-// pop %gs
-
-
+
+ pushq %rdx;
+ movq %rdx, %rax;
+ vmsave;
pushq %rsi
addq $8, %rsp
-// popq %rcx
-// popq %rdx
-
-// push %fs
-// popq %rax
-// movq %rax, (%rdx)
-
-// push %gs
-// popq %rax
-// movq %rax, (%rcx)
+ popq %rax;
+ vmload;
POPA
- pop %gs;
- pop %fs;
popf;
ret