Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


enabled stopping a VM before the secondary cores have been initialized
[palacios.git] / palacios / src / palacios / svm.c
index ee7ff6d..f61fadf 100644 (file)
@@ -1,3 +1,23 @@
+/* 
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National 
+ * Science Foundation and the Department of Energy.  
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico.  You can find out more at 
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software.  You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+
 #include <palacios/svm.h>
 #include <palacios/vmm.h>
 
 #include <palacios/vmm_debug.h>
 #include <palacios/vm_guest_mem.h>
 
+#include <palacios/vmm_decoder.h>
+#include <palacios/vmm_string.h>
+#include <palacios/vmm_lowlevel.h>
+#include <palacios/svm_msr.h>
 
+#include <palacios/vmm_rbtree.h>
+#include <palacios/vmm_barrier.h>
 
-extern struct vmm_os_hooks * os_hooks;
+#ifdef V3_CONFIG_CHECKPOINT
+#include <palacios/vmm_checkpoint.h>
+#endif
 
-extern uint_t cpuid_ecx(uint_t op);
-extern uint_t cpuid_edx(uint_t op);
-extern void Get_MSR(uint_t MSR, uint_t * high_byte, uint_t * low_byte); 
-extern void Set_MSR(uint_t MSR, uint_t high_byte, uint_t low_byte);
-extern uint_t launch_svm(vmcb_t * vmcb_addr);
-extern void safe_svm_launch(vmcb_t * vmcb_addr, struct guest_gprs * gprs);
+#include <palacios/vmm_direct_paging.h>
 
-extern void STGI();
-extern void CLGI();
+#include <palacios/vmm_ctrl_regs.h>
+#include <palacios/svm_io.h>
 
-extern uint_t Get_CR3();
+#include <palacios/vmm_sprintf.h>
 
 
-extern void DisableInts();
+#ifndef V3_CONFIG_DEBUG_SVM
+#undef PrintDebug
+#define PrintDebug(fmt, args...)
+#endif
 
-/* Checks machine SVM capability */
-/* Implemented from: AMD Arch Manual 3, sect 15.4 */ 
-int is_svm_capable() {
-  uint_t ret =  cpuid_ecx(CPUID_FEATURE_IDS);
-  uint_t vm_cr_low = 0, vm_cr_high = 0;
 
+uint32_t v3_last_exit;
 
-  if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
-    PrintDebug("SVM Not Available\n");
-    return 0;
-  } 
+// This is a global pointer to the host's VMCB
+static addr_t host_vmcbs[V3_CONFIG_MAX_CPUS] = { [0 ... V3_CONFIG_MAX_CPUS - 1] = 0};
 
-  Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
 
-  if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
-    PrintDebug("Nested Paging not supported\n");
-  }
 
-  if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
-    return 1;
-  }
+extern void v3_stgi();
+extern void v3_clgi();
+//extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
+extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
 
-  ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
 
-  if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
-    PrintDebug("SVM BIOS Disabled, not unlockable\n");
-  } else {
-    PrintDebug("SVM is locked with a key\n");
-  }
+static vmcb_t * Allocate_VMCB() {
+    vmcb_t * vmcb_page = NULL;
+    addr_t vmcb_pa = (addr_t)V3_AllocPages(1);
+
+    if ((void *)vmcb_pa == NULL) {
+       PrintError("Error allocating VMCB\n");
+       return NULL;
+    }
+
+    vmcb_page = (vmcb_t *)V3_VAddr((void *)vmcb_pa);
 
-  return 0;
+    memset(vmcb_page, 0, 4096);
+
+    return vmcb_page;
 }
 
 
+static int v3_svm_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data)
+{
+    int status;
 
-void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
-  reg_ex_t msr;
-  void * host_state;
+    // Call arch-independent handler
+    if ((status = v3_handle_efer_write(core, msr, src, priv_data)) != 0) {
+       return status;
+    }
 
+    // SVM-specific code
+    {
+       // Ensure that hardware visible EFER.SVME bit is set (SVM Enable)
+       struct efer_64 * hw_efer = (struct efer_64 *)&(core->ctrl_regs.efer);
+       hw_efer->svme = 1;
+    }
 
-  // Enable SVM on the CPU
-  Get_MSR(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
-  msr.e_reg.low |= EFER_MSR_svm_enable;
-  Set_MSR(EFER_MSR, 0, msr.e_reg.low);
-  
-  PrintDebug("SVM Enabled\n");
+    return 0;
+}
 
 
-  // Setup the host state save area
-  host_state = os_hooks->allocate_pages(4);
+static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) {
+    vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
+    vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
+    uint_t i;
+
+
+    //
+    ctrl_area->svm_instrs.VMRUN = 1;
+    ctrl_area->svm_instrs.VMMCALL = 1;
+    ctrl_area->svm_instrs.VMLOAD = 1;
+    ctrl_area->svm_instrs.VMSAVE = 1;
+    ctrl_area->svm_instrs.STGI = 1;
+    ctrl_area->svm_instrs.CLGI = 1;
+    ctrl_area->svm_instrs.SKINIT = 1;
+    ctrl_area->svm_instrs.ICEBP = 1;
+    ctrl_area->svm_instrs.WBINVD = 1;
+    ctrl_area->svm_instrs.MONITOR = 1;
+    ctrl_area->svm_instrs.MWAIT_always = 1;
+    ctrl_area->svm_instrs.MWAIT_if_armed = 1;
+    ctrl_area->instrs.INVLPGA = 1;
+    ctrl_area->instrs.CPUID = 1;
+
+    ctrl_area->instrs.HLT = 1;
+
+#ifdef V3_CONFIG_TIME_VIRTUALIZE_TSC
+    ctrl_area->instrs.RDTSC = 1;
+    ctrl_area->svm_instrs.RDTSCP = 1;
+#endif
+
+    // guest_state->cr0 = 0x00000001;    // PE 
   
-  msr.e_reg.high = 0;
-  msr.e_reg.low = (uint_t)host_state;
+    /*
+      ctrl_area->exceptions.de = 1;
+      ctrl_area->exceptions.df = 1;
+      
+      ctrl_area->exceptions.ts = 1;
+      ctrl_area->exceptions.ss = 1;
+      ctrl_area->exceptions.ac = 1;
+      ctrl_area->exceptions.mc = 1;
+      ctrl_area->exceptions.gp = 1;
+      ctrl_area->exceptions.ud = 1;
+      ctrl_area->exceptions.np = 1;
+      ctrl_area->exceptions.of = 1;
+      
+      ctrl_area->exceptions.nmi = 1;
+    */
+    
 
+    ctrl_area->instrs.NMI = 1;
+    ctrl_area->instrs.SMI = 0; // allow SMIs to run in guest
+    ctrl_area->instrs.INIT = 1;
+    ctrl_area->instrs.PAUSE = 1;
+    ctrl_area->instrs.shutdown_evts = 1;
 
-  PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
-  Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
 
+    /* DEBUG FOR RETURN CODE */
+    ctrl_area->exit_code = 1;
 
 
-  // Setup the SVM specific vmm operations
-  vmm_ops->init_guest = &init_svm_guest;
-  vmm_ops->start_guest = &start_svm_guest;
+    /* Setup Guest Machine state */
 
+    core->vm_regs.rsp = 0x00;
+    core->rip = 0xfff0;
 
-  return;
-}
+    core->vm_regs.rdx = 0x00000f00;
 
 
-int init_svm_guest(struct guest_info *info) {
-  PrintDebug("Allocating VMCB\n");
-  info->vmm_data = (void*)Allocate_VMCB();
+    core->cpl = 0;
 
+    core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1
+    core->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode
+    core->ctrl_regs.efer |= EFER_MSR_svm_enable;
 
-  //PrintDebug("Generating Guest nested page tables\n");
-  //  info->page_tables = NULL;
-  //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
-  //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
-  //  PrintDebugPageTables(info->page_tables);
 
 
-  PrintDebug("Initializing VMCB (addr=%x)\n", info->vmm_data);
-  Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), *info);
-  
 
-  //  info->rip = 0;
 
-  info->vm_regs.rdi = 0;
-  info->vm_regs.rsi = 0;
-  info->vm_regs.rbp = 0;
-  info->vm_regs.rsp = 0;
-  info->vm_regs.rbx = 0;
-  info->vm_regs.rdx = 0;
-  info->vm_regs.rcx = 0;
-  info->vm_regs.rax = 0;
-  
-  return 0;
-}
+    core->segments.cs.selector = 0xf000;
+    core->segments.cs.limit = 0xffff;
+    core->segments.cs.base = 0x0000000f0000LL;
+
+    // (raw attributes = 0xf3)
+    core->segments.cs.type = 0x3;
+    core->segments.cs.system = 0x1;
+    core->segments.cs.dpl = 0x3;
+    core->segments.cs.present = 1;
+
+
+
+    struct v3_segment * segregs [] = {&(core->segments.ss), &(core->segments.ds), 
+                                     &(core->segments.es), &(core->segments.fs), 
+                                     &(core->segments.gs), NULL};
+
+    for ( i = 0; segregs[i] != NULL; i++) {
+       struct v3_segment * seg = segregs[i];
+       
+       seg->selector = 0x0000;
+       //    seg->base = seg->selector << 4;
+       seg->base = 0x00000000;
+       seg->limit = ~0u;
+
+       // (raw attributes = 0xf3)
+       seg->type = 0x3;
+       seg->system = 0x1;
+       seg->dpl = 0x3;
+       seg->present = 1;
+    }
 
+    core->segments.gdtr.limit = 0x0000ffff;
+    core->segments.gdtr.base = 0x0000000000000000LL;
+    core->segments.idtr.limit = 0x0000ffff;
+    core->segments.idtr.base = 0x0000000000000000LL;
 
-// can we start a kernel thread here...
-int start_svm_guest(struct guest_info *info) {
+    core->segments.ldtr.selector = 0x0000;
+    core->segments.ldtr.limit = 0x0000ffff;
+    core->segments.ldtr.base = 0x0000000000000000LL;
+    core->segments.tr.selector = 0x0000;
+    core->segments.tr.limit = 0x0000ffff;
+    core->segments.tr.base = 0x0000000000000000LL;
 
 
+    core->dbg_regs.dr6 = 0x00000000ffff0ff0LL;
+    core->dbg_regs.dr7 = 0x0000000000000400LL;
 
-  PrintDebug("Launching SVM VM (vmcb=%x)\n", info->vmm_data);
-  //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
 
-  while (1) {
+    ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->io_map.arch_data);
+    ctrl_area->instrs.IOIO_PROT = 1;
+           
+    ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->msr_map.arch_data);
+    ctrl_area->instrs.MSR_PROT = 1;   
+
+
+    PrintDebug("Exiting on interrupts\n");
+    ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
+    ctrl_area->instrs.INTR = 1;
+
+
+    v3_hook_msr(core->vm_info, EFER_MSR, 
+               &v3_handle_efer_read,
+               &v3_svm_handle_efer_write, 
+               core);
+
+    if (core->shdw_pg_mode == SHADOW_PAGING) {
+       PrintDebug("Creating initial shadow page table\n");
+       
+       /* JRL: This is a performance killer, and a simplistic solution */
+       /* We need to fix this */
+       ctrl_area->TLB_CONTROL = 1;
+       ctrl_area->guest_ASID = 1;
+       
+       
+       if (v3_init_passthrough_pts(core) == -1) {
+           PrintError("Could not initialize passthrough page tables\n");
+           return ;
+       }
+
+
+       core->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
+       PrintDebug("Created\n");
+       
+       core->ctrl_regs.cr0 |= 0x80000000;
+       core->ctrl_regs.cr3 = core->direct_map_pt;
 
-    CLGI();
+       ctrl_area->cr_reads.cr0 = 1;
+       ctrl_area->cr_writes.cr0 = 1;
+       //ctrl_area->cr_reads.cr4 = 1;
+       ctrl_area->cr_writes.cr4 = 1;
+       ctrl_area->cr_reads.cr3 = 1;
+       ctrl_area->cr_writes.cr3 = 1;
 
-    //PrintDebug("SVM Launch Args (vmcb=%x), (info=%x), (vm_regs=%x)\n", info->vmm_data,  &(info->vm_regs));
-    //PrintDebug("Launching to RIP: %x\n", info->rip);
-    safe_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
-    //launch_svm((vmcb_t*)(info->vmm_data));
-    //PrintDebug("SVM Returned\n");
 
+
+       ctrl_area->instrs.INVLPG = 1;
+
+       ctrl_area->exceptions.pf = 1;
+
+       guest_state->g_pat = 0x7040600070406ULL;
+
+
+
+    } else if (core->shdw_pg_mode == NESTED_PAGING) {
+       // Flush the TLB on entries/exits
+       ctrl_area->TLB_CONTROL = 1;
+       ctrl_area->guest_ASID = 1;
+
+       // Enable Nested Paging
+       ctrl_area->NP_ENABLE = 1;
+
+       PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
+
+       // Set the Nested Page Table pointer
+       if (v3_init_passthrough_pts(core) == -1) {
+           PrintError("Could not initialize Nested page tables\n");
+           return ;
+       }
+
+       ctrl_area->N_CR3 = core->direct_map_pt;
+
+       guest_state->g_pat = 0x7040600070406ULL;
+    }
     
+    /* tell the guest that we don't support SVM */
+    v3_hook_msr(core->vm_info, SVM_VM_CR_MSR, 
+       &v3_handle_vm_cr_read,
+       &v3_handle_vm_cr_write, 
+       core);
+
+
+    {
+       v3_hook_msr(core->vm_info, IA32_STAR_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_LSTAR_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_FMASK_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_KERN_GS_BASE_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_CSTAR_MSR, NULL, NULL, NULL);
+
+       v3_hook_msr(core->vm_info, SYSENTER_CS_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, SYSENTER_ESP_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, SYSENTER_EIP_MSR, NULL, NULL, NULL);
+    }
+}
+
 
-    STGI();
+int v3_init_svm_vmcb(struct guest_info * core, v3_vm_class_t vm_class) {
 
-     
-    if (handle_svm_exit(info) != 0) {
-      PrintDebug("SVM ERROR!!\n");
-      break;
+    PrintDebug("Allocating VMCB\n");
+    core->vmm_data = (void *)Allocate_VMCB();
+    
+    if (core->vmm_data == NULL) {
+       PrintError("Could not allocate VMCB, Exiting...\n");
+       return -1;
     }
-  }
-  return 0;
+
+    if (vm_class == V3_PC_VM) {
+       PrintDebug("Initializing VMCB (addr=%p)\n", (void *)core->vmm_data);
+       Init_VMCB_BIOS((vmcb_t*)(core->vmm_data), core);
+    } else {
+       PrintError("Invalid VM class\n");
+       return -1;
+    }
+
+    return 0;
 }
 
 
+int v3_deinit_svm_vmcb(struct guest_info * core) {
+    V3_FreePages(V3_PAddr(core->vmm_data), 1);
+    return 0;
+}
 
-vmcb_t * Allocate_VMCB() {
-  vmcb_t * vmcb_page = (vmcb_t*)os_hooks->allocate_pages(1);
 
+#ifdef V3_CONFIG_CHECKPOINT
+int v3_svm_save_core(struct guest_info * core, void * ctx){
 
-  memset(vmcb_page, 0, 4096);
+    v3_chkpt_save_8(ctx, "cpl", &(core->cpl));
+    v3_chkpt_save(ctx, "vmcb_data", PAGE_SIZE, core->vmm_data);
 
-  return vmcb_page;
+    return 0;
 }
 
+int v3_svm_load_core(struct guest_info * core, void * ctx){
+    
+    v3_chkpt_load_8(ctx, "cpl", &(core->cpl));
 
+    if (v3_chkpt_load(ctx, "vmcb_data", PAGE_SIZE, core->vmm_data) == -1) {
+       return -1;
+    }
 
-void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
-  vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
-  vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
-  uint_t i;
+    return 0;
+}
+#endif
 
+static int update_irq_exit_state(struct guest_info * info) {
+    vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 
-  guest_state->rsp = vm_info.vm_regs.rsp;
-  guest_state->rip = vm_info.rip;
+    // Fix for QEMU bug using EVENTINJ as an internal cache
+    guest_ctrl->EVENTINJ.valid = 0;
 
+    if ((info->intr_core_state.irq_pending == 1) && (guest_ctrl->guest_ctrl.V_IRQ == 0)) {
+       
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+       PrintDebug("INTAK cycle completed for irq %d\n", info->intr_core_state.irq_vector);
+#endif
 
-  //ctrl_area->instrs.instrs.CR0 = 1;
-  ctrl_area->cr_reads.cr0 = 1;
-  ctrl_area->cr_writes.cr0 = 1;
+       info->intr_core_state.irq_started = 1;
+       info->intr_core_state.irq_pending = 0;
 
-  guest_state->efer |= EFER_MSR_svm_enable;
-  guest_state->rflags = 0x00000002; // The reserved bit is always 1
-  ctrl_area->svm_instrs.VMRUN = 1;
-  // guest_state->cr0 = 0x00000001;    // PE 
-  ctrl_area->guest_ASID = 1;
+       v3_injecting_intr(info, info->intr_core_state.irq_vector, V3_EXTERNAL_IRQ);
+    }
 
+    if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 0)) {
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+       PrintDebug("Interrupt %d taken by guest\n", info->intr_core_state.irq_vector);
+#endif
 
-  ctrl_area->exceptions.de = 1;
-  ctrl_area->exceptions.df = 1;
-  ctrl_area->exceptions.pf = 1;
-  ctrl_area->exceptions.ts = 1;
-  ctrl_area->exceptions.ss = 1;
-  ctrl_area->exceptions.ac = 1;
-  ctrl_area->exceptions.mc = 1;
-  ctrl_area->exceptions.gp = 1;
-  ctrl_area->exceptions.ud = 1;
-  ctrl_area->exceptions.np = 1;
-  ctrl_area->exceptions.of = 1;
-  ctrl_area->exceptions.nmi = 1;
+       // Interrupt was taken fully vectored
+       info->intr_core_state.irq_started = 0;
 
-  guest_state->cs.selector = 0x0000;
-  guest_state->cs.limit=~0u;
-  guest_state->cs.base = guest_state->cs.selector<<4;
-  guest_state->cs.attrib.raw = 0xf3;
+    } else if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 1)) {
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+       PrintDebug("EXIT INT INFO is set (vec=%d)\n", guest_ctrl->exit_int_info.vector);
+#endif
+    }
 
-  
-  struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
-  for ( i = 0; segregs[i] != NULL; i++) {
-    struct vmcb_selector * seg = segregs[i];
-    
-    seg->selector = 0x0000;
-    seg->base = seg->selector << 4;
-    seg->attrib.raw = 0xf3;
-    seg->limit = ~0u;
-  }
-  
-  if (vm_info.io_map.num_ports > 0) {
-    vmm_io_hook_t * iter;
-    addr_t io_port_bitmap;
+    return 0;
+}
+
+
+static int update_irq_entry_state(struct guest_info * info) {
+    vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
+
+
+    if (info->intr_core_state.irq_pending == 0) {
+       guest_ctrl->guest_ctrl.V_IRQ = 0;
+       guest_ctrl->guest_ctrl.V_INTR_VECTOR = 0;
+    }
     
-    io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
-    memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
+    if (v3_excp_pending(info)) {
+       uint_t excp = v3_get_excp_number(info);
+       
+       guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
+       
+       if (info->excp_state.excp_error_code_valid) {
+           guest_ctrl->EVENTINJ.error_code = info->excp_state.excp_error_code;
+           guest_ctrl->EVENTINJ.ev = 1;
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+           PrintDebug("Injecting exception %d with error code %x\n", excp, guest_ctrl->EVENTINJ.error_code);
+#endif
+       }
+       
+       guest_ctrl->EVENTINJ.vector = excp;
+       
+       guest_ctrl->EVENTINJ.valid = 1;
+
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+       PrintDebug("<%d> Injecting Exception %d (CR2=%p) (EIP=%p)\n", 
+                  (int)info->num_exits, 
+                  guest_ctrl->EVENTINJ.vector, 
+                  (void *)(addr_t)info->ctrl_regs.cr2,
+                  (void *)(addr_t)info->rip);
+#endif
+
+       v3_injecting_excp(info, excp);
+    } else if (info->intr_core_state.irq_started == 1) {
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+       PrintDebug("IRQ pending from previous injection\n");
+#endif
+       guest_ctrl->guest_ctrl.V_IRQ = 1;
+       guest_ctrl->guest_ctrl.V_INTR_VECTOR = info->intr_core_state.irq_vector;
+       guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
+       guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
+
+    } else {
+       switch (v3_intr_pending(info)) {
+           case V3_EXTERNAL_IRQ: {
+               uint32_t irq = v3_get_intr(info);
+
+               guest_ctrl->guest_ctrl.V_IRQ = 1;
+               guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
+               guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
+               guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
+
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+               PrintDebug("Injecting Interrupt %d (EIP=%p)\n", 
+                          guest_ctrl->guest_ctrl.V_INTR_VECTOR, 
+                          (void *)(addr_t)info->rip);
+#endif
+
+               info->intr_core_state.irq_pending = 1;
+               info->intr_core_state.irq_vector = irq;
+               
+               break;
+           }
+           case V3_NMI:
+               guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
+               break;
+           case V3_SOFTWARE_INTR:
+               guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
+
+#ifdef V3_CONFIG_DEBUG_INTERRUPTS
+               PrintDebug("Injecting software interrupt --  type: %d, vector: %d\n", 
+                          SVM_INJECTION_SOFT_INTR, info->intr_core_state.swintr_vector);
+#endif
+               guest_ctrl->EVENTINJ.vector = info->intr_core_state.swintr_vector;
+               guest_ctrl->EVENTINJ.valid = 1;
+            
+               /* reset swintr state */
+               info->intr_core_state.swintr_posted = 0;
+               info->intr_core_state.swintr_vector = 0;
+               
+               break;
+           case V3_VIRTUAL_IRQ:
+               guest_ctrl->EVENTINJ.type = SVM_INJECTION_IRQ;
+               break;
+
+           case V3_INVALID_INTR:
+           default:
+               break;
+       }
+       
+    }
+
+    return 0;
+}
+
+
+/* 
+ * CAUTION and DANGER!!! 
+ * 
+ * The VMCB CANNOT(!!) be accessed outside of the clgi/stgi calls inside this function
+ * When exectuing a symbiotic call, the VMCB WILL be overwritten, so any dependencies 
+ * on its contents will cause things to break. The contents at the time of the exit WILL 
+ * change before the exit handler is executed.
+ */
+int v3_svm_enter(struct guest_info * info) {
+    vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
+    vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data)); 
+    addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0;
+    sint64_t tsc_offset;
+
+    // Conditionally yield the CPU if the timeslice has expired
+    v3_yield_cond(info);
+
+    // Perform any additional yielding needed for time adjustment
+    v3_adjust_time(info);
+
+    // disable global interrupts for vm state transition
+    v3_clgi();
+
+    // Update timer devices after being in the VM, with interupts
+    // disabled, but before doing IRQ updates, so that any interrupts they 
+    //raise get seen immediately.
+    v3_update_timers(info);
+
+    // Synchronize the guest state to the VMCB
+    guest_state->cr0 = info->ctrl_regs.cr0;
+    guest_state->cr2 = info->ctrl_regs.cr2;
+    guest_state->cr3 = info->ctrl_regs.cr3;
+    guest_state->cr4 = info->ctrl_regs.cr4;
+    guest_state->dr6 = info->dbg_regs.dr6;
+    guest_state->dr7 = info->dbg_regs.dr7;
+    guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
+    guest_state->rflags = info->ctrl_regs.rflags;
+    guest_state->efer = info->ctrl_regs.efer;
     
-    ctrl_area->IOPM_BASE_PA = io_port_bitmap;
+    guest_state->cpl = info->cpl;
 
-    //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
+    v3_set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
 
-    FOREACH_IO_HOOK(vm_info.io_map, iter) {
-      ushort_t port = iter->port;
-      uchar_t * bitmap = (uchar_t *)io_port_bitmap;
+    guest_state->rax = info->vm_regs.rax;
+    guest_state->rip = info->rip;
+    guest_state->rsp = info->vm_regs.rsp;
 
-      bitmap += (port / 8);
-      PrintDebug("Setting Bit in block %x\n", bitmap);
-      *bitmap |= 1 << (port % 8);
+#ifdef V3_CONFIG_SYMCALL
+    if (info->sym_core_state.symcall_state.sym_call_active == 0) {
+       update_irq_entry_state(info);
     }
+#else 
+    update_irq_entry_state(info);
+#endif
 
 
-    //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
-
-    ctrl_area->instrs.IOIO_PROT = 1;
-  }
+    /* ** */
 
-  ctrl_area->instrs.INTR = 1;
+    /*
+      PrintDebug("SVM Entry to CS=%p  rip=%p...\n", 
+      (void *)(addr_t)info->segments.cs.base, 
+      (void *)(addr_t)info->rip);
+    */
+
+#ifdef V3_CONFIG_SYMCALL
+    if (info->sym_core_state.symcall_state.sym_call_active == 1) {
+       if (guest_ctrl->guest_ctrl.V_IRQ == 1) {
+           V3_Print("!!! Injecting Interrupt during Sym call !!!\n");
+       }
+    }
+#endif
 
+    v3_time_enter_vm(info);
+    tsc_offset = v3_tsc_host_offset(&info->time_state);
+    guest_ctrl->TSC_OFFSET = tsc_offset;
 
 
-  if (vm_info.page_mode == SHADOW_PAGING) {
-    PrintDebug("Creating initial shadow page table\n");
-    vm_info.shdw_pg_state.shadow_cr3.e_reg.low |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
-    PrintDebug("Created\n");
+    //V3_Print("Calling v3_svm_launch\n");
 
-    guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3.r_reg;
+    v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[V3_Get_CPU()]);
 
-    ctrl_area->cr_reads.cr3 = 1;
-    ctrl_area->cr_writes.cr3 = 1;
+    //V3_Print("SVM Returned: Exit Code: %x, guest_rip=%lx\n", (uint32_t)(guest_ctrl->exit_code), (unsigned long)guest_state->rip);
 
+    v3_last_exit = (uint32_t)(guest_ctrl->exit_code);
 
-    ctrl_area->instrs.INVLPG = 1;
-    ctrl_area->instrs.INVLPGA = 1;
+    // Immediate exit from VM time bookkeeping
+    v3_time_exit_vm(info);
 
-    guest_state->g_pat = 0x7040600070406ULL;
+    info->num_exits++;
 
-    guest_state->cr0 |= 0x80000000;
-  } else if (vm_info.page_mode == NESTED_PAGING) {
-    // Flush the TLB on entries/exits
-    //ctrl_area->TLB_CONTROL = 1;
+    // Save Guest state from VMCB
+    info->rip = guest_state->rip;
+    info->vm_regs.rsp = guest_state->rsp;
+    info->vm_regs.rax = guest_state->rax;
 
-    // Enable Nested Paging
-    //ctrl_area->NP_ENABLE = 1;
+    info->cpl = guest_state->cpl;
 
-    //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
+    info->ctrl_regs.cr0 = guest_state->cr0;
+    info->ctrl_regs.cr2 = guest_state->cr2;
+    info->ctrl_regs.cr3 = guest_state->cr3;
+    info->ctrl_regs.cr4 = guest_state->cr4;
+    info->dbg_regs.dr6 = guest_state->dr6;
+    info->dbg_regs.dr7 = guest_state->dr7;
+    info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
+    info->ctrl_regs.rflags = guest_state->rflags;
+    info->ctrl_regs.efer = guest_state->efer;
+    
+    v3_get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
+    info->cpu_mode = v3_get_vm_cpu_mode(info);
+    info->mem_mode = v3_get_vm_mem_mode(info);
+    /* ** */
 
-        // Set the Nested Page Table pointer
-    //    ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
-    // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
+    // save exit info here
+    exit_code = guest_ctrl->exit_code;
+    exit_info1 = guest_ctrl->exit_info1;
+    exit_info2 = guest_ctrl->exit_info2;
 
-    //   ctrl_area->N_CR3 = Get_CR3();
-    // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
+#ifdef V3_CONFIG_SYMCALL
+    if (info->sym_core_state.symcall_state.sym_call_active == 0) {
+       update_irq_exit_state(info);
+    }
+#else
+    update_irq_exit_state(info);
+#endif
 
-    //    guest_state->g_pat = 0x7040600070406ULL;
-  }
+    // reenable global interrupts after vm exit
+    v3_stgi();
+    // Conditionally yield the CPU if the timeslice has expired
+    v3_yield_cond(info);
 
+    {
+       int ret = v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2);
+       
+       if (ret != 0) {
+           PrintError("Error in SVM exit handler (ret=%d)\n", ret);
+           PrintError("  last Exit was %d (exit code=0x%llx)\n", v3_last_exit, (uint64_t) exit_code);
+           return -1;
+       }
+    }
 
 
+    return 0;
 }
 
 
+int v3_start_svm_guest(struct guest_info * info) {
+    //    vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+    //  vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 
-void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info vm_info) {
-  vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
-  vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
-  uint_t i;
+    PrintDebug("Starting SVM core %u (on logical core %u)\n", info->vcpu_id, info->pcpu_id);
 
+    if (info->vcpu_id == 0) {
+       info->core_run_state = CORE_RUNNING;
+       info->vm_info->run_state = VM_RUNNING;
+    } else  { 
+       PrintDebug("SVM core %u (on %u): Waiting for core initialization\n", info->vcpu_id, info->pcpu_id);
 
-  guest_state->rsp = vm_info.vm_regs.rsp;
-  // guest_state->rip = vm_info.rip;
-  guest_state->rip = 0xfff0;
+       while (info->core_run_state == CORE_STOPPED) {
+           
+           if (info->vm_info->run_state == VM_STOPPED) {
+               // The VM was stopped before this core was initialized. 
+               return 0;
+           }
 
-  //ctrl_area->instrs.instrs.CR0 = 1;
-  ctrl_area->cr_reads.cr0 = 1;
-  ctrl_area->cr_writes.cr0 = 1;
+           v3_yield(info);
+           //PrintDebug("SVM core %u: still waiting for INIT\n", info->vcpu_id);
+       }
 
-  guest_state->efer |= EFER_MSR_svm_enable;
-  guest_state->rflags = 0x00000002; // The reserved bit is always 1
-  ctrl_area->svm_instrs.VMRUN = 1;
-  ctrl_area->instrs.HLT = 1;
-  // guest_state->cr0 = 0x00000001;    // PE 
-  ctrl_area->guest_ASID = 1;
+       PrintDebug("SVM core %u(on %u) initialized\n", info->vcpu_id, info->pcpu_id);
 
-  ctrl_area->exceptions.de = 1;
-  ctrl_area->exceptions.df = 1;
-  ctrl_area->exceptions.pf = 1;
-  ctrl_area->exceptions.ts = 1;
-  ctrl_area->exceptions.ss = 1;
-  ctrl_area->exceptions.ac = 1;
-  ctrl_area->exceptions.mc = 1;
-  ctrl_area->exceptions.gp = 1;
-  ctrl_area->exceptions.ud = 1;
-  ctrl_area->exceptions.np = 1;
-  ctrl_area->exceptions.of = 1;
-  ctrl_area->exceptions.nmi = 1;
+       // We'll be paranoid about race conditions here
+       v3_wait_at_barrier(info);
+    } 
 
-  vm_info.vm_regs.rdx = 0x00000f00;
+    PrintDebug("SVM core %u(on %u): I am starting at CS=0x%x (base=0x%p, limit=0x%x),  RIP=0x%p\n", 
+              info->vcpu_id, info->pcpu_id, 
+              info->segments.cs.selector, (void *)(info->segments.cs.base), 
+              info->segments.cs.limit, (void *)(info->rip));
 
-  guest_state->cr0 = 0x60000010;
 
-  guest_state->cs.selector = 0xf000;
-  guest_state->cs.limit=0xffff;
-  guest_state->cs.base = 0x0000000f0000LL;
-  guest_state->cs.attrib.raw = 0xf3;
 
-  
-  struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
-  for ( i = 0; segregs[i] != NULL; i++) {
-    struct vmcb_selector * seg = segregs[i];
+    PrintDebug("SVM core %u: Launching SVM VM (vmcb=%p) (on cpu %u)\n", 
+              info->vcpu_id, (void *)info->vmm_data, info->pcpu_id);
+    //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
     
-    seg->selector = 0x0000;
-    //    seg->base = seg->selector << 4;
-    seg->base = 0x00000000;
-    seg->attrib.raw = 0xf3;
-    seg->limit = ~0u;
-  }
-  
-  guest_state->gdtr.limit = 0x0000ffff;
-  guest_state->gdtr.base = 0x0000000000000000LL;
-  guest_state->idtr.limit = 0x0000ffff;
-  guest_state->idtr.base = 0x0000000000000000LL;
+    v3_start_time(info);
+
+    while (1) {
+
+       if (info->vm_info->run_state == VM_STOPPED) {
+           info->core_run_state = CORE_STOPPED;
+           break;
+       }
+       
+       if (v3_svm_enter(info) == -1) {
+           vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
+           addr_t host_addr;
+           addr_t linear_addr = 0;
+           
+           info->vm_info->run_state = VM_ERROR;
+           
+           V3_Print("SVM core %u: SVM ERROR!!\n", info->vcpu_id); 
+           
+           v3_print_guest_state(info);
+           
+           V3_Print("SVM core %u: SVM Exit Code: %p\n", info->vcpu_id, (void *)(addr_t)guest_ctrl->exit_code); 
+           
+           V3_Print("SVM core %u: exit_info1 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info1));
+           V3_Print("SVM core %u: exit_info1 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
+           
+           V3_Print("SVM core %u: exit_info2 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info2));
+           V3_Print("SVM core %u: exit_info2 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
+           
+           linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
+           
+           if (info->mem_mode == PHYSICAL_MEM) {
+               v3_gpa_to_hva(info, linear_addr, &host_addr);
+           } else if (info->mem_mode == VIRTUAL_MEM) {
+               v3_gva_to_hva(info, linear_addr, &host_addr);
+           }
+           
+           V3_Print("SVM core %u: Host Address of rip = 0x%p\n", info->vcpu_id, (void *)host_addr);
+           
+           V3_Print("SVM core %u: Instr (15 bytes) at %p:\n", info->vcpu_id, (void *)host_addr);
+           v3_dump_mem((uint8_t *)host_addr, 15);
+           
+           v3_print_stack(info);
+
+           break;
+       }
+
+       v3_wait_at_barrier(info);
+
+
+       if (info->vm_info->run_state == VM_STOPPED) {
+           info->core_run_state = CORE_STOPPED;
+           break;
+       }
 
-  guest_state->ldtr.selector = 0x0000;
-  guest_state->ldtr.limit = 0x0000ffff;
-  guest_state->ldtr.base = 0x0000000000000000LL;
-  guest_state->tr.selector = 0x0000;
-  guest_state->tr.limit = 0x0000ffff;
-  guest_state->tr.base = 0x0000000000000000LL;
+       
 
+/*
+       if ((info->num_exits % 50000) == 0) {
+           V3_Print("SVM Exit number %d\n", (uint32_t)info->num_exits);
+           v3_print_guest_state(info);
+       }
+*/
+       
+    }
 
-  guest_state->dr6 = 0x00000000ffff0ff0LL;
-  guest_state->dr7 = 0x0000000000000400LL;
+    // Need to take down the other cores on error... 
 
-  if (vm_info.io_map.num_ports > 0) {
-    vmm_io_hook_t * iter;
-    addr_t io_port_bitmap;
+    return 0;
+}
+
+
+
+
+int v3_reset_svm_vm_core(struct guest_info * core, addr_t rip) {
+    // init vmcb_bios
+
+    // Write the RIP, CS, and descriptor
+    // assume the rest is already good to go
+    //
+    // vector VV -> rip at 0
+    //              CS = VV00
+    //  This means we start executing at linear address VV000
+    //
+    // So the selector needs to be VV00
+    // and the base needs to be VV000
+    //
+    core->rip = 0;
+    core->segments.cs.selector = rip << 8;
+    core->segments.cs.limit = 0xffff;
+    core->segments.cs.base = rip << 12;
+
+    return 0;
+}
+
+
+
+
+
+
+/* Checks machine SVM capability */
+/* Implemented from: AMD Arch Manual 3, sect 15.4 */ 
+int v3_is_svm_capable() {
+    uint_t vm_cr_low = 0, vm_cr_high = 0;
+    uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+
+    v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+  
+    PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx);
+
+    if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
+      V3_Print("SVM Not Available\n");
+      return 0;
+    }  else {
+       v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
+       
+       PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
+       
+       if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
+           V3_Print("SVM is available but is disabled.\n");
+           
+           v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+           
+           PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
+           
+           if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
+               V3_Print("SVM BIOS Disabled, not unlockable\n");
+           } else {
+               V3_Print("SVM is locked with a key\n");
+           }
+           return 0;
+
+       } else {
+           V3_Print("SVM is available and  enabled.\n");
+
+           v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+           PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax);
+           PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx);
+           PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx);
+           PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
+
+           return 1;
+       }
+    }
+}
+
+static int has_svm_nested_paging() {
+    uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+    
+    v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
     
-    io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
-    memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
+    //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
     
-    ctrl_area->IOPM_BASE_PA = io_port_bitmap;
+    if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
+       V3_Print("SVM Nested Paging not supported\n");
+       return 0;
+    } else {
+       V3_Print("SVM Nested Paging supported\n");
+       return 1;
+    }
+ }
+
 
-    //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
+void v3_init_svm_cpu(int cpu_id) {
+    reg_ex_t msr;
+    extern v3_cpu_arch_t v3_cpu_types[];
 
-    FOREACH_IO_HOOK(vm_info.io_map, iter) {
-      ushort_t port = iter->port;
-      uchar_t * bitmap = (uchar_t *)io_port_bitmap;
+    // Enable SVM on the CPU
+    v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
+    msr.e_reg.low |= EFER_MSR_svm_enable;
+    v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
 
-      bitmap += (port / 8);
-      PrintDebug("Setting Bit for port 0x%x\n", port);
-      *bitmap |= 1 << (port % 8);
+    V3_Print("SVM Enabled\n");
+
+    // Setup the host state save area
+    host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4);
+
+    /* 64-BIT-ISSUE */
+    //  msr.e_reg.high = 0;
+    //msr.e_reg.low = (uint_t)host_vmcb;
+    msr.r_reg = host_vmcbs[cpu_id];
+
+    PrintDebug("Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]);
+    v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
+
+
+    if (has_svm_nested_paging() == 1) {
+       v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU;
+    } else {
+       v3_cpu_types[cpu_id] = V3_SVM_CPU;
     }
+}
 
 
-    //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
 
-    ctrl_area->instrs.IOIO_PROT = 1;
-  }
+void v3_deinit_svm_cpu(int cpu_id) {
+    reg_ex_t msr;
+    extern v3_cpu_arch_t v3_cpu_types[];
 
+    // reset SVM_VM_HSAVE_PA_MSR
+    // Does setting it to NULL disable??
+    msr.r_reg = 0;
+    v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
 
+    // Disable SVM?
+    v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
+    msr.e_reg.low &= ~EFER_MSR_svm_enable;
+    v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
 
-  PrintDebug("Exiting on interrupts\n");
-  ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
-  ctrl_area->instrs.INTR = 1;
+    v3_cpu_types[cpu_id] = V3_INVALID_CPU;
 
+    V3_FreePages((void *)host_vmcbs[cpu_id], 4);
 
-  if (vm_info.page_mode == SHADOW_PAGING) {
-    PrintDebug("Creating initial shadow page table\n");
-    vm_info.shdw_pg_state.shadow_cr3.e_reg.low |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
-    PrintDebug("Created\n");
+    V3_Print("Host CPU %d host area freed, and SVM disabled\n", cpu_id);
+    return;
+}
 
-    guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3.r_reg;
 
-    //PrintDebugPageTables((pde32_t*)(vm_info.shdw_pg_state.shadow_cr3.e_reg.low));
 
-    ctrl_area->cr_reads.cr3 = 1;
-    ctrl_area->cr_writes.cr3 = 1;
 
 
-    ctrl_area->instrs.INVLPG = 1;
-    ctrl_area->instrs.INVLPGA = 1;
 
-    guest_state->g_pat = 0x7040600070406ULL;
 
-    guest_state->cr0 |= 0x80000000;
-  } else if (vm_info.page_mode == NESTED_PAGING) {
-    // Flush the TLB on entries/exits
-    //ctrl_area->TLB_CONTROL = 1;
 
-    // Enable Nested Paging
-    //ctrl_area->NP_ENABLE = 1;
 
-    //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
 
-        // Set the Nested Page Table pointer
-    //    ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
-    // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
 
-    //   ctrl_area->N_CR3 = Get_CR3();
-    // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
 
-    //    guest_state->g_pat = 0x7040600070406ULL;
-  }
 
 
 
-}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+#if 0
+/* 
+ * Test VMSAVE/VMLOAD Latency 
+ */
+#define vmsave ".byte 0x0F,0x01,0xDB ; "
+#define vmload ".byte 0x0F,0x01,0xDA ; "
+{
+    uint32_t start_lo, start_hi;
+    uint32_t end_lo, end_hi;
+    uint64_t start, end;
+    
+    __asm__ __volatile__ (
+                         "rdtsc ; "
+                         "movl %%eax, %%esi ; "
+                         "movl %%edx, %%edi ; "
+                         "movq  %%rcx, %%rax ; "
+                         vmsave
+                         "rdtsc ; "
+                         : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
+                         : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
+                         );
+    
+    start = start_hi;
+    start <<= 32;
+    start += start_lo;
+    
+    end = end_hi;
+    end <<= 32;
+    end += end_lo;
+    
+    PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
+    
+    __asm__ __volatile__ (
+                         "rdtsc ; "
+                         "movl %%eax, %%esi ; "
+                         "movl %%edx, %%edi ; "
+                         "movq  %%rcx, %%rax ; "
+                         vmload
+                         "rdtsc ; "
+                         : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
+                             : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
+                             );
+       
+       start = start_hi;
+       start <<= 32;
+       start += start_lo;
+
+       end = end_hi;
+       end <<= 32;
+       end += end_lo;
+
+
+       PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
+    }
+    /* End Latency Test */
+
+#endif
+
+
+
+
+
 
 
 #if 0
@@ -527,7 +1111,7 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
   
 
   ctrl_area->instrs.IOIO_PROT = 1;
-  ctrl_area->IOPM_BASE_PA = (uint_t)os_hooks->allocate_pages(3);
+  ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
   
   {
     reg_ex_t tmp_reg;
@@ -609,157 +1193,3 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
 #endif
 
 
-
-
-
-
-
-
-
-
-
-
-
-
-/*
-
-
-void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
-  vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
-  vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
-  uint_t i;
-
-
-  guest_state->rsp = vm_info.vm_regs.rsp;
-  guest_state->rip = vm_info.rip;
-
-
-  guest_state->efer |= EFER_MSR_svm_enable;
-  guest_state->rflags = 0x00000002; // The reserved bit is always 1
-  ctrl_area->svm_instrs.instrs.VMRUN = 1;
-  ctrl_area->guest_ASID = 1;
-  guest_state->cr0 = 0x60000010;
-
-
-  ctrl_area->exceptions.de = 1;
-  ctrl_area->exceptions.df = 1;
-  ctrl_area->exceptions.pf = 1;
-  ctrl_area->exceptions.ts = 1;
-  ctrl_area->exceptions.ss = 1;
-  ctrl_area->exceptions.ac = 1;
-  ctrl_area->exceptions.mc = 1;
-  ctrl_area->exceptions.gp = 1;
-  ctrl_area->exceptions.ud = 1;
-  ctrl_area->exceptions.np = 1;
-  ctrl_area->exceptions.of = 1;
-  ctrl_area->exceptions.nmi = 1;
-
-  guest_state->cs.selector = 0xf000;
-  guest_state->cs.limit=0xffff;
-  guest_state->cs.base =  0xffff0000;
-  guest_state->cs.attrib.raw = 0x9a;
-
-  
-  struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
-  for ( i = 0; segregs[i] != NULL; i++) {
-    struct vmcb_selector * seg = segregs[i];
-    
-    seg->selector = 0x0000;
-    seg->base = 0xffff0000;
-    seg->attrib.raw = 0x9b;
-    seg->limit = 0xffff;
-  }
-  
-  // Set GPRs 
-  //
-  //  EDX == 0xfxx
-  //  EAX, EBX, ECX, ESI, EDI, EBP, ESP == 0x0
-  //
-
-  guest_state->gdtr.base = 0;
-  guest_state->gdtr.limit = 0xffff;
-  guest_state->gdtr.attrib.raw = 0x0;
-
-  guest_state->idtr.base = 0;
-  guest_state->idtr.limit = 0xffff;
-  guest_state->idtr.attrib.raw = 0x0;
-
-  guest_state->ldtr.base = 0;
-  guest_state->ldtr.limit = 0xffff;
-  guest_state->ldtr.attrib.raw = 0x82;
-
-  guest_state->tr.base = 0;
-  guest_state->tr.limit = 0xffff;
-  guest_state->tr.attrib.raw = 0x83;
-
-
-
-
-  if (vm_info.io_map.num_ports > 0) {
-    vmm_io_hook_t * iter;
-    addr_t io_port_bitmap;
-    
-    io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
-    memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
-    
-    ctrl_area->IOPM_BASE_PA = io_port_bitmap;
-
-    //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
-
-    FOREACH_IO_HOOK(vm_info.io_map, iter) {
-      ushort_t port = iter->port;
-      uchar_t * bitmap = (uchar_t *)io_port_bitmap;
-
-      bitmap += (port / 8);
-      PrintDebug("Setting Bit in block %x\n", bitmap);
-      *bitmap |= 1 << (port % 8);
-    }
-
-    ctrl_area->instrs.instrs.IOIO_PROT = 1;
-  }
-
-  ctrl_area->instrs.instrs.INTR = 1;
-
-  // also determine if CPU supports nested paging
-
-  if (vm_info.page_mode == SHADOW_PAGING) {
-    PrintDebug("Creating initial shadow page table\n");
-    vm_info.shdw_pg_state.shadow_cr3.e_reg.low |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
-    PrintDebug("Created\n");
-
-    guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3.r_reg;
-
-    ctrl_area->cr_reads.crs.cr3 = 1;
-    ctrl_area->cr_writes.crs.cr3 = 1;
-    ctrl_area->cr_reads.crs.cr0 = 1;
-    ctrl_area->cr_writes.crs.cr0 = 1;
-
-    ctrl_area->instrs.instrs.INVLPG = 1;
-    ctrl_area->instrs.instrs.INVLPGA = 1;
-
-       
-    guest_state->g_pat = 0x7040600070406ULL;
-
-    vm_info.shdw_pg_state.guest_cr0.e_reg.low = guest_state->cr0;
-    guest_state->cr0 |= 0x80000000;
-  } else if (vm_info.page_mode == NESTED_PAGING) {
-    // Flush the TLB on entries/exits
-    //ctrl_area->TLB_CONTROL = 1;
-
-    // Enable Nested Paging
-    //ctrl_area->NP_ENABLE = 1;
-
-    //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
-
-        // Set the Nested Page Table pointer
-    //    ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
-    // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
-
-    //   ctrl_area->N_CR3 = Get_CR3();
-    // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
-
-    //    guest_state->g_pat = 0x7040600070406ULL;
-  }
-
-}
-*/