+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+
+
+
+
#include <palacios/svm.h>
#include <palacios/vmm.h>
#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_decoder.h>
+#include <palacios/vmm_string.h>
static vmcb_t * Allocate_VMCB() {
vmcb_t * vmcb_page = (vmcb_t *)V3_AllocPages(1);
-
memset(vmcb_page, 0, 4096);
return vmcb_page;
guest_state->efer |= EFER_MSR_svm_enable;
guest_state->rflags = 0x00000002; // The reserved bit is always 1
ctrl_area->svm_instrs.VMRUN = 1;
+ ctrl_area->svm_instrs.VMMCALL = 1;
+ ctrl_area->svm_instrs.VMLOAD = 1;
+ ctrl_area->svm_instrs.VMSAVE = 1;
+ ctrl_area->svm_instrs.STGI = 1;
+ ctrl_area->svm_instrs.CLGI = 1;
+ ctrl_area->svm_instrs.SKINIT = 1;
+ ctrl_area->svm_instrs.RDTSCP = 1;
+ ctrl_area->svm_instrs.ICEBP = 1;
+ ctrl_area->svm_instrs.WBINVD = 1;
+ ctrl_area->svm_instrs.MONITOR = 1;
+ ctrl_area->svm_instrs.MWAIT_always = 1;
+ ctrl_area->svm_instrs.MWAIT_if_armed = 1;
+
+
ctrl_area->instrs.HLT = 1;
// guest_state->cr0 = 0x00000001; // PE
ctrl_area->guest_ASID = 1;
uchar_t * bitmap = (uchar_t *)io_port_bitmap;
bitmap += (port / 8);
- PrintDebug("Setting Bit for port 0x%x\n", port);
+ // PrintDebug("Setting Bit for port 0x%x\n", port);
*bitmap |= 1 << (port % 8);
}
}
-
-
-
-
-
-
-
static int init_svm_guest(struct guest_info *info) {
PrintDebug("Allocating VMCB\n");
Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
+ info->run_state = VM_STOPPED;
+
// info->rip = 0;
info->vm_regs.rdi = 0;
}
+
// can we start a kernel thread here...
static int start_svm_guest(struct guest_info *info) {
vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
uint_t num_exits = 0;
+
+
PrintDebug("Launching SVM VM (vmcb=%x)\n", info->vmm_data);
//PrintDebugVMCB((vmcb_t*)(info->vmm_data));
+ info->run_state = VM_RUNNING;
+
while (1) {
ullong_t tmp_tsc;
}
- if (handle_svm_exit(info) != 0) {
+ if (v3_handle_svm_exit(info) != 0) {
addr_t host_addr;
addr_t linear_addr = 0;
+ info->run_state = VM_ERROR;
+
PrintDebug("SVM ERROR!!\n");
PrintDebug("RIP: %x\n", guest_state->rip);
PrintDebug("RIP Linear: %x\n", linear_addr);
- PrintV3Segments(info);
- PrintV3CtrlRegs(info);
- PrintV3GPRs(info);
+ v3_print_segments(info);
+ v3_print_ctrl_regs(info);
+ v3_print_GPRs(info);
if (info->mem_mode == PHYSICAL_MEM) {
guest_pa_to_host_pa(info, linear_addr, &host_addr);
PrintDebug("Host Address of rip = 0x%x\n", host_addr);
PrintDebug("Instr (15 bytes) at %x:\n", host_addr);
- PrintTraceMemDump((char*)host_addr, 15);
+ PrintTraceMemDump((uchar_t *)host_addr, 15);
break;
}
+
/* Checks machine SVM capability */
/* Implemented from: AMD Arch Manual 3, sect 15.4 */
-int is_svm_capable() {
+int v3_is_svm_capable() {
#if 1
// Dinda
}
-int has_svm_nested_paging() {
+static int has_svm_nested_paging() {
uint32_t ret;
ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
-void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
+void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) {
reg_ex_t msr;
void * host_state;
// Setup the host state save area
host_state = V3_AllocPages(4);
- msr.e_reg.high = 0;
- msr.e_reg.low = (uint_t)host_state;
+ /* 64-BIT-ISSUE */
+ // msr.e_reg.high = 0;
+ //msr.e_reg.low = (uint_t)host_state;
+ msr.r_reg = (addr_t)host_state;
- PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
+ PrintDebug("Host State being saved at %x\n", (addr_t)host_state);
Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);