return 0;
}
-int v3_svm_patch_core(struct guest_info * core, void * chkpt_ctx){
+int v3_svm_load_core(struct guest_info * core, void * chkpt_ctx){
struct cr0_32 * shadow_cr0;
vmcb_saved_state_t * guest_state;
vmcb_ctrl_t * guest_ctrl;
if (core->shdw_pg_mode == SHADOW_PAGING) {
- if (shadow_cr0->pg){
+ if (v3_get_vm_mem_mode(core) == VIRTUAL_MEM) {
+ if (v3_activate_shadow_pt(core) == -1) {
+ PrintError("Failed to activate shadow page tables\n");
+ return -1;
+ }
+ } else {
if (v3_activate_passthrough_pt(core) == -1) {
PrintError("Failed to activate passthrough page tables\n");
return -1;
}
- v3_get_vmcb_segments((vmcb_t*)(core->vmm_data), &(core->segments));
+ v3_get_vmcb_segments((vmcb_t *)(core->vmm_data), &(core->segments));
return 0;
}
#endif
}
PrintDebug("SVM core %u(on %u) initialized\n", info->vcpu_id, info->pcpu_id);
+
+ // We'll be paranoid about race conditions here
+ v3_wait_at_barrier(info);
}
PrintDebug("SVM core %u(on %u): I am starting at CS=0x%x (base=0x%p, limit=0x%x), RIP=0x%p\n",