* *
*/
-static int handle_2MB_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
- pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde);
+static int handle_2MB_shadow_pagefault_pde_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
+ pt_access_status_t shadow_pde_access, pde64_2MB_t * shadow_pt,
+ pde64_2MB_t * large_guest_pde);
+static int handle_2MB_shadow_pagefault_pte_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
+ pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde);
static int handle_pte_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
pte64_t * shadow_pt, pte64_t * guest_pt);
PrintDebug("64 bit Shadow page fault handler: %p\n", (void *)fault_addr);
PrintDebug("Handling PML fault\n");
- if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pml) == -1) {
+ if (v3_gpa_to_hva(info, guest_cr3, (addr_t*)&guest_pml) == -1) {
PrintError("Invalid Guest PML4E Address: 0x%p\n", (void *)guest_cr3);
return -1;
}
// Continue processing at the next level
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr), (addr_t *)&guest_pdp) == -1) {
+ if (v3_gpa_to_hva(info, BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr), (addr_t *)&guest_pdp) == -1) {
// Machine check the guest
PrintError("Invalid Guest PDP Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr));
v3_raise_exception(info, MC_EXCEPTION);
// Continue processing at the next level
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr), (addr_t *)&guest_pd) == -1) {
+ if (v3_gpa_to_hva(info, BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr), (addr_t *)&guest_pd) == -1) {
// Machine check the guest
PrintError("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr));
v3_raise_exception(info, MC_EXCEPTION);
return 0;
}
-
static int handle_pde_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
pde64_t * shadow_pd, pde64_t * guest_pd) {
pt_access_status_t guest_pde_access;
return 0;
}
-
pte64_t * shadow_pt = NULL;
pte64_t * guest_pt = NULL;
- // Get the next shadow page level, allocate if not present
-
+ // get the next shadow page level, allocate if not present
if (shadow_pde_access == PT_ACCESS_NOT_PRESENT) {
+ // Check if we can use large pages and the guest memory is properly aligned
+ // to potentially use a large page
+
+ if ((info->use_large_pages == 1) && (guest_pde->large_page == 1)) {
+ addr_t guest_pa = BASE_TO_PAGE_ADDR_2MB(((pde64_2MB_t *)guest_pde)->page_base_addr);
+ uint32_t page_size = v3_get_max_page_size(info, guest_pa, LONG);
+
+ if (page_size == PAGE_SIZE_2MB) {
+ if (handle_2MB_shadow_pagefault_pde_64(info, fault_addr, error_code, shadow_pde_access,
+ (pde64_2MB_t *)shadow_pde, (pde64_2MB_t *)guest_pde) == -1) {
+ PrintError("Error handling large pagefault with large page\n");
+ return -1;
+ }
+
+ return 0;
+ }
+ // Fallthrough to handle the region with small pages
+ }
+
struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
shadow_pt = (pte64_t *)V3_VAddr((void *)shdw_page->page_pa);
shadow_pde->present = 1;
shadow_pde->user_page = guest_pde->user_page;
-
if (guest_pde->large_page == 0) {
shadow_pde->writable = guest_pde->writable;
} else {
// Continue processing at the next level
if (guest_pde->large_page == 0) {
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t *)&guest_pt) == -1) {
+ if (v3_gpa_to_hva(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t *)&guest_pt) == -1) {
// Machine check the guest
PrintError("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
v3_raise_exception(info, MC_EXCEPTION);
return -1;
}
} else {
- if (handle_2MB_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, (pde64_2MB_t *)guest_pde) == -1) {
- PrintError("Error handling large pagefault\n");
+ if (handle_2MB_shadow_pagefault_pte_64(info, fault_addr, error_code, shadow_pt, (pde64_2MB_t *)guest_pde) == -1) {
+ PrintError("Error handling large pagefault with small page\n");
return -1;
}
}
PrintDebug("Handling PTE fault\n");
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info->vm_info, info->cpu_id, guest_pa);
+ struct v3_mem_region * shdw_reg = v3_get_mem_region(info->vm_info, info->cpu_id, guest_pa);
if ((shdw_reg->flags.alloced == 1) ||
(shdw_reg->flags.read == 1)) {
- addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, info->cpu_id, guest_pa);
-
+ addr_t shadow_pa = 0;
+
+ if (v3_gpa_to_hpa(info, guest_pa, &shadow_pa) == -1) {
+ PrintError("could not translate page fault address (%p)\n", (void *)guest_pa);
+ return -1;
+ }
+
shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
shadow_pte->present = guest_pte->present;
} else {
// Pass to unhandled call back
-
if (shdw_reg->unhandled(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
return -1;
}
+static int handle_2MB_shadow_pagefault_pde_64(struct guest_info * info,
+ addr_t fault_addr, pf_error_t error_code,
+ pt_access_status_t shadow_pde_access,
+ pde64_2MB_t * large_shadow_pde, pde64_2MB_t * large_guest_pde)
+{
+ addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_2MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_2MB(fault_addr);
+ // struct shadow_page_state * state = &(info->shdw_pg_state);
+
+ PrintDebug("Handling 2MB fault with large page (guest_fault_pa=%p) (error_code=%x)\n", (void *)guest_fault_pa, *(uint_t*)&error_code);
+ PrintDebug("LargeShadowPDE=%p, LargeGuestPDE=%p\n", large_shadow_pde, large_guest_pde);
+
+ struct v3_mem_region * shdw_reg = v3_get_mem_region(info->vm_info, info->cpu_id, guest_fault_pa);
+
+ if (shdw_reg == NULL) {
+ // Inject a machine check in the guest
+ PrintError("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
+
+ if (shadow_pde_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush tables and everything should now workd
+ PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
+ //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
+ return 0;
+ }
+
+
+ if (shadow_pde_access == PT_ACCESS_NOT_PRESENT) {
+ // Get the guest physical address of the fault
+
+ if ((shdw_reg->flags.alloced == 1) ||
+ (shdw_reg->flags.read == 1)) {
+ addr_t shadow_pa = 0;
+
+ if (v3_gpa_to_hpa(info, guest_fault_pa, &shadow_pa) == -1) {
+ PrintError("could not translate page fault address (%p)\n", (void *)guest_fault_pa);
+ return -1;
+ }
+
+ large_guest_pde->vmm_info = V3_LARGE_PG; /* For invalidations */
+ large_shadow_pde->page_base_addr = PAGE_BASE_ADDR_2MB(shadow_pa);
+ large_shadow_pde->large_page = 1;
+ large_shadow_pde->present = 1;
+ large_shadow_pde->user_page = 1;
+
+ if (shdw_reg->flags.write == 0) {
+ large_shadow_pde->writable = 0;
+ } else {
+ large_shadow_pde->writable = 1;
+ }
-static int handle_2MB_shadow_pagefault_64(struct guest_info * info,
- addr_t fault_addr, pf_error_t error_code,
- pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde)
+ //set according to VMM policy
+ large_shadow_pde->write_through = large_guest_pde->write_through;
+ large_shadow_pde->cache_disable = large_guest_pde->cache_disable;
+ large_shadow_pde->global_page = large_guest_pde->global_page;
+ //
+
+ } else {
+ if (shdw_reg->unhandled(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
+ } else if (shadow_pde_access == PT_ACCESS_WRITE_ERROR) {
+ if (shdw_reg->unhandled(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ } else {
+ PrintError("Error in large page fault handler...\n");
+ PrintError("This case should have been handled at the top level handler\n");
+ return -1;
+ }
+
+ // PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
+ PrintDebug("Returning from large page->large page fault handler\n");
+ return 0;
+}
+
+static int handle_2MB_shadow_pagefault_pte_64(struct guest_info * info,
+ addr_t fault_addr, pf_error_t error_code,
+ pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde)
{
pt_access_status_t shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
PrintDebug("Handling 2MB fault (guest_fault_pa=%p) (error_code=%x)\n", (void *)guest_fault_pa, *(uint_t*)&error_code);
PrintDebug("ShadowPT=%p, LargeGuestPDE=%p\n", shadow_pt, large_guest_pde);
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info->vm_info, info->cpu_id, guest_fault_pa);
+ struct v3_mem_region * shdw_reg = v3_get_mem_region(info->vm_info, info->cpu_id, guest_fault_pa);
if (shdw_reg == NULL) {
if ((shdw_reg->flags.alloced == 1) ||
(shdw_reg->flags.read == 1)) {
- addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, info->cpu_id, guest_fault_pa);
+ addr_t shadow_pa = 0;
+
+ if (v3_gpa_to_hpa(info, guest_fault_pa, &shadow_pa) == -1) {
+ PrintError("could not translate page fault address (%p)\n", (void *)guest_fault_pa);
+ return -1;
+ }
shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
}
// PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
- PrintDebug("Returning from large page fault handler\n");
+ PrintDebug("Returning from large page->small page fault handler\n");
return 0;
}
