// availability
for (j = 0; j < 8; j++) {
if (!(bus->dev_map[i] & (0x1 << j))) {
- return i * 8 + j;
+ return ((i * 8) + j) * 8;
}
}
}
}
static void allocate_dev_num(struct pci_bus * bus, int dev_num) {
- int major = dev_num / 8;
+ int major = (dev_num / 8) / 8;
int minor = dev_num % 8;
bus->dev_map[major] |= (0x1 << minor);
pci_dev->config_header.revision = 0x0002;
pci_dev->config_header.subclass = 0x00; // SubClass: host2pci
pci_dev->config_header.class = 0x06; // Class: PCI bridge
- pci_dev->config_header.header_type = 0x00;
pci_dev->bus_num = 0;
return 0;
int bar_offset = 0x10 + 4 * i;
if (pci_dev->bar[i].type == PCI_BAR_IO) {
+ pci_dev->bar[i].mask = 0x0000fffd;
*(uint32_t *)(pci_dev->config_space + bar_offset) = 0x00000001;
} else if (pci_dev->bar[i].type == PCI_BAR_MEM32) {
- pci_dev->bar[i].mask = (pci_dev->bar[i].num_pages << 12) - 1;
+ pci_dev->bar[i].mask = ~((pci_dev->bar[i].num_pages << 12) - 1);
pci_dev->bar[i].mask |= 0xf; // preserve the configuration flags
*(uint32_t *)(pci_dev->config_space + bar_offset) = 0x00000008;