#include "ide-types.h"
#include "atapi-types.h"
-#ifndef DEBUG_IDE
+#ifndef CONFIG_DEBUG_IDE
#undef PrintDebug
#define PrintDebug(fmt, args...)
#endif
/* Drive Commands */
static void ide_raise_irq(struct vm_device * dev, struct ide_channel * channel) {
if (channel->ctrl_reg.irq_disable == 0) {
- PrintDebug("Raising IDE Interrupt %d\n", channel->irq);
- channel->dma_status.int_gen = 1;
- v3_raise_irq(dev->vm, channel->irq);
+ // PrintError("Raising IDE Interrupt %d\n", channel->irq);
+ channel->dma_status.int_gen = 1;
+ v3_raise_irq(dev->vm, channel->irq);
}
}
#include "ata.h"
-#ifdef DEBUG_IDE
+#ifdef CONFIG_DEBUG_IDE
static void print_prd_table(struct vm_device * dev, struct ide_channel * channel) {
struct ide_dma_prd prd_entry;
int index = 0;
// Read in the data buffer....
// Read a sector/block at a time until the prd entry is full.
-#ifdef DEBUG_IDE
+#ifdef CONFIG_DEBUG_IDE
print_prd_table(dev, channel);
#endif
#define DMA_CHANNEL_FLAG 0x08
-static int write_dma_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
+static int write_dma_port(ushort_t port, void * src, uint_t length, void * private_data) {
+ struct vm_device * dev = (struct vm_device *)private_data;
struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
uint16_t port_offset = port & (DMA_CHANNEL_FLAG - 1);
uint_t channel_flag = (port & DMA_CHANNEL_FLAG) >> 3;
}
-static int read_dma_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
+static int read_dma_port(ushort_t port, void * dst, uint_t length, void * private_data) {
+ struct vm_device * dev = (struct vm_device *)private_data;
struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
uint16_t port_offset = port & (DMA_CHANNEL_FLAG - 1);
uint_t channel_flag = (port & DMA_CHANNEL_FLAG) >> 3;
struct ide_channel * channel = get_selected_channel(ide, port);
struct ide_drive * drive = get_selected_drive(channel);
- // PrintDebug("IDE: Reading Data Port %x (len=%d)\n", port, length);
+ PrintDebug("IDE: Reading Data Port %x (len=%d)\n", port, length);
if ((channel->cmd_reg == 0xec) ||
(channel->cmd_reg == 0xa1)) {
}
-static int pci_config_update(struct pci_device * pci_dev, uint_t reg_num, int length) {
+static int pci_config_update(uint_t reg_num, void * src, uint_t length, void * private_data) {
PrintDebug("PCI Config Update\n");
PrintDebug("\t\tInterupt register (Dev=%s), irq=%d\n", pci_dev->name, pci_dev->config_header.intr_line);
}
bars[4].type = PCI_BAR_IO;
- bars[4].default_base_port = PRI_DEFAULT_DMA_PORT;
+ // bars[4].default_base_port = PRI_DEFAULT_DMA_PORT;
+ bars[4].default_base_port = -1;
bars[4].num_ports = 16;
bars[4].io_read = read_dma_port;
bars[4].io_write = write_dma_port;
-
+ bars[4].private_data = dev;
+
pci_dev = v3_pci_register_device(ide->pci_bus, PCI_STD_DEVICE, 0, sb_pci->dev_num, 1,
"PIIX3_IDE", bars,
- pci_config_update, NULL, NULL, dev);
+ pci_config_update, NULL, NULL, dev, dev);
if (pci_dev == NULL) {
PrintError("Failed to register IDE BUS %d with PCI\n", i);