Gears system call hijacking core changes

[palacios.git] / palacios / src / devices / apic.c

diff --git a/palacios/src/devices/apic.c b/palacios/src/devices/apic.c
index d83f0bd..80f3d30 100644 (file)
--- a/palacios/src/devices/apic.c
+++ b/palacios/src/devices/apic.c
@@ -297,7 +297,10 @@ static void init_apic_state(struct apic_state * apic, uint32_t id) {
     apic->tmr_cur_cnt = 0x00000000;
     apic->missed_ints = 0;
 
-    apic->lapic_id.val = id;
+    // note that it's the *lower* 24 bits that are
+    // reserved, not the upper 24.  
+    apic->lapic_id.val = 0;
+    apic->lapic_id.apic_id = id;
     
     apic->ipi_state = INIT_ST;
 
@@ -787,13 +790,13 @@ static struct apic_state * find_physical_apic(struct apic_dev_state * apic_dev,
 
     if ( (dst_idx > 0) && (dst_idx < apic_dev->num_apics) ) { 
        // see if it simply is the core id
-       if (apic_dev->apics[dst_idx].lapic_id.val == dst_idx) { 
+       if (apic_dev->apics[dst_idx].lapic_id.apic_id == dst_idx) { 
             dst_apic = &(apic_dev->apics[dst_idx]);
        }
     }
 
     for (i = 0; i < apic_dev->num_apics; i++) { 
-       if (apic_dev->apics[i].lapic_id.val == dst_idx) { 
+       if (apic_dev->apics[i].lapic_id.apic_id == dst_idx) { 
            dst_apic =  &(apic_dev->apics[i]);
        }
     }
@@ -1432,8 +1435,7 @@ static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, u
        }
        case INT_CMD_HI_OFFSET: {
            apic->int_cmd.hi = op_val;
-           V3_Print("apic %u: core %u: writing command high=0x%x\n", apic->lapic_id.val, core->vcpu_id,apic->int_cmd.hi);
-
+           //V3_Print("apic %u: core %u: writing command high=0x%x\n", apic->lapic_id.val, core->vcpu_id,apic->int_cmd.hi);
            break;
        }
        // Unhandled Registers
@@ -1570,9 +1572,9 @@ static void apic_inject_timer_intr(struct guest_info *core,
     struct apic_dev_state * apic_dev = (struct apic_dev_state *)(priv_data);
     struct apic_state * apic = &(apic_dev->apics[core->vcpu_id]); 
     // raise irq
-    PrintDebug("apic %u: core %u: Raising APIC Timer interrupt (periodic=%d) (icnt=%d) (div=%d)\n",
+    PrintDebug("apic %u: core %u: Raising APIC Timer interrupt (periodic=%d) (icnt=%d)\n",
               apic->lapic_id.val, core->vcpu_id,
-              apic->tmr_vec_tbl.tmr_mode, apic->tmr_init_cnt, shift_num);
+              apic->tmr_vec_tbl.tmr_mode, apic->tmr_init_cnt);
 
     if (apic_intr_pending(core, priv_data)) {
         PrintDebug("apic %u: core %u: Overriding pending IRQ %d\n", 
@@ -1655,10 +1657,14 @@ static void apic_update_time(struct guest_info * core,
 
     if (tmr_ticks < apic->tmr_cur_cnt) {
        apic->tmr_cur_cnt -= tmr_ticks;
-       if (apic->missed_ints) {
+#ifdef V3_CONFIG_APIC_ENQUEUE_MISSED_TMR_IRQS
+       if (apic->missed_ints && !apic_intr_pending(core, priv_data)) {
+           PrintDebug("apic %u: core %u: Injecting queued APIC timer interrupt.\n",
+                      apic->lapic_id.val, core->vcpu_id);
            apic_inject_timer_intr(core, priv_data);
            apic->missed_ints--;
        }
+#endif /* CONFIG_APIC_ENQUEUE_MISSED_TMR_IRQS */ 
     } else {
        tmr_ticks -= apic->tmr_cur_cnt;
        apic->tmr_cur_cnt = 0;
@@ -1666,9 +1672,10 @@ static void apic_update_time(struct guest_info * core,
        apic_inject_timer_intr(core, priv_data);
 
        if (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_PERIODIC) {
-           apic->missed_ints += tmr_ticks / apic->tmr_init_cnt;
+           int queued_ints = tmr_ticks / apic->tmr_init_cnt;
            tmr_ticks = tmr_ticks % apic->tmr_init_cnt;
            apic->tmr_cur_cnt = apic->tmr_init_cnt - tmr_ticks;
+           apic->missed_ints += queued_ints;
        }
     }