Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


Apic initialization bugfix
[palacios.git] / palacios / src / devices / apic.c
index b6c2416..7b68ae5 100644 (file)
@@ -282,8 +282,14 @@ static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, u
 
 static void set_apic_tpr(struct apic_state *apic, uint32_t val);
 
+static int is_apic_bsp(struct apic_state * apic) {
+    return ((apic->base_addr_msr.value & 0x0000000000000100LL) != 0);
+}
+
+
+
 
-// No lcoking done
+// No locking done
 static void init_apic_state(struct apic_state * apic, uint32_t id) {
     apic->base_addr = DEFAULT_BASE_ADDR;
 
@@ -861,14 +867,18 @@ static int deliver_ipi(struct apic_state * src_apic,
 
            PrintDebug(VM_NONE, VCORE_NONE, " INIT delivery to core %u\n", dst_core->vcpu_id);
 
-           // TODO: any APIC reset on dest core (shouldn't be needed, but not sure...)
+           if (is_apic_bsp(dst_apic)) {
+               PrintError(VM_NONE, VCORE_NONE, "Attempted to INIT BSP CPU. Ignoring since I have no idea what the hell to do...\n");
+               break;
+           }
+
 
-           // Sanity check
            if (dst_apic->ipi_state != INIT_ST) { 
-               PrintError(VM_NONE, VCORE_NONE, " Warning: core %u is not in INIT state (mode = %d), ignored (assuming this is the deassert)\n",
-                          dst_core->vcpu_id, dst_apic->ipi_state);
-               // Only a warning, since INIT INIT SIPI is common
-               break;
+               v3_raise_barrier(dst_core->vm_info, src_apic->core);
+               dst_core->core_run_state = CORE_STOPPED;
+               dst_apic->ipi_state = INIT_ST;
+               v3_lower_barrier(dst_core->vm_info);
+
            }
 
            // We transition the target core to SIPI state
@@ -1872,12 +1882,16 @@ static int apic_free(struct apic_dev_state * apic_dev) {
            v3_remove_timer(core, apic->timer);
        }
 
+       v3_lock_deinit(&(apic->irq_queue.lock));
+
        // unhook memory
 
     }
 
     v3_unhook_msr(vm, BASE_ADDR_MSR);
 
+    v3_lock_deinit(&(apic_dev->state_lock));
+
     V3_Free(apic_dev);
     return 0;
 }
@@ -2113,6 +2127,10 @@ static int apic_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
        return -1;
     }
 
+    memset(apic_dev,0,
+          sizeof(struct apic_dev_state) + 
+          sizeof(struct apic_state) * vm->num_cores);
+
     apic_dev->num_apics = vm->num_cores;
     v3_lock_init(&(apic_dev->state_lock));