struct guest_info * core;
+ void * controller_handle;
+
struct v3_timer * timer;
uint32_t eoi;
+
+
static int apic_read(struct guest_info * core, addr_t guest_addr, void * dst, uint_t length, void * priv_data);
static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, uint_t length, void * priv_data);
// host maitains logical proc->phsysical proc
PrintDebug(" non-local core, forcing it to exit\n");
+#ifdef CONFIG_MULTITHREAD_OS
v3_interrupt_cpu(dst_core->vm_info, dst_core->cpu_id, 0);
+#else
+ V3_ASSERT(0);
+#endif
}
break;
dest_apic = &(apic_dev->apics[icr->dst]);
- PrintDebug("route_ipi: IPI %s %u from apic %p to %s %s %u (icr=0x%llx)\n",
+ PrintDebug("route_ipi: IPI %s %u from apic %p to %s %s %u (icr=0x%llx) (destapic=%p\n",
deliverymode_str[icr->del_mode],
icr->vec,
src_apic,
(icr->dst_mode == 0) ? "(physical)" : "(logical)",
shorthand_str[icr->dst_shorthand],
icr->dst,
- icr->val);
+ icr->val,
+ dest_apic);
switch (icr->dst_shorthand) {
// logical delivery
int i;
uint8_t mda = icr->dst;
-
for (i = 0; i < apic_dev->num_apics; i++) {
dest_apic = &(apic_dev->apics[i]);
int del_flag = should_deliver_ipi(dest_apic->core, dest_apic, mda);
int v3_apic_send_ipi(struct v3_vm_info * vm, struct v3_gen_ipi * ipi, void * dev_data) {
- struct apic_dev_state * apic_dev = (struct apic_dev_state *)dev_data;
+ struct apic_dev_state * apic_dev = (struct apic_dev_state *)
+ (((struct vm_device *)dev_data)->private_data);
struct int_cmd_reg tmp_icr;
// zero out all the fields
tmp_icr.val = 0;
-
tmp_icr.vec = ipi->vector;
tmp_icr.del_mode = ipi->mode;
tmp_icr.dst_mode = ipi->logical;
int v3_apic_raise_intr(struct v3_vm_info * vm, uint32_t irq, uint32_t dst, void * dev_data) {
- struct apic_dev_state * apic_dev = (struct apic_dev_state *)(dev_data);
+ struct apic_dev_state * apic_dev = (struct apic_dev_state *)
+ (((struct vm_device*)dev_data)->private_data);
struct apic_state * apic = &(apic_dev->apics[dst]);
PrintDebug("apic %u core ?: raising interrupt IRQ %u (dst = %u).\n", apic->lapic_id.val, irq, dst);
activate_apic_irq(apic, irq);
if (V3_Get_CPU() != dst) {
+#ifdef CONFIG_MULTITHREAD_OS
v3_interrupt_cpu(vm, dst, 0);
+#else
+ V3_ASSERT(0);
+#endif
}
return 0;
-static int apic_free(struct vm_device * dev) {
- struct apic_dev_state * apic_dev = (struct apic_dev_state *)dev->private_data;
+static int apic_free(struct apic_dev_state * apic_dev) {
int i = 0;
+ struct v3_vm_info * vm = NULL;
- for (i = 0; i < dev->vm->num_cores; i++) {
+ for (i = 0; i < apic_dev->num_apics; i++) {
struct apic_state * apic = &(apic_dev->apics[i]);
- struct guest_info * core = &(dev->vm->cores[i]);
+ struct guest_info * core = apic->core;
+ vm = core->vm_info;
- // unregister intr controller
+ v3_remove_intr_controller(core, apic->controller_handle);
if (apic->timer) {
v3_remove_timer(core, apic->timer);
}
- v3_unhook_msr(dev->vm, BASE_ADDR_MSR);
+ v3_unhook_msr(vm, BASE_ADDR_MSR);
V3_Free(apic_dev);
return 0;
static struct v3_device_ops dev_ops = {
- .free = apic_free,
+ .free = (int (*)(void *))apic_free,
};
apic_dev->num_apics = vm->num_cores;
- struct vm_device * dev = v3_allocate_device(dev_id, &dev_ops, apic_dev);
+ struct vm_device * dev = v3_add_device(vm, dev_id, &dev_ops, apic_dev);
- if (v3_attach_device(vm, dev) == -1) {
+ if (dev == NULL) {
PrintError("apic: Could not attach device %s\n", dev_id);
V3_Free(apic_dev);
return -1;
init_apic_state(apic, i);
- v3_register_intr_controller(core, &intr_ops, apic_dev);
+ apic->controller_handle = v3_register_intr_controller(core, &intr_ops, apic_dev);
apic->timer = v3_add_timer(core, &timer_ops, apic_dev);
if (apic->timer == NULL) {
PrintError("APIC: Failed to attach timer to core %d\n", i);
- v3_detach_device(dev);
+ v3_remove_device(dev);
return -1;
}
#ifdef CONFIG_DEBUG_APIC
for (i = 0; i < vm->num_cores; i++) {
struct apic_state * apic = &(apic_dev->apics[i]);
- PrintDebug("apic: sanity check: apic %u (at %p) has id %u and msr value %llx\n",
- i, apic, apic->lapic_id.val, apic->base_addr_msr.value);
+ PrintDebug("apic: sanity check: apic %u (at %p) has id %u and msr value %llx and core at %p\n",
+ i, apic, apic->lapic_id.val, apic->base_addr_msr.value,apic->core);
}
#endif