Working apic, ioapic, and icc_bus for 1 core

[palacios.git] / palacios / src / devices / 8259a.c

diff --git a/palacios/src/devices/8259a.c b/palacios/src/devices/8259a.c
index e7d59be..fb0ab43 100644 (file)
--- a/palacios/src/devices/8259a.c
+++ b/palacios/src/devices/8259a.c
@@ -209,7 +209,7 @@ static int pic_raise_intr(struct v3_vm_info * vm, void * private_data, int irq)
        return -1;
     }
 
-    v3_interrupt_cpu(vm, 0);
+    v3_interrupt_cpu(vm, 0, 0);
 
     return 0;
 }
@@ -258,7 +258,7 @@ static int pic_get_intr_number(struct guest_info * info, void * private_data) {
 
     for (i = 0; i < 16; i++) {
        if (i <= 7) {
-           if (((state->master_irr & ~(state->master_imr)) >> i) == 0x01) {
+           if (((state->master_irr & ~(state->master_imr)) >> i) & 0x01) {
                //state->master_isr |= (0x1 << i);
                // reset the irr
                //state->master_irr &= ~(0x1 << i);
@@ -267,11 +267,11 @@ static int pic_get_intr_number(struct guest_info * info, void * private_data) {
                break;
            }
        } else {
-           if (((state->slave_irr & ~(state->slave_imr)) >> (i - 8)) == 0x01) {
+           if (((state->slave_irr & ~(state->slave_imr)) >> (i - 8)) & 0x01) {
                //state->slave_isr |= (0x1 << (i - 8));
                //state->slave_irr &= ~(0x1 << (i - 8));
                PrintDebug("8259 PIC: IRQ: %d, slave_icw2: %x\n", i, state->slave_icw2);
-               irq=  (i - 8) + state->slave_icw2;
+               irq = (i - 8) + state->slave_icw2;
                break;
            }
        }
@@ -305,7 +305,8 @@ static int pic_begin_irq(struct guest_info * info, void * private_data, int irq)
     }
     
     if (irq <= 7) {
-       if (((state->master_irr & ~(state->master_imr)) >> irq) == 0x01) {
+       // This should always be true: See pic_get_intr_number
+       if (((state->master_irr & ~(state->master_imr)) >> irq) & 0x01) {
            state->master_isr |= (0x1 << irq);
 
            if (!(state->master_elcr & (0x1 << irq))) {
@@ -313,10 +314,13 @@ static int pic_begin_irq(struct guest_info * info, void * private_data, int irq)
            }
        }
     } else {
-       state->slave_isr |= (0x1 << (irq - 8));
-
-       if (!(state->slave_elcr & (0x1 << irq))) {
-           state->slave_irr &= ~(0x1 << (irq - 8));
+       // This should always be true: See pic_get_intr_number
+       if (((state->slave_irr & ~(state->slave_imr)) >> (irq - 8)) & 0x01) {
+          state->slave_isr |= (0x1 << (irq - 8));
+          
+          if (!(state->slave_elcr & (0x1 << (irq - 8)))) {
+              state->slave_irr &= ~(0x1 << (irq - 8));
+          }
        }
     }
 
@@ -421,6 +425,8 @@ static int write_master_port1(struct guest_info * core, ushort_t port, void * sr
         return -1;
     }
 
+    v3_clear_pending_intr(core);
+
     if (IS_ICW1(cw)) {
 
         PrintDebug("8259 PIC: Setting ICW1 = %x (wr_Master1)\n", cw);
@@ -483,12 +489,16 @@ static int write_master_port2(struct guest_info * core, ushort_t port, void * sr
         return -1;
     }
 
+    v3_clear_pending_intr(core);
+
     if (state->master_state == ICW2) {
         struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
 
         PrintDebug("8259 PIC: Setting ICW2 = %x (wr_Master2)\n", cw);
         state->master_icw2 = cw;
 
+
+
         if (cw1->sngl == 0) {
             state->master_state = ICW3;
         } else if (cw1->ic4 == 1) {
@@ -497,6 +507,8 @@ static int write_master_port2(struct guest_info * core, ushort_t port, void * sr
             state->master_state = READY;
         }
 
+
+
     } else if (state->master_state == ICW3) {
         struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
 
@@ -539,6 +551,8 @@ static int write_slave_port1(struct guest_info * core, ushort_t port, void * src
        return -1;
     }
 
+    v3_clear_pending_intr(core);
+
     if (IS_ICW1(cw)) {
        PrintDebug("8259 PIC: Setting ICW1 = %x (wr_Slave1)\n", cw);
        state->slave_icw1 = cw;
@@ -597,6 +611,9 @@ static int write_slave_port2(struct guest_info * core, ushort_t port, void * src
         return -1;
     }
 
+    v3_clear_pending_intr(core);
+
+
     if (state->slave_state == ICW2) {
         struct icw1 * cw1 =  (struct icw1 *)&(state->master_icw1);