Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


added configurable memory sizes
[palacios.git] / palacios / include / palacios / vmm_instr_emulator.h
index a971805..aef325a 100644 (file)
 
 
 
+
+#define MAKE_2OP_64STR_INST(iname) static inline void iname##64(addr_t * dst, \
+                                                                addr_t * src, \
+                                                                addr_t * ecx, addr_t * flags) { \
+    /* Some of the flags values are not copied out in a pushf, we save them here */ \
+    addr_t flags_rsvd = *flags & ~0xfffe7fff;                          \
+                                                                       \
+    asm volatile (                                                     \
+        "pushfq; "                                                     \
+        "pushq %4; "                                                   \
+        "popfq; "                                                      \
+        "rep; "                                                        \
+        #iname"q; "                                                    \
+        "pushfq; "                                                     \
+        "popq %0; "                                                    \
+        "popfq; "                                                      \
+        : "=q"(*flags)                                                 \
+        : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags)                    \
+        );                                                             \
+                                                                       \
+    /*  : "=D"(*dst),"=S"(*src),"=c"(*ecx),"=q"(*flags)*/              \
+    *flags |= flags_rsvd;                                              \
+  }
+
+
 #define MAKE_2OP_32STR_INST(iname) static inline void iname##32(addr_t * dst, \
                                                                addr_t * src, \
                                                                addr_t * ecx, addr_t * flags) { \
 
 
 
+#define MAKE_2OP_64_INST(iname) static inline void iname##64(addr_t * dst, addr_t * src) { \
+    uint64_t tmp_dst = *dst, tmp_src = *src;                           \
+                                                                       \
+    asm volatile (                                                     \
+        #iname"q %1, %0; "                                             \
+        : "=q"(tmp_dst)                                                \
+        : "q"(tmp_src), "0"(tmp_dst)                                   \
+        );                                                             \
+    *dst = tmp_dst;                                                    \
+  }
+
 #define MAKE_2OP_32_INST(iname) static inline void iname##32(addr_t * dst, addr_t * src) { \
     uint32_t tmp_dst = *dst, tmp_src = *src;                           \
                                                                        \
 
 
 
+#define MAKE_2OP_8EXT_INST(iname) static inline void iname##8(addr_t * dst, addr_t * src, uint_t dst_len) { \
+    if (dst_len == 2) {                                                        \
+      asm volatile (                                                   \
+                   #iname" %1, %0; "                                   \
+                   : "=q"(*(uint16_t *)dst)                            \
+                   : "q"(*(uint8_t *)src), "0"(*(uint16_t *)dst)       \
+                   );                                                  \
+    } else if (dst_len == 4) {                                         \
+      asm volatile (                                                   \
+                   #iname" %1, %0; "                                   \
+                   : "=q"(*(uint32_t *)dst)                            \
+                   : "q"(*(uint8_t *)src), "0"(*(uint32_t *)dst)       \
+                   );                                                  \
+    } else if (dst_len == 8) {                                         \
+      asm volatile (                                                   \
+                   #iname" %1, %0; "                                   \
+                   : "=q"(*(uint64_t *)dst)                            \
+                   : "q"(*(uint8_t *)src), "0"(*(uint64_t *)dst)       \
+                   );                                                  \
+    }                                                                  \
+  }
+
+#define MAKE_2OP_16EXT_INST(iname) static inline void iname##16(addr_t * dst, addr_t * src, uint_t dst_len) { \
+    if (dst_len == 4) {                                                        \
+      asm volatile (                                                   \
+                   #iname" %1, %0; "                                   \
+                   : "=q"(*(uint32_t *)dst)                            \
+                   : "q"(*(uint16_t *)src), "0"(*(uint32_t *)dst)      \
+                   );                                                  \
+    } else if (dst_len == 8) {                                         \
+      asm volatile (                                                   \
+                   #iname" %1, %0; "                                   \
+                   : "=q"(*(uint64_t *)dst)                            \
+                   : "q"(*(uint16_t *)src), "0"(*(uint64_t *)dst)      \
+                   );                                                  \
+    }                                                                  \
+  }
+
+
+
+
+
 
+/****************************/
+/* 8 Bit instruction forms  */
+/****************************/
 
 MAKE_2OP_8FLAGS_INST(adc);
 MAKE_2OP_8FLAGS_INST(add);
@@ -395,10 +476,17 @@ MAKE_1OP_8FLAGS_INST(setz);
 MAKE_1OP_8_INST(not);
 
 MAKE_2OP_8_INST(mov);
+MAKE_2OP_8EXT_INST(movzx);
+MAKE_2OP_8EXT_INST(movsx);
+
 MAKE_2OP_8_INST(xchg);
 
+MAKE_2OP_8STR_INST(movs);
 
 
+/****************************/
+/* 16 Bit instruction forms */
+/****************************/
 MAKE_2OP_16FLAGS_INST(adc);
 MAKE_2OP_16FLAGS_INST(add);
 MAKE_2OP_16FLAGS_INST(and);
@@ -414,12 +502,15 @@ MAKE_1OP_16FLAGS_INST(neg);
 MAKE_1OP_16_INST(not);
 
 MAKE_2OP_16_INST(mov);
+MAKE_2OP_16EXT_INST(movzx);
+MAKE_2OP_16EXT_INST(movsx);
 MAKE_2OP_16_INST(xchg);
 
+MAKE_2OP_16STR_INST(movs);
 
-
-
-
+/****************************/
+/* 32 Bit instruction forms */
+/****************************/
 MAKE_2OP_32FLAGS_INST(adc);
 MAKE_2OP_32FLAGS_INST(add);
 MAKE_2OP_32FLAGS_INST(and);
@@ -435,8 +526,36 @@ MAKE_1OP_32FLAGS_INST(neg);
 MAKE_1OP_32_INST(not);
 
 MAKE_2OP_32_INST(mov);
+
 MAKE_2OP_32_INST(xchg);
 
-MAKE_2OP_8STR_INST(movs);
-MAKE_2OP_16STR_INST(movs);
+
+
 MAKE_2OP_32STR_INST(movs);
+
+#ifdef __V3_64BIT__
+
+/****************************/
+/* 64 Bit instruction forms */
+/****************************/
+MAKE_2OP_64FLAGS_INST(adc);
+MAKE_2OP_64FLAGS_INST(add);
+MAKE_2OP_64FLAGS_INST(and);
+MAKE_2OP_64FLAGS_INST(or);
+MAKE_2OP_64FLAGS_INST(xor);
+MAKE_2OP_64FLAGS_INST(sub);
+
+MAKE_1OP_64FLAGS_INST(inc);
+MAKE_1OP_64FLAGS_INST(dec);
+MAKE_1OP_64FLAGS_INST(neg);
+
+MAKE_1OP_64_INST(not);
+
+
+MAKE_2OP_64_INST(mov);
+
+
+MAKE_2OP_64_INST(xchg);
+
+
+#endif