/* Control register exit masks */
#define CR4_VMXE 0x00002000
+#define CR4_PAE 0x00000020
+
-int v3_load_vmcs_guest_state(struct guest_info * info);
-int v3_update_vmcs_guest_state(struct guest_info * info);
-int v3_update_vmcs_host_state(struct guest_info * info);
-int v3_update_vmcs_ctrl_fields(struct guest_info * info);
+
+struct vmcs_field_encoding {
+ uint8_t access_type : 1; /* 0 = full, 1 = high, (for accessing 64 bit fields on 32bit CPU) */
+ uint16_t index : 9;
+ uint8_t type : 2; /* 0=ctrl, 1=read-only, 2 = guest state, 3 = host state */
+ uint8_t rsvd1 : 1; /* MBZ */
+ uint8_t width : 2; /* 0 = 16bit, 1 = 64bit, 2 = 32bit, 3 = natural width */
+ uint32_t rsvd2 : 17;
+} __attribute__((packed));
typedef enum {
+ /* 16 bit control field */
+ VMCS_VPID = 0x00000000,
+ /* 16 bit guest state */
VMCS_GUEST_ES_SELECTOR = 0x00000800,
VMCS_GUEST_CS_SELECTOR = 0x00000802,
VMCS_GUEST_SS_SELECTOR = 0x00000804,
VMCS_VAPIC_ADDR_HIGH = 0x00002013,
VMCS_APIC_ACCESS_ADDR = 0x00002014,
VMCS_APIC_ACCESS_ADDR_HIGH = 0x00002015,
+ VMCS_EPT_PTR = 0x0000201A,
+ VMCS_EPT_PTR_HIGH = 0x0000201B,
+ /* 64 bit read only data field */
+ VMCS_GUEST_PHYS_ADDR = 0x00002400,
+ VMCS_GUEST_PHYS_ADDR_HIGH = 0x00002401,
/* 64 bit guest state fields */
VMCS_LINK_PTR = 0x00002800,
VMCS_LINK_PTR_HIGH = 0x00002801,
- VMCS_GUEST_DBG_CTL = 0x00002802,
- VMCS_GUEST_DBG_CTL_HIGH = 0x00002803,
- VMCS_GUEST_EFER = 0x00002805,
+ VMCS_GUEST_DBG_CTL = 0x00002802,
+ VMCS_GUEST_DBG_CTL_HIGH = 0x00002803,
+ VMCS_GUEST_PAT = 0x00002804,
+ VMCS_GUEST_PAT_HIGH = 0x00002805,
+ VMCS_GUEST_EFER = 0x00002806,
VMCS_GUEST_EFER_HIGH = 0x00002807,
VMCS_GUEST_PERF_GLOBAL_CTRL = 0x00002808,
VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH = 0x00002809,
-
+ VMCS_GUEST_PDPTE0 = 0x0000280A,
+ VMCS_GUEST_PDPTE0_HIGH = 0x0000280B,
+ VMCS_GUEST_PDPTE1 = 0x0000280C,
+ VMCS_GUEST_PDPTE1_HIGH = 0x0000280D,
+ VMCS_GUEST_PDPTE2 = 0x0000280E,
+ VMCS_GUEST_PDPTE2_HIGH = 0x0000280F,
+ VMCS_GUEST_PDPTE3 = 0x00002810,
+ VMCS_GUEST_PDPTE3_HIGH = 0x00002811,
+ /* 64 bit host state fields */
+ VMCS_HOST_PAT = 0x00002c00,
+ VMCS_HOST_PAT_HIGH = 0x00002c01,
+ VMCS_HOST_EFER = 0x00002c02,
+ VMCS_HOST_EFER_HIGH = 0x00002c03,
VMCS_HOST_PERF_GLOBAL_CTRL = 0x00002c04,
VMCS_HOST_PERF_GLOBAL_CTRL_HIGH = 0x00002c05,
/* 32 bit control fields */
VMCS_ENTRY_INSTR_LEN = 0x0000401A,
VMCS_TPR_THRESHOLD = 0x0000401C,
VMCS_SEC_PROC_CTRLS = 0x0000401e,
+ VMCS_PLE_GAP = 0x00004020,
+ VMCS_PLE_WINDOW = 0x00004022,
/* 32 bit Read Only data fields */
VMCS_INSTR_ERR = 0x00004400,
VMCS_EXIT_REASON = 0x00004402,
VMCS_IDT_VECTOR_INFO = 0x00004408,
VMCS_IDT_VECTOR_ERR = 0x0000440A,
VMCS_EXIT_INSTR_LEN = 0x0000440C,
- VMCS_EXIT_INSTR_INFO = 0x0000440E,
+ VMCS_EXIT_INSTR_INFO = 0x0000440E,
/* 32 bit Guest state fields */
VMCS_GUEST_ES_LIMIT = 0x00004800,
VMCS_GUEST_CS_LIMIT = 0x00004802,
VMCS_GUEST_ACTIVITY_STATE = 0x00004826,
VMCS_GUEST_SMBASE = 0x00004828,
VMCS_GUEST_SYSENTER_CS = 0x0000482A,
+ VMCS_PREEMPT_TIMER = 0x0000482E,
/* 32 bit host state field */
VMCS_HOST_SYSENTER_CS = 0x00004C00,
/* Natural Width Control Fields */
+struct vmx_intr_state {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t block_sti : 1;
+ uint32_t block_mov_ss : 1;
+ uint32_t block_smi : 1;
+ uint32_t block_nmi : 1;
+ uint32_t rsvd : 28;
+ } __attribute__((packed));
+ } __attribute__((packed));
+} __attribute__((packed));
+
+
+struct vmx_pending_dbg_excps {
+ union {
+ uint64_t value;
+
+ struct {
+ uint32_t lo;
+ uint32_t hi;
+ } __attribute__((packed));
+
+ struct {
+ uint64_t b0 : 1;
+ uint64_t b1 : 1;
+ uint64_t b2 : 1;
+ uint64_t b3 : 1;
+ uint64_t rsvd1 : 8;
+ uint64_t bp_set : 1;
+ uint64_t rsvd2 : 1;
+ uint64_t bp_ss : 1;
+ uint64_t rsvd3 : 49;
+ } __attribute__((packed));
+ } __attribute__((packed));
+} __attribute__((packed));
/* Segment Selector Access Rights (32 bits) */
/* INTEL Manual: 20-4 vol 3B */
-struct vmcs_segment_access {
+struct vmcs_segment {
+ uint16_t selector;
+ uint32_t limit;
+ uint64_t base;
+
union {
- uint32_t value;
+ uint32_t val;
struct {
uint32_t type : 4;
uint32_t desc_type : 1;
uint32_t unusable : 1;
uint32_t rsvd2 : 15;
} __attribute__((packed));
- } __attribute__((packed));
-}__attribute__((packed));
+ } __attribute__((packed)) access;
+};
+
+
+struct vmcs_msr_entry {
+ uint32_t index;
+ uint32_t rsvd;
+ uint32_t lo;
+ uint32_t hi;
+} __attribute__((packed));
struct vmcs_interrupt_state {
- uint32_t sti_blocking : 1;
- uint32_t mov_ss_blocking : 1;
- uint32_t smi_blocking : 1;
- uint32_t nmi_blocking : 1;
- uint32_t rsvd1 : 28;
+ union {
+ uint32_t val;
+ struct {
+ uint32_t sti_blocking : 1;
+ uint32_t mov_ss_blocking : 1;
+ uint32_t smi_blocking : 1;
+ uint32_t nmi_blocking : 1;
+ uint32_t rsvd1 : 28;
+ } __attribute__((packed));
+ } __attribute__((packed));
} __attribute__((packed));
+
struct vmcs_data {
uint32_t revision ;
uint32_t abort ;
void v3_print_vmcs();
+int v3_vmx_save_vmcs(struct guest_info * info);
+int v3_vmx_restore_vmcs(struct guest_info * info);
+
+
+int v3_update_vmcs_host_state(struct guest_info * info);
+int v3_update_vmcs_ctrl_fields(struct guest_info * info);
+
+
+int v3_read_vmcs_segments(struct v3_segments * segs);
+int v3_write_vmcs_segments(struct v3_segments * segs);
+void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg);
+void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg);
+
#endif // ! __V3VEE__
