#ifndef __DEVICES_PCI_H__
#define __DEVICES_PCI_H__
+#ifdef __V3VEE__
+
#include <palacios/vm_dev.h>
#include <palacios/vmm_types.h>
#include <palacios/vmm_rbtree.h>
#include <devices/pci_types.h>
-#define V3_PCI_BAR_MEM 0x00
-#define V3_PCI_BAR_IO 0x01
-#define V3_PCI_BAR_MEM_PREFETCH 0x08
+typedef enum {PCI_BAR_IO, PCI_BAR_MEM16, PCI_BAR_MEM32, PCI_BAR_MEM64_LOW, PCI_BAR_MEM64_HIGH, PCI_BAR_NONE} pci_bar_type_t;
+
+typedef enum {PCI_STD_DEVICE, PCI_TO_PCI_BRIDGE, PCI_CARDBUS, PCI_MULTIFUNCTION} pci_device_type_t;
+
+typedef enum { PCI_CLASS_PRE2 = 0x00,
+ PCI_CLASS_STORAGE = 0x01,
+ PCI_CLASS_NETWORK = 0x02,
+ PCI_CLASS_DISPLAY = 0x03,
+ PCI_CLASS_MMEDIA = 0x04,
+ PCI_CLASS_MEMORY = 0x05,
+ PCI_CLASS_BRIDGE = 0x06,
+ PCI_CLASS_COMM_CTRL = 0x07,
+ PCI_CLASS_BASE_PERIPH = 0x08,
+ PCI_CLASS_INPUT = 0x09,
+ PCI_CLASS_DOCK = 0x0a,
+ PCI_CLASS_PROC = 0x0b,
+ PCI_CLASS_SERIAL = 0x0c,
+ PCI_CLASS_MISC = 0xff } pci_class_t;
+
+typedef enum { PCI_STORAGE_SUBCLASS_SCSI = 0x00,
+ PCI_STORAGE_SUBCLASS_IDE = 0x01,
+ PCI_STORAGE_SUBCLASS_FLOPPY = 0x02,
+ PCI_STORAGE_SUBCLASS_IPI = 0x03,
+ PCI_STORAGE_SUBCLASS_RAID = 0x04,
+ PCI_STORAGE_SUBCLASS_OTHER = 0x80 } pci_storage_subclass_t;
+
+
+
+typedef enum { PCI_NET_SUBCLASS_ETHER = 0x00,
+ PCI_NET_SUBCLASS_TOKRING = 0x01,
+ PCI_NET_SUBCLASS_FDDI = 0x02,
+ PCI_NET_SUBCLASS_ATM = 0x03,
+ PCI_NET_SUBCLASS_OTHER = 0x80 } pci_network_subclass_t;
+
+typedef enum { PCI_DISPLAY_SUBCLASS_VGA = 0x00,
+ PCI_DISPLAY_SUBCLASS_XGA = 0x01,
+ PCI_DISPLAY_SUBCLASS_OTHER = 0x80 } pci_display_subclass_t;
+
+typedef enum { PCI_MMEDIA_SUBCLASS_VIDEO = 0x00,
+ PCI_MMEDIA_SUBCLASS_AUDIO = 0x01,
+ PCI_MMEDIA_SUBCLASS_OTHER = 0x80 } pci_multimedia_subclass_t;
+
+typedef enum { PCI_MEM_SUBCLASS_RAM = 0x00,
+ PCI_MEM_SUBCLASS_FLASH = 0x01,
+ PCI_MEM_SUBCLASS_OTHER = 0x80 } pci_memory_subclass_t;
+
+typedef enum { PCI_BRIDGE_SUBCLASS_HOST_PCI = 0x00,
+ PCI_BRIDGE_SUBCLASS_PCI_ISA = 0x01,
+ PCI_BRIDGE_SUBCLASS_PCI_EISA = 0x02,
+ PCI_BRIDGE_SUBCLASS_PCI_MICRO = 0x03,
+ PCI_BRIDGE_SUBCLASS_PCI_PCI = 0x04,
+ PCI_BRIDGE_SUBCLASS_PCI_PCMCIA = 0x05,
+ PCI_BRIDGE_SUBCLASS_PCI_NUBUS = 0x06,
+ PCI_BRIDGE_SUBCLASS_PCI_CARDBUS = 0x07,
+ PCI_BRIDGE_SUBCLASS_PCI_OTHER = 0x80 } pci_bridge_subclass_t;
+
+// For the rest of the subclass codes see:
+// http://www.acm.uiuc.edu/sigops/roll_your_own/7.c.1.html
+
+#define PCI_AUTO_DEV_NUM (-1)
+
+struct pci_device;
+
+struct v3_pci_bar {
+ pci_bar_type_t type;
+
+ union {
+ struct {
+ int num_pages;
+ addr_t default_base_addr;
+ int (*mem_read)(addr_t guest_addr, void * dst, uint_t length, void * private_data);
+ int (*mem_write)(addr_t guest_addr, void * src, uint_t length, void * private_data);
+ };
+
+ struct {
+ int num_ports;
+ uint16_t default_base_port;
+ int (*io_read)(ushort_t port, void * dst, uint_t length, struct vm_device * dev);
+ int (*io_write)(ushort_t port, void * src, uint_t length, struct vm_device * dev);
+ };
+ };
+
+ // Internal PCI data
+ uint32_t val;
+ int updated;
+ uint32_t mask;
+};
+#define PCI_IO_BASE(bar_val) (bar_val & 0xfffffffc)
+#define PCI_MEM32_BASE(bar_val) (bar_val & 0xfffffff0)
+
struct pci_device {
+
union {
- struct pci_config_header header;
- uint8_t header_space[64];
+ uint8_t config_space[256];
+
+ struct {
+ struct pci_config_header config_header;
+ uint8_t config_data[192];
+ } __attribute__((packed));
} __attribute__((packed));
- uint8_t config_space[192];
+ struct v3_pci_bar bar[6];
- uint_t bus_num;
struct rb_node dev_tree_node;
- int dev_num;
+ uint_t bus_num;
+
+ union {
+ uint8_t devfn;
+ struct {
+ uint8_t fn_num : 3;
+ uint8_t dev_num : 5;
+ } __attribute__((packed));
+ } __attribute__((packed));
+
char name[64];
struct vm_device * vm_dev; //the corresponding virtual device
- int (*config_read)(struct pci_device * pci_dev, uint_t reg_num, void * dst, int len);
- int (*config_write)(struct pci_device * pci_dev, uint_t reg_num, void * src, int len);
- int (*bar_update)(struct pci_device * pci_dev, uint_t bar_reg, uint32_t val);
+ int (*config_update)(struct pci_device * pci_dev, uint_t reg_num, int length);
+
+ int (*cmd_update)(struct pci_device *pci_dev, uchar_t io_enabled, uchar_t mem_enabled);
+ int (*ext_rom_update)(struct pci_device *pci_dev);
+
+ int ext_rom_update_flag;
+ int bar_update_flag;
void * priv_data;
};
struct vm_device * v3_create_pci();
-struct pci_bus * v3_get_pcibus(struct guest_info *vm, int bus_no);
-
struct pci_device *
-v3_pci_register_device(struct vm_device * dev,
- uint_t bus_num,
- const char * name,
+v3_pci_register_device(struct vm_device * pci,
+ pci_device_type_t dev_type,
+ int bus_num,
int dev_num,
- int (*config_read)(struct pci_device * pci_dev, uint_t reg_num, void * dst, int len),
- int (*config_write)(struct pci_device * pci_dev, uint_t reg_num, void * src, int len),
- int (*bar_update)(struct pci_device * pci_dev, uint_t bar_reg, uint32_t val),
- void * private_data);
+ int fn_num,
+ const char * name,
+ struct v3_pci_bar * bars,
+ int (*config_update)(struct pci_device * pci_dev, uint_t reg_num, int length),
+ int (*cmd_update)(struct pci_device *pci_dev, uchar_t io_enabled, uchar_t mem_enabled),
+ int (*ext_rom_update)(struct pci_device *pci_dev),
+ struct vm_device * dev);
#endif
+#endif
+