#define V3_ADD_MEMORY 50
#define V3_RESET_MEMORY 51
+#define V3_REMOVE_MEMORY 52
+
#define V3_ADD_PCI_HW_DEV 55
#define V3_ADD_PCI_USER_DEV 56
+#define V3_DVFS_CTRL 60
+
/* VM Specific IOCTLs */
/* VM Specific ioctls */
#define V3_VM_SEND 34
#define V3_VM_RECEIVE 35
+#define V3_VM_MOVE_MEM 36
+
+#define V3_VM_RESET 40
+
#define V3_VM_FB_INPUT 257
#define V3_VM_FB_QUERY 258
unsigned short pcore_id;
} __attribute__((packed));
+struct v3_mem_move_cmd{
+ unsigned long long gpa;
+ unsigned short pcore_id;
+} __attribute__((packed));
+
struct v3_debug_cmd {
unsigned int core;
unsigned int cmd;
#define V3_CHKPT_OPT_SKIP_ARCHDEP 8 // don't write core arch dep data to store
} __attribute__((packed));
+struct v3_reset_cmd {
+#define V3_RESET_VM_ALL 0
+#define V3_RESET_VM_HRT 1
+#define V3_RESET_VM_ROS 2
+#define V3_RESET_VM_CORE_RANGE 3
+ unsigned int type;
+ unsigned int first_core; // for CORE_RANGE
+ unsigned int num_cores; // for CORE_RANGE
+} __attribute__((packed));
struct v3_hw_pci_dev {