2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #ifdef __DECODER_TEST__
21 #include "vmm_decoder.h"
23 #include <xed/xed-interface.h>
29 #include <palacios/vmm_decoder.h>
30 #include <palacios/vmm_xed.h>
31 #include <xed/xed-interface.h>
32 #include <palacios/vm_guest.h>
33 #include <palacios/vmm.h>
38 #ifndef CONFIG_DEBUG_XED
40 #define PrintDebug(fmt, args...)
46 static uint_t tables_inited = 0;
49 #define GPR_REGISTER 0
50 #define SEGMENT_REGISTER 1
51 #define CTRL_REGISTER 2
52 #define DEBUG_REGISTER 3
56 /* Disgusting mask hack...
57 I can't think right now, so we'll do it this way...
59 static const ullong_t mask_1 = 0x00000000000000ffLL;
60 static const ullong_t mask_2 = 0x000000000000ffffLL;
61 static const ullong_t mask_4 = 0x00000000ffffffffLL;
62 static const ullong_t mask_8 = 0xffffffffffffffffLL;
65 #define MASK(val, length) ({ \
66 ullong_t mask = 0x0LL; \
84 struct memory_operand {
92 uint_t displacement_size;
93 ullong_t displacement;
99 static v3_op_type_t get_opcode(xed_iform_enum_t iform);
101 static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len);
102 static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t index, struct x86_operand * operand);
104 static int set_decoder_mode(struct guest_info * info, xed_state_t * state) {
105 switch (v3_get_vm_cpu_mode(info)) {
107 if (state->mmode != XED_MACHINE_MODE_LEGACY_16) {
108 xed_state_init(state,
109 XED_MACHINE_MODE_LEGACY_16,
110 XED_ADDRESS_WIDTH_16b,
111 XED_ADDRESS_WIDTH_16b);
116 if (state->mmode != XED_MACHINE_MODE_LEGACY_32) {
117 xed_state_init(state,
118 XED_MACHINE_MODE_LEGACY_32,
119 XED_ADDRESS_WIDTH_32b,
120 XED_ADDRESS_WIDTH_32b);
124 if (state->mmode != XED_MACHINE_MODE_LONG_COMPAT_32) {
125 xed_state_init(state,
126 XED_MACHINE_MODE_LONG_COMPAT_32,
127 XED_ADDRESS_WIDTH_32b,
128 XED_ADDRESS_WIDTH_32b);
132 if (state->mmode != XED_MACHINE_MODE_LONG_64) {
133 PrintDebug("Setting decoder to long mode\n");
134 // state->mmode = XED_MACHINE_MODE_LONG_64;
135 //xed_state_set_machine_mode(state, XED_MACHINE_MODE_LONG_64);
136 xed_state_init(state,
137 XED_MACHINE_MODE_LONG_64,
138 XED_ADDRESS_WIDTH_64b,
139 XED_ADDRESS_WIDTH_64b);
143 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
150 static int is_flags_reg(xed_reg_enum_t xed_reg) {
162 int v3_init_decoder(struct guest_info * info) {
163 // Global library initialization, only do it once
164 if (tables_inited == 0) {
169 xed_state_t * decoder_state = (xed_state_t *)V3_Malloc(sizeof(xed_state_t));
170 xed_state_zero(decoder_state);
171 xed_state_init(decoder_state,
172 XED_MACHINE_MODE_LEGACY_32,
173 XED_ADDRESS_WIDTH_32b,
174 XED_ADDRESS_WIDTH_32b);
176 info->decoder_state = decoder_state;
183 int v3_deinit_decoder(struct guest_info * core) {
184 V3_Free(core->decoder_state);
192 static int decode_string_op(struct guest_info * info,
193 xed_decoded_inst_t * xed_instr, const xed_inst_t * xi,
194 struct x86_instr * instr) {
196 PrintDebug("String operation\n");
198 if (instr->op_type == V3_OP_MOVS) {
199 instr->num_operands = 2;
201 if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
202 PrintError("Could not get Destination memory operand\n");
206 if (get_memory_operand(info, xed_instr, 1, &(instr->src_operand)) == -1) {
207 PrintError("Could not get Source memory operand\n");
211 if (instr->prefixes.rep == 1) {
213 uint_t reg_length = 0;
215 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0), ®_addr, ®_length);
216 instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
218 instr->str_op_length = 1;
221 } else if (instr->op_type == V3_OP_STOS) {
222 instr->num_operands = 2;
224 if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
225 PrintError("Could not get Destination memory operand\n");
229 // STOS reads from rax
230 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0),
231 &(instr->src_operand.operand),
232 &(instr->src_operand.size));
233 instr->src_operand.type = REG_OPERAND;
235 if (instr->prefixes.rep == 1) {
237 uint_t reg_length = 0;
239 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG1), ®_addr, ®_length);
240 instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
242 instr->str_op_length = 1;
246 PrintError("Unhandled String OP\n");
255 int v3_disasm(struct guest_info * info, void *instr_ptr, addr_t * rip, int mark) {
259 xed_decoded_inst_t xed_instr;
260 xed_error_enum_t xed_error;
262 /* disassemble the specified instruction */
263 if (set_decoder_mode(info, info->decoder_state) == -1) {
264 PrintError("Could not set decoder mode\n");
268 xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
270 xed_error = xed_decode(&xed_instr,
271 REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
272 XED_MAX_INSTRUCTION_BYTES);
274 if (xed_error != XED_ERROR_NONE) {
275 PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
279 /* obtain string representation in AT&T syntax */
280 if (!xed_format_att(&xed_instr, buffer, sizeof(buffer), *rip)) {
281 PrintError("Xed error: cannot disaaemble\n");
285 /* print address, opcode bytes and the disassembled instruction */
286 length = xed_decoded_inst_get_length(&xed_instr);
287 V3_Print("0x%p %c ", (void *) *rip, mark ? '*' : ' ');
288 for (i = 0; i < length; i++) {
289 unsigned char b = ((unsigned char *) instr_ptr)[i];
290 V3_Print("%x%x ", b >> 4, b & 0xf);
295 V3_Print("%s\n", buffer);
297 /* move on to next instruction */
304 int v3_decode(struct guest_info * info, addr_t instr_ptr, struct x86_instr * instr) {
305 xed_decoded_inst_t xed_instr;
306 xed_error_enum_t xed_error;
309 v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
311 if (set_decoder_mode(info, info->decoder_state) == -1) {
312 PrintError("Could not set decoder mode\n");
316 xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
318 xed_error = xed_decode(&xed_instr,
319 REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
320 XED_MAX_INSTRUCTION_BYTES);
323 if (xed_error != XED_ERROR_NONE) {
324 PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
328 const xed_inst_t * xi = xed_decoded_inst_inst(&xed_instr);
330 instr->instr_length = xed_decoded_inst_get_length(&xed_instr);
333 xed_iform_enum_t iform = xed_decoded_inst_get_iform_enum(&xed_instr);
335 #ifdef CONFIG_DEBUG_XED
336 xed_iclass_enum_t iclass = xed_decoded_inst_get_iclass(&xed_instr);
338 PrintDebug("iform=%s, iclass=%s\n", xed_iform_enum_t2str(iform), xed_iclass_enum_t2str(iclass));
342 if ((instr->op_type = get_opcode(iform)) == V3_INVALID_OP) {
343 PrintError("Could not get opcode. (iform=%s)\n", xed_iform_enum_t2str(iform));
348 // We special case the string operations...
349 if (xed_decoded_inst_get_category(&xed_instr) == XED_CATEGORY_STRINGOP) {
350 instr->is_str_op = 1;
351 return decode_string_op(info, &xed_instr, xi, instr);
353 instr->is_str_op = 0;
354 instr->str_op_length = 0;
357 instr->num_operands = xed_decoded_inst_noperands(&xed_instr);
360 if (instr->num_operands > 3) {
361 PrintDebug("Special Case Not Handled (more than 3 operands) (iform=%s)\n", xed_iform_enum_t2str(iform)
364 } else if (instr->num_operands == 3) {
365 const xed_operand_t * op = xed_inst_operand(xi, 2);
366 xed_operand_enum_t op_enum = xed_operand_name(op);
368 if ((!xed_operand_is_register(op_enum)) ||
369 (!is_flags_reg(xed_decoded_inst_get_reg(&xed_instr, op_enum)))) {
371 PrintError("Special Case not handled (iform=%s)\n", xed_iform_enum_t2str(iform));
377 //PrintDebug("Number of operands: %d\n", instr->num_operands);
378 //PrintDebug("INSTR length: %d\n", instr->instr_length);
381 if (instr->num_operands >= 1) {
382 const xed_operand_t * op = xed_inst_operand(xi, 0);
383 xed_operand_enum_t op_enum = xed_operand_name(op);
385 struct x86_operand * v3_op = NULL;
388 if (xed_operand_written(op)) {
389 v3_op = &(instr->dst_operand);
391 v3_op = &(instr->src_operand);
395 v3_op = &(instr->dst_operand);
397 if (xed_operand_is_register(op_enum)) {
398 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
399 int v3_reg_type = xed_reg_to_v3_reg(info,
404 if (v3_reg_type == -1) {
405 PrintError("First operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
406 v3_op->type = INVALID_OPERAND;
408 } else if (v3_reg_type == SEGMENT_REGISTER) {
409 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
410 v3_op->operand = (addr_t)&(seg_reg->selector);
413 v3_op->type = REG_OPERAND;
418 case XED_OPERAND_MEM0:
420 PrintDebug("Memory operand (1)\n");
421 if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
422 PrintError("Could not get first memory operand\n");
428 case XED_OPERAND_MEM1:
429 case XED_OPERAND_IMM1:
431 PrintError("Illegal Operand Order\n");
435 case XED_OPERAND_IMM0:
436 case XED_OPERAND_AGEN:
437 case XED_OPERAND_PTR:
438 case XED_OPERAND_RELBR:
440 PrintError("Unhandled Operand Type\n");
446 // set second operand
447 if (instr->num_operands >= 2) {
448 const xed_operand_t * op = xed_inst_operand(xi, 1);
449 // xed_operand_type_enum_t op_type = xed_operand_type(op);
450 xed_operand_enum_t op_enum = xed_operand_name(op);
452 struct x86_operand * v3_op;
455 if (xed_operand_written(op)) {
456 v3_op = &(instr->dst_operand);
458 v3_op = &(instr->src_operand);
461 v3_op = &(instr->src_operand);
463 if (xed_operand_is_register(op_enum)) {
464 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
465 int v3_reg_type = xed_reg_to_v3_reg(info,
469 if (v3_reg_type == -1) {
470 PrintError("Second operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
471 v3_op->type = INVALID_OPERAND;
473 } else if (v3_reg_type == SEGMENT_REGISTER) {
474 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
475 v3_op->operand = (addr_t)&(seg_reg->selector);
478 v3_op->type = REG_OPERAND;
482 case XED_OPERAND_MEM0:
484 PrintDebug("Memory operand (2)\n");
485 if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
486 PrintError("Could not get first memory operand\n");
492 case XED_OPERAND_IMM0:
494 instr->src_operand.size = xed_decoded_inst_get_immediate_width(&xed_instr);
496 if (instr->src_operand.size > 4) {
497 PrintError("Unhandled 64 bit immediates\n");
500 instr->src_operand.operand = xed_decoded_inst_get_unsigned_immediate(&xed_instr);
502 instr->src_operand.type = IMM_OPERAND;
507 case XED_OPERAND_MEM1:
508 case XED_OPERAND_IMM1:
510 PrintError("Illegal Operand Order\n");
513 case XED_OPERAND_AGEN:
514 case XED_OPERAND_PTR:
515 case XED_OPERAND_RELBR:
517 PrintError("Unhandled Operand Type\n");
524 if (instr->num_operands >= 3) {
525 const xed_operand_t * op = xed_inst_operand(xi, 2);
526 xed_operand_type_enum_t op_type = xed_operand_type(op);
527 xed_operand_enum_t op_enum = xed_operand_name(op);
529 if (xed_operand_is_register(op_enum)) {
530 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
531 int v3_reg_type = xed_reg_to_v3_reg(info,
533 &(instr->third_operand.operand),
534 &(instr->third_operand.size));
536 if (v3_reg_type == -1) {
537 PrintError("Third operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
538 instr->third_operand.type = INVALID_OPERAND;
540 } else if (v3_reg_type == SEGMENT_REGISTER) {
541 struct v3_segment * seg_reg = (struct v3_segment *)(instr->third_operand.operand);
542 instr->third_operand.operand = (addr_t)&(seg_reg->selector);
546 instr->third_operand.type = REG_OPERAND;
549 PrintError("Unhandled third operand type %s\n", xed_operand_type_enum_t2str(op_type));
550 instr->num_operands = 2;
558 int v3_encode(struct guest_info * info, struct x86_instr * instr, char * instr_buf) {
567 static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t op_index, struct x86_operand * operand) {
568 struct memory_operand mem_op;
574 ullong_t displacement;
575 int addr_width = v3_get_addr_width(info);
576 v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info);
577 // struct v3_segment * seg_reg;
579 PrintDebug("Xed mode = %s\n", xed_machine_mode_enum_t2str(xed_state_get_machine_mode(info->decoder_state)));
580 PrintDebug("Address width: %s\n",
581 xed_address_width_enum_t2str(xed_state_get_address_width(info->decoder_state)));
582 PrintDebug("Stack Address width: %s\n",
583 xed_address_width_enum_t2str(xed_state_get_stack_address_width(info->decoder_state)));
587 memset((void*)&mem_op, '\0', sizeof(struct memory_operand));
589 xed_reg_enum_t xed_seg = xed_decoded_inst_get_seg_reg(xed_instr, op_index);
590 if (xed_seg != XED_REG_INVALID) {
591 struct v3_segment *tmp_segment;
592 if (xed_reg_to_v3_reg(info, xed_seg, (addr_t *)&tmp_segment, &(mem_op.segment_size)) == -1) {
593 PrintError("Unhandled Segment Register\n");
596 mem_op.segment = tmp_segment->base;
599 xed_reg_enum_t xed_base = xed_decoded_inst_get_base_reg(xed_instr, op_index);
600 if (xed_base != XED_REG_INVALID) {
602 if (xed_reg_to_v3_reg(info, xed_base, &base_reg, &(mem_op.base_size)) == -1) {
603 PrintError("Unhandled Base register\n");
606 mem_op.base = *(addr_t *)base_reg;
611 xed_reg_enum_t xed_idx = xed_decoded_inst_get_index_reg(xed_instr, op_index);
612 if ((op_index == 0) && (xed_idx != XED_REG_INVALID)) {
615 if (xed_reg_to_v3_reg(info, xed_idx, &index_reg, &(mem_op.index_size)) == -1) {
616 PrintError("Unhandled Index Register\n");
620 mem_op.index= *(addr_t *)index_reg;
622 xed_uint_t xed_scale = xed_decoded_inst_get_scale(xed_instr, op_index);
623 if (xed_scale != 0) {
624 mem_op.scale = xed_scale;
629 xed_uint_t disp_bits = xed_decoded_inst_get_memory_displacement_width(xed_instr, op_index);
631 xed_int64_t xed_disp = xed_decoded_inst_get_memory_displacement(xed_instr, op_index);
633 mem_op.displacement_size = disp_bits;
634 mem_op.displacement = xed_disp;
637 operand->type = MEM_OPERAND;
638 operand->size = xed_decoded_inst_get_memory_operand_length(xed_instr, op_index);
642 PrintDebug("Struct: Seg=%p (size=%d), base=%p, index=%p, scale=%p, displacement=%p (size=%d)\n",
643 (void *)mem_op.segment, mem_op.segment_size, (void*)mem_op.base, (void *)mem_op.index,
644 (void *)mem_op.scale, (void *)(addr_t)mem_op.displacement, mem_op.displacement_size);
647 PrintDebug("operand size: %d\n", operand->size);
649 seg = MASK(mem_op.segment, mem_op.segment_size);
650 base = MASK(mem_op.base, mem_op.base_size);
651 index = MASK(mem_op.index, mem_op.index_size);
652 scale = mem_op.scale;
654 // XED returns the displacement as a 2s complement signed number, but it can
655 // have different sizes, depending on the instruction encoding.
656 // we put that into a 64 bit unsigned (the unsigned doesn't matter since
657 // we only ever do 2s complement arithmetic on it. However, this means we
658 // need to sign-extend what XED provides through 64 bits.
659 displacement = mem_op.displacement;
660 displacement <<= 64 - mem_op.displacement_size * 8;
661 displacement = ((sllong_t)displacement) >> (64 - mem_op.displacement_size * 8);
664 PrintDebug("Seg=%p, base=%p, index=%p, scale=%p, displacement=%p\n",
665 (void *)seg, (void *)base, (void *)index, (void *)scale, (void *)(addr_t)displacement);
667 if (cpu_mode == REAL) {
668 operand->operand = seg + MASK((base + (scale * index) + displacement), addr_width);
670 operand->operand = MASK((seg + base + (scale * index) + displacement), addr_width);
677 static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len) {
679 PrintDebug("Xed Register: %s\n", xed_reg_enum_t2str(xed_reg));
682 case XED_REG_INVALID:
691 *v3_reg = (addr_t)&(info->vm_regs.rax);
695 *v3_reg = (addr_t)&(info->vm_regs.rax);
699 *v3_reg = (addr_t)&(info->vm_regs.rax);
703 *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
707 *v3_reg = (addr_t)&(info->vm_regs.rax);
712 *v3_reg = (addr_t)&(info->vm_regs.rcx);
716 *v3_reg = (addr_t)&(info->vm_regs.rcx);
720 *v3_reg = (addr_t)&(info->vm_regs.rcx);
724 *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
728 *v3_reg = (addr_t)&(info->vm_regs.rcx);
733 *v3_reg = (addr_t)&(info->vm_regs.rdx);
737 *v3_reg = (addr_t)&(info->vm_regs.rdx);
741 *v3_reg = (addr_t)&(info->vm_regs.rdx);
745 *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
749 *v3_reg = (addr_t)&(info->vm_regs.rdx);
754 *v3_reg = (addr_t)&(info->vm_regs.rbx);
758 *v3_reg = (addr_t)&(info->vm_regs.rbx);
762 *v3_reg = (addr_t)&(info->vm_regs.rbx);
766 *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
770 *v3_reg = (addr_t)&(info->vm_regs.rbx);
776 *v3_reg = (addr_t)&(info->vm_regs.rsp);
780 *v3_reg = (addr_t)&(info->vm_regs.rsp);
784 *v3_reg = (addr_t)&(info->vm_regs.rsp);
788 *v3_reg = (addr_t)&(info->vm_regs.rsp);
793 *v3_reg = (addr_t)&(info->vm_regs.rbp);
797 *v3_reg = (addr_t)&(info->vm_regs.rbp);
801 *v3_reg = (addr_t)&(info->vm_regs.rbp);
805 *v3_reg = (addr_t)&(info->vm_regs.rbp);
812 *v3_reg = (addr_t)&(info->vm_regs.rsi);
816 *v3_reg = (addr_t)&(info->vm_regs.rsi);
820 *v3_reg = (addr_t)&(info->vm_regs.rsi);
824 *v3_reg = (addr_t)&(info->vm_regs.rsi);
830 *v3_reg = (addr_t)&(info->vm_regs.rdi);
834 *v3_reg = (addr_t)&(info->vm_regs.rdi);
838 *v3_reg = (addr_t)&(info->vm_regs.rdi);
842 *v3_reg = (addr_t)&(info->vm_regs.rdi);
851 *v3_reg = (addr_t)&(info->vm_regs.r8);
855 *v3_reg = (addr_t)&(info->vm_regs.r8);
859 *v3_reg = (addr_t)&(info->vm_regs.r8);
863 *v3_reg = (addr_t)&(info->vm_regs.r8);
868 *v3_reg = (addr_t)&(info->vm_regs.r9);
872 *v3_reg = (addr_t)&(info->vm_regs.r9);
876 *v3_reg = (addr_t)&(info->vm_regs.r9);
880 *v3_reg = (addr_t)&(info->vm_regs.r9);
885 *v3_reg = (addr_t)&(info->vm_regs.r10);
889 *v3_reg = (addr_t)&(info->vm_regs.r10);
893 *v3_reg = (addr_t)&(info->vm_regs.r10);
897 *v3_reg = (addr_t)&(info->vm_regs.r10);
902 *v3_reg = (addr_t)&(info->vm_regs.r11);
906 *v3_reg = (addr_t)&(info->vm_regs.r11);
910 *v3_reg = (addr_t)&(info->vm_regs.r11);
914 *v3_reg = (addr_t)&(info->vm_regs.r11);
919 *v3_reg = (addr_t)&(info->vm_regs.r12);
923 *v3_reg = (addr_t)&(info->vm_regs.r12);
927 *v3_reg = (addr_t)&(info->vm_regs.r12);
931 *v3_reg = (addr_t)&(info->vm_regs.r12);
936 *v3_reg = (addr_t)&(info->vm_regs.r13);
940 *v3_reg = (addr_t)&(info->vm_regs.r13);
944 *v3_reg = (addr_t)&(info->vm_regs.r13);
948 *v3_reg = (addr_t)&(info->vm_regs.r13);
953 *v3_reg = (addr_t)&(info->vm_regs.r14);
957 *v3_reg = (addr_t)&(info->vm_regs.r14);
961 *v3_reg = (addr_t)&(info->vm_regs.r14);
965 *v3_reg = (addr_t)&(info->vm_regs.r14);
970 *v3_reg = (addr_t)&(info->vm_regs.r15);
974 *v3_reg = (addr_t)&(info->vm_regs.r15);
978 *v3_reg = (addr_t)&(info->vm_regs.r15);
982 *v3_reg = (addr_t)&(info->vm_regs.r15);
991 *v3_reg = (addr_t)&(info->rip);
993 return CTRL_REGISTER;
995 *v3_reg = (addr_t)&(info->rip);
997 return CTRL_REGISTER;
999 *v3_reg = (addr_t)&(info->rip);
1001 return CTRL_REGISTER;
1004 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1006 return CTRL_REGISTER;
1007 case XED_REG_EFLAGS:
1008 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1010 return CTRL_REGISTER;
1011 case XED_REG_RFLAGS:
1012 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1014 return CTRL_REGISTER;
1017 *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
1019 return CTRL_REGISTER;
1021 *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
1023 return CTRL_REGISTER;
1025 *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
1027 return CTRL_REGISTER;
1029 *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
1031 return CTRL_REGISTER;
1033 *v3_reg = (addr_t)&(info->ctrl_regs.cr8);
1035 return CTRL_REGISTER;
1057 *v3_reg = (addr_t)&(info->segments.cs);
1059 return SEGMENT_REGISTER;
1061 *v3_reg = (addr_t)&(info->segments.ds);
1063 return SEGMENT_REGISTER;
1065 *v3_reg = (addr_t)&(info->segments.es);
1067 return SEGMENT_REGISTER;
1069 *v3_reg = (addr_t)&(info->segments.ss);
1071 return SEGMENT_REGISTER;
1073 *v3_reg = (addr_t)&(info->segments.fs);
1075 return SEGMENT_REGISTER;
1077 *v3_reg = (addr_t)&(info->segments.gs);
1079 return SEGMENT_REGISTER;
1086 PrintError("Segment selector operand... Don't know how to handle this...\n");
1151 case XED_REG_STACKPUSH:
1152 case XED_REG_STACKPOP:
1155 case XED_REG_TSCAUX:
1158 case XED_REG_X87CONTROL:
1159 case XED_REG_X87STATUS:
1160 case XED_REG_X87TOP:
1161 case XED_REG_X87TAG:
1162 case XED_REG_X87PUSH:
1163 case XED_REG_X87POP:
1164 case XED_REG_X87POP2:
1199 static v3_op_type_t get_opcode(xed_iform_enum_t iform) {
1203 /* Control Instructions */
1205 case XED_IFORM_MOV_CR_GPR64_CR:
1206 case XED_IFORM_MOV_CR_GPR32_CR:
1207 return V3_OP_MOVCR2;
1209 case XED_IFORM_MOV_CR_CR_GPR64:
1210 case XED_IFORM_MOV_CR_CR_GPR32:
1211 return V3_OP_MOV2CR;
1213 case XED_IFORM_SMSW_GPRv:
1216 case XED_IFORM_LMSW_GPR16:
1219 case XED_IFORM_CLTS:
1222 case XED_IFORM_INVLPG_MEMb:
1223 return V3_OP_INVLPG;
1226 /* Data Instructions */
1229 case XED_IFORM_ADC_MEMv_GPRv:
1230 case XED_IFORM_ADC_MEMv_IMM:
1231 case XED_IFORM_ADC_MEMb_GPR8:
1232 case XED_IFORM_ADC_MEMb_IMM:
1234 case XED_IFORM_ADC_GPRv_MEMv:
1235 case XED_IFORM_ADC_GPR8_MEMb:
1239 case XED_IFORM_ADD_MEMv_GPRv:
1240 case XED_IFORM_ADD_MEMb_IMM:
1241 case XED_IFORM_ADD_MEMb_GPR8:
1242 case XED_IFORM_ADD_MEMv_IMM:
1244 case XED_IFORM_ADD_GPRv_MEMv:
1245 case XED_IFORM_ADD_GPR8_MEMb:
1249 case XED_IFORM_AND_MEMv_IMM:
1250 case XED_IFORM_AND_MEMb_GPR8:
1251 case XED_IFORM_AND_MEMv_GPRv:
1252 case XED_IFORM_AND_MEMb_IMM:
1254 case XED_IFORM_AND_GPR8_MEMb:
1255 case XED_IFORM_AND_GPRv_MEMv:
1259 case XED_IFORM_SUB_MEMv_IMM:
1260 case XED_IFORM_SUB_MEMb_GPR8:
1261 case XED_IFORM_SUB_MEMb_IMM:
1262 case XED_IFORM_SUB_MEMv_GPRv:
1264 case XED_IFORM_SUB_GPR8_MEMb:
1265 case XED_IFORM_SUB_GPRv_MEMv:
1269 case XED_IFORM_MOV_MEMv_GPRv:
1270 case XED_IFORM_MOV_MEMb_GPR8:
1271 case XED_IFORM_MOV_MEMv_OrAX:
1272 case XED_IFORM_MOV_MEMb_AL:
1273 case XED_IFORM_MOV_MEMv_IMM:
1274 case XED_IFORM_MOV_MEMb_IMM:
1276 case XED_IFORM_MOV_GPRv_MEMv:
1277 case XED_IFORM_MOV_GPR8_MEMb:
1278 case XED_IFORM_MOV_OrAX_MEMv:
1279 case XED_IFORM_MOV_AL_MEMb:
1284 case XED_IFORM_MOVZX_GPRv_MEMb:
1285 case XED_IFORM_MOVZX_GPRv_MEMw:
1289 case XED_IFORM_MOVSX_GPRv_MEMb:
1290 case XED_IFORM_MOVSX_GPRv_MEMw:
1295 case XED_IFORM_DEC_MEMv:
1296 case XED_IFORM_DEC_MEMb:
1299 case XED_IFORM_INC_MEMb:
1300 case XED_IFORM_INC_MEMv:
1304 case XED_IFORM_OR_MEMv_IMM:
1305 case XED_IFORM_OR_MEMb_IMM:
1306 case XED_IFORM_OR_MEMv_GPRv:
1307 case XED_IFORM_OR_MEMb_GPR8:
1309 case XED_IFORM_OR_GPRv_MEMv:
1310 case XED_IFORM_OR_GPR8_MEMb:
1314 case XED_IFORM_XOR_MEMv_GPRv:
1315 case XED_IFORM_XOR_MEMb_IMM:
1316 case XED_IFORM_XOR_MEMb_GPR8:
1317 case XED_IFORM_XOR_MEMv_IMM:
1319 case XED_IFORM_XOR_GPRv_MEMv:
1320 case XED_IFORM_XOR_GPR8_MEMb:
1323 case XED_IFORM_NEG_MEMb:
1324 case XED_IFORM_NEG_MEMv:
1327 case XED_IFORM_NOT_MEMv:
1328 case XED_IFORM_NOT_MEMb:
1331 case XED_IFORM_XCHG_MEMv_GPRv:
1332 case XED_IFORM_XCHG_MEMb_GPR8:
1335 case XED_IFORM_SETB_MEMb:
1338 case XED_IFORM_SETBE_MEMb:
1341 case XED_IFORM_SETL_MEMb:
1344 case XED_IFORM_SETLE_MEMb:
1347 case XED_IFORM_SETNB_MEMb:
1350 case XED_IFORM_SETNBE_MEMb:
1351 return V3_OP_SETNBE;
1353 case XED_IFORM_SETNL_MEMb:
1356 case XED_IFORM_SETNLE_MEMb:
1357 return V3_OP_SETNLE;
1359 case XED_IFORM_SETNO_MEMb:
1362 case XED_IFORM_SETNP_MEMb:
1365 case XED_IFORM_SETNS_MEMb:
1368 case XED_IFORM_SETNZ_MEMb:
1371 case XED_IFORM_SETO_MEMb:
1374 case XED_IFORM_SETP_MEMb:
1377 case XED_IFORM_SETS_MEMb:
1380 case XED_IFORM_SETZ_MEMb:
1383 case XED_IFORM_MOVSB:
1384 case XED_IFORM_MOVSW:
1385 case XED_IFORM_MOVSD:
1386 case XED_IFORM_MOVSQ:
1389 case XED_IFORM_STOSB:
1390 case XED_IFORM_STOSW:
1391 case XED_IFORM_STOSD:
1392 case XED_IFORM_STOSQ:
1397 return V3_INVALID_OP;