2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 static inline int activate_shadow_pt_64(struct guest_info * info) {
22 struct cr3_64 * shadow_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
23 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
24 struct shadow_page_data * shadow_pt = create_new_shadow_pt(info);
25 addr_t shadow_pt_addr = shadow_pt->page_pa;
27 // Because this is a new CR3 load the allocated page is the new CR3 value
28 shadow_pt->cr3 = shadow_pt->page_pa;
30 PrintDebug("Top level Shadow page pa=%p\n", (void *)shadow_pt_addr);
32 shadow_cr3->pml4t_base_addr = PAGE_BASE_ADDR_4KB(shadow_pt_addr);
33 PrintDebug("Creating new 64 bit shadow page table %p\n", (void *)BASE_TO_PAGE_ADDR(shadow_cr3->pml4t_base_addr));
36 shadow_cr3->pwt = guest_cr3->pwt;
37 shadow_cr3->pcd = guest_cr3->pcd;
50 * * 64 bit Page table fault handlers
55 static int handle_2MB_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
56 pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde);
58 static int handle_pte_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
59 pte64_t * shadow_pt, pte64_t * guest_pt);
61 static int handle_pde_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
62 pde64_t * shadow_pd, pde64_t * guest_pd);
64 static int handle_pdpe_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
65 pdpe64_t * shadow_pdp, pdpe64_t * guest_pdp);
68 static inline int handle_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
69 pml4e64_t * guest_pml = NULL;
70 pml4e64_t * shadow_pml = CR3_TO_PML4E64_VA(info->ctrl_regs.cr3);
71 addr_t guest_cr3 = CR3_TO_PML4E64_PA(info->shdw_pg_state.guest_cr3);
72 pt_access_status_t guest_pml4e_access;
73 pt_access_status_t shadow_pml4e_access;
74 pml4e64_t * guest_pml4e = NULL;
75 pml4e64_t * shadow_pml4e = (pml4e64_t *)&(shadow_pml[PML4E64_INDEX(fault_addr)]);
77 PrintDebug("64 bit Shadow page fault handler: %p\n", (void *)fault_addr);
78 PrintDebug("Handling PML fault\n");
80 if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pml) == -1) {
81 PrintError("Invalid Guest PML4E Address: 0x%p\n", (void *)guest_cr3);
85 guest_pml4e = (pml4e64_t *)&(guest_pml[PML4E64_INDEX(fault_addr)]);
87 PrintDebug("Checking Guest %p\n", (void *)guest_pml);
88 // Check the guest page permissions
89 guest_pml4e_access = v3_can_access_pml4e64(guest_pml, fault_addr, error_code);
91 PrintDebug("Checking shadow %p\n", (void *)shadow_pml);
92 // Check the shadow page permissions
93 shadow_pml4e_access = v3_can_access_pml4e64(shadow_pml, fault_addr, error_code);
95 /* Was the page fault caused by the Guest's page tables? */
96 if (v3_is_guest_pf(guest_pml4e_access, shadow_pml4e_access) == 1) {
97 PrintDebug("Injecting PML4E pf to guest: (guest access error=%d) (pf error code=%d)\n",
98 *(uint_t *)&guest_pml4e_access, *(uint_t *)&error_code);
99 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
100 PrintError("Could not inject guest page fault\n");
106 if (shadow_pml4e_access == PT_ACCESS_USER_ERROR) {
108 // PML4 Entry marked non-user
110 PrintDebug("Shadow Paging User access error (shadow_pml4e_access=0x%x, guest_pml4e_access=0x%x)\n",
111 shadow_pml4e_access, guest_pml4e_access);
112 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
113 PrintError("Could not inject guest page fault\n");
117 } else if ((shadow_pml4e_access != PT_ACCESS_NOT_PRESENT) &&
118 (shadow_pml4e_access != PT_ACCESS_OK)) {
119 // inject page fault in guest
120 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
121 PrintError("Could not inject guest page fault\n");
124 PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pml4e_access);
125 PrintDebug("Manual Says to inject page fault into guest\n");
130 pdpe64_t * shadow_pdp = NULL;
131 pdpe64_t * guest_pdp = NULL;
133 // Get the next shadow page level, allocate if not present
135 if (shadow_pml4e_access == PT_ACCESS_NOT_PRESENT) {
136 struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
137 shadow_pdp = (pdpe64_t *)V3_VAddr((void *)shdw_page->page_pa);
140 shadow_pml4e->present = 1;
141 shadow_pml4e->user_page = guest_pml4e->user_page;
142 shadow_pml4e->writable = guest_pml4e->writable;
143 shadow_pml4e->cache_disable = guest_pml4e->cache_disable;
144 shadow_pml4e->write_through = guest_pml4e->write_through;
146 guest_pml4e->accessed = 1;
148 shadow_pml4e->pdp_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
150 shadow_pdp = (pdpe64_t *)V3_VAddr((void *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pml4e->pdp_base_addr));
153 // Continue processing at the next level
155 if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr), (addr_t *)&guest_pdp) == -1) {
156 // Machine check the guest
157 PrintError("Invalid Guest PDP Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr));
158 v3_raise_exception(info, MC_EXCEPTION);
162 if (handle_pdpe_shadow_pagefault_64(info, fault_addr, error_code, shadow_pdp, guest_pdp) == -1) {
163 PrintError("Error handling Page fault caused by PDPE\n");
172 // For now we are not going to handle 1 Gigabyte pages
173 static int handle_pdpe_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
174 pdpe64_t * shadow_pdp, pdpe64_t * guest_pdp) {
175 pt_access_status_t guest_pdpe_access;
176 pt_access_status_t shadow_pdpe_access;
177 pdpe64_t * guest_pdpe = (pdpe64_t *)&(guest_pdp[PDPE64_INDEX(fault_addr)]);
178 pdpe64_t * shadow_pdpe = (pdpe64_t *)&(shadow_pdp[PDPE64_INDEX(fault_addr)]);
180 PrintDebug("Handling PDP fault\n");
183 PrintDebug("Guest Page Tree for guest virtual address zero fault\n");
184 PrintGuestPageTree(info,fault_addr,(addr_t)(info->shdw_pg_state.guest_cr3));
185 PrintDebug("Host Page Tree for guest virtual address zero fault\n");
186 PrintHostPageTree(info,fault_addr,(addr_t)(info->ctrl_regs.cr3));
189 // Check the guest page permissions
190 guest_pdpe_access = v3_can_access_pdpe64(guest_pdp, fault_addr, error_code);
192 // Check the shadow page permissions
193 shadow_pdpe_access = v3_can_access_pdpe64(shadow_pdp, fault_addr, error_code);
195 /* Was the page fault caused by the Guest's page tables? */
196 if (v3_is_guest_pf(guest_pdpe_access, shadow_pdpe_access) == 1) {
197 PrintDebug("Injecting PDPE pf to guest: (guest access error=%d) (pf error code=%d)\n",
198 *(uint_t *)&guest_pdpe_access, *(uint_t *)&error_code);
199 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
200 PrintError("Could not inject guest page fault\n");
206 if (shadow_pdpe_access == PT_ACCESS_USER_ERROR) {
208 // PML4 Entry marked non-user
210 PrintDebug("Shadow Paging User access error (shadow_pdpe_access=0x%x, guest_pdpe_access=0x%x)\n",
211 shadow_pdpe_access, guest_pdpe_access);
212 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
213 PrintError("Could not inject guest page fault\n");
217 } else if ((shadow_pdpe_access != PT_ACCESS_NOT_PRESENT) &&
218 (shadow_pdpe_access != PT_ACCESS_OK)) {
219 // inject page fault in guest
220 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
221 PrintError("Could not inject guest page fault\n");
224 PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pdpe_access);
225 PrintDebug("Manual Says to inject page fault into guest\n");
230 pde64_t * shadow_pd = NULL;
231 pde64_t * guest_pd = NULL;
233 // Get the next shadow page level, allocate if not present
235 if (shadow_pdpe_access == PT_ACCESS_NOT_PRESENT) {
236 struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
237 shadow_pd = (pde64_t *)V3_VAddr((void *)shdw_page->page_pa);
240 shadow_pdpe->present = 1;
241 shadow_pdpe->user_page = guest_pdpe->user_page;
242 shadow_pdpe->writable = guest_pdpe->writable;
243 shadow_pdpe->write_through = guest_pdpe->write_through;
244 shadow_pdpe->cache_disable = guest_pdpe->cache_disable;
247 guest_pdpe->accessed = 1;
249 shadow_pdpe->pd_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
251 shadow_pd = (pde64_t *)V3_VAddr((void *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pdpe->pd_base_addr));
254 // Continue processing at the next level
256 if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr), (addr_t *)&guest_pd) == -1) {
257 // Machine check the guest
258 PrintError("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr));
259 v3_raise_exception(info, MC_EXCEPTION);
263 if (handle_pde_shadow_pagefault_64(info, fault_addr, error_code, shadow_pd, guest_pd) == -1) {
264 PrintError("Error handling Page fault caused by PDE\n");
272 static int handle_pde_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
273 pde64_t * shadow_pd, pde64_t * guest_pd) {
274 pt_access_status_t guest_pde_access;
275 pt_access_status_t shadow_pde_access;
276 pde64_t * guest_pde = (pde64_t *)&(guest_pd[PDE64_INDEX(fault_addr)]);
277 pde64_t * shadow_pde = (pde64_t *)&(shadow_pd[PDE64_INDEX(fault_addr)]);
279 PrintDebug("Handling PDE fault\n");
281 // Check the guest page permissions
282 guest_pde_access = v3_can_access_pde64(guest_pd, fault_addr, error_code);
284 // Check the shadow page permissions
285 shadow_pde_access = v3_can_access_pde64(shadow_pd, fault_addr, error_code);
287 /* Was the page fault caused by the Guest's page tables? */
288 if (v3_is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
289 PrintDebug("Injecting PDE pf to guest: (guest access error=%d) (pf error code=%d)\n",
290 *(uint_t *)&guest_pde_access, *(uint_t *)&error_code);
291 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
292 PrintError("Could not inject guest page fault\n");
298 if (shadow_pde_access == PT_ACCESS_USER_ERROR) {
300 // PDE Entry marked non-user
302 PrintDebug("Shadow Paging User access error (shadow_pdpe_access=0x%x, guest_pdpe_access=0x%x)\n",
303 shadow_pde_access, guest_pde_access);
304 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
305 PrintError("Could not inject guest page fault\n");
310 } else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
311 (guest_pde->large_page == 1)) {
313 ((pde64_2MB_t *)guest_pde)->dirty = 1;
314 shadow_pde->writable = guest_pde->writable;
316 //PrintDebug("Returning due to large page Write Error\n");
317 //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
320 } else if ((shadow_pde_access != PT_ACCESS_NOT_PRESENT) &&
321 (shadow_pde_access != PT_ACCESS_OK)) {
322 // inject page fault in guest
323 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
324 PrintError("Could not inject guest page fault\n");
327 PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pde_access);
328 PrintDebug("Manual Says to inject page fault into guest\n");
333 pte64_t * shadow_pt = NULL;
334 pte64_t * guest_pt = NULL;
336 // Get the next shadow page level, allocate if not present
338 if (shadow_pde_access == PT_ACCESS_NOT_PRESENT) {
339 struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
340 shadow_pt = (pte64_t *)V3_VAddr((void *)shdw_page->page_pa);
342 PrintDebug("Creating new shadow PT: %p\n", shadow_pt);
344 shadow_pde->present = 1;
345 shadow_pde->user_page = guest_pde->user_page;
348 if (guest_pde->large_page == 0) {
349 shadow_pde->writable = guest_pde->writable;
351 // This large page flag is temporary until we can get a working cache....
352 ((pde64_2MB_t *)guest_pde)->vmm_info = V3_LARGE_PG;
354 if (error_code.write) {
355 shadow_pde->writable = guest_pde->writable;
356 ((pde64_2MB_t *)guest_pde)->dirty = 1;
358 shadow_pde->writable = 0;
359 ((pde64_2MB_t *)guest_pde)->dirty = 0;
363 // VMM Specific options
364 shadow_pde->write_through = guest_pde->write_through;
365 shadow_pde->cache_disable = guest_pde->cache_disable;
366 shadow_pde->global_page = guest_pde->global_page;
369 guest_pde->accessed = 1;
371 shadow_pde->pt_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
373 shadow_pt = (pte64_t *)V3_VAddr((void *)BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr));
376 // Continue processing at the next level
377 if (guest_pde->large_page == 0) {
378 if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t *)&guest_pt) == -1) {
379 // Machine check the guest
380 PrintError("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
381 v3_raise_exception(info, MC_EXCEPTION);
385 if (handle_pte_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
386 PrintError("Error handling Page fault caused by PDE\n");
390 if (handle_2MB_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, (pde64_2MB_t *)guest_pde) == -1) {
391 PrintError("Error handling large pagefault\n");
400 static int handle_pte_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
401 pte64_t * shadow_pt, pte64_t * guest_pt) {
402 pt_access_status_t guest_pte_access;
403 pt_access_status_t shadow_pte_access;
404 pte64_t * guest_pte = (pte64_t *)&(guest_pt[PTE64_INDEX(fault_addr)]);;
405 pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
406 addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
407 // struct shadow_page_state * state = &(info->shdw_pg_state);
409 PrintDebug("Handling PTE fault\n");
411 struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info->vm_info, info->cpu_id, guest_pa);
415 if (shdw_reg == NULL) {
416 // Inject a machine check in the guest
417 PrintError("Invalid Guest Address in page table (0x%p)\n", (void *)guest_pa);
418 v3_raise_exception(info, MC_EXCEPTION);
422 // Check the guest page permissions
423 guest_pte_access = v3_can_access_pte64(guest_pt, fault_addr, error_code);
425 // Check the shadow page permissions
426 shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
428 /* Was the page fault caused by the Guest's page tables? */
429 if (v3_is_guest_pf(guest_pte_access, shadow_pte_access) == 1) {
431 PrintDebug("Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n",
432 guest_pte_access, *(uint_t*)&error_code);
434 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
435 PrintError("Could not inject guest page fault\n");
443 if (shadow_pte_access == PT_ACCESS_OK) {
444 // Inconsistent state...
445 // Guest Re-Entry will flush page tables and everything should now work
446 PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
451 if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
452 // Page Table Entry Not Present
453 PrintDebug("guest_pa =%p\n", (void *)guest_pa);
455 if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
456 (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
457 addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, info->cpu_id, guest_pa);
459 shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
461 shadow_pte->present = guest_pte->present;
462 shadow_pte->user_page = guest_pte->user_page;
464 //set according to VMM policy
465 shadow_pte->write_through = guest_pte->write_through;
466 shadow_pte->cache_disable = guest_pte->cache_disable;
467 shadow_pte->global_page = guest_pte->global_page;
470 guest_pte->accessed = 1;
472 if (guest_pte->dirty == 1) {
473 shadow_pte->writable = guest_pte->writable;
474 } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
475 shadow_pte->writable = guest_pte->writable;
476 guest_pte->dirty = 1;
477 } else if ((guest_pte->dirty == 0) && (error_code.write == 0)) {
478 shadow_pte->writable = 0;
482 // Write hooks trump all, and are set Read Only
483 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
484 shadow_pte->writable = 0;
488 // Page fault handled by hook functions
490 if (v3_handle_mem_full_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
491 PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
495 } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
496 guest_pte->dirty = 1;
498 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
499 if (v3_handle_mem_wr_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
500 PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
504 PrintDebug("Shadow PTE Write Error\n");
505 shadow_pte->writable = guest_pte->writable;
512 // Inject page fault into the guest
513 if (v3_inject_guest_pf(info, fault_addr, error_code) == -1) {
514 PrintError("Could not inject guest page fault\n");
517 PrintError("PTE Page fault fell through... Not sure if this should ever happen\n");
518 PrintError("Manual Says to inject page fault into guest\n");
527 static int handle_2MB_shadow_pagefault_64(struct guest_info * info,
528 addr_t fault_addr, pf_error_t error_code,
529 pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde)
531 pt_access_status_t shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
532 pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
533 addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_2MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_2MB(fault_addr);
534 // struct shadow_page_state * state = &(info->shdw_pg_state);
536 PrintDebug("Handling 2MB fault (guest_fault_pa=%p) (error_code=%x)\n", (void *)guest_fault_pa, *(uint_t*)&error_code);
537 PrintDebug("ShadowPT=%p, LargeGuestPDE=%p\n", shadow_pt, large_guest_pde);
539 struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info->vm_info, info->cpu_id, guest_fault_pa);
542 if (shdw_reg == NULL) {
543 // Inject a machine check in the guest
544 PrintError("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
545 v3_raise_exception(info, MC_EXCEPTION);
549 if (shadow_pte_access == PT_ACCESS_OK) {
550 // Inconsistent state...
551 // Guest Re-Entry will flush tables and everything should now workd
552 PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
553 //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
558 if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
559 // Get the guest physical address of the fault
561 if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
562 (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
563 addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, info->cpu_id, guest_fault_pa);
565 shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
567 shadow_pte->present = 1;
569 /* We are assuming that the PDE entry has precedence
570 * so the Shadow PDE will mirror the guest PDE settings,
571 * and we don't have to worry about them here
574 shadow_pte->user_page = 1;
576 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
577 shadow_pte->writable = 0;
579 shadow_pte->writable = 1;
582 //set according to VMM policy
583 shadow_pte->write_through = large_guest_pde->write_through;
584 shadow_pte->cache_disable = large_guest_pde->cache_disable;
585 shadow_pte->global_page = large_guest_pde->global_page;
589 if (v3_handle_mem_full_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
590 PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
594 } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
596 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
598 if (v3_handle_mem_wr_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
599 PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
605 PrintError("Error in large page fault handler...\n");
606 PrintError("This case should have been handled at the top level handler\n");
610 // PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
611 PrintDebug("Returning from large page fault handler\n");
618 static int invalidation_cb_64(struct guest_info * info, page_type_t type,
619 addr_t vaddr, addr_t page_ptr, addr_t page_pa,
620 void * private_data) {
625 pml4e64_t * pml = (pml4e64_t *)page_ptr;
627 if (pml[PML4E64_INDEX(vaddr)].present == 0) {
634 pdpe64_t * pdp = (pdpe64_t *)page_ptr;
635 pdpe64_t * pdpe = &(pdp[PDPE64_INDEX(vaddr)]);
637 if (pdpe->present == 0) {
641 if (pdpe->vmm_info == V3_LARGE_PG) {
642 PrintError("1 Gigabyte pages not supported\n");
653 pde64_t * pd = (pde64_t *)page_ptr;
654 pde64_t * pde = &(pd[PDE64_INDEX(vaddr)]);
656 if (pde->present == 0) {
660 if (pde->vmm_info == V3_LARGE_PG) {
669 pte64_t * pt = (pte64_t *)page_ptr;
671 pt[PTE64_INDEX(vaddr)].present = 0;
676 PrintError("Invalid Page Type\n");
681 // should not get here
682 PrintError("Should not get here....\n");
687 static inline int handle_shadow_invlpg_64(struct guest_info * info, addr_t vaddr) {
688 PrintDebug("INVLPG64 - %p\n",(void*)vaddr);
690 int ret = v3_drill_host_pt_64(info, info->ctrl_regs.cr3, vaddr, invalidation_cb_64, NULL);
692 PrintError("Page table drill returned error.... \n");
693 PrintHostPageTree(info, vaddr, info->ctrl_regs.cr3);
696 return (ret == -1) ? -1 : 0;