1 #include <palacios/vmm_shadow_paging.h>
4 #include <palacios/vmm.h>
5 #include <palacios/vm_guest_mem.h>
6 #include <palacios/vmm_decoder.h>
10 int init_shadow_page_state(struct shadow_page_state * state) {
11 state->guest_mode = PDE32;
12 state->shadow_mode = PDE32;
15 state->shadow_cr3 = 0;
20 int handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
22 if (info->mem_mode == PHYSICAL_MEM) {
23 // If paging is not turned on we need to handle the special cases
24 return handle_special_page_fault(info, fault_addr, error_code);
25 } else if (info->mem_mode == VIRTUAL_MEM) {
27 switch (info->cpu_mode) {
29 return handle_shadow_pagefault32(info, fault_addr, error_code);
33 // currently not handled
40 PrintDebug("Invalid Memory mode\n");
45 addr_t create_new_shadow_pt32(struct guest_info * info) {
48 V3_AllocPages(host_pde, 1);
49 memset(host_pde, 0, PAGE_SIZE);
51 return (addr_t)host_pde;
55 static int handle_pd32_nonaligned_4MB_page(struct guest_info * info, pte32_t * pt, addr_t guest_addr, pde32_4MB_t * large_shadow_pde) {
60 for (i = 0; i < 1024; i++) {
61 guest_pa = guest_addr + (PAGE_SIZE * i);
62 host_region_type_t host_page_type = get_shadow_addr_type(info, guest_pa);
64 pte_cursor = &(pt[i]);
66 if (host_page_type == HOST_REGION_INVALID) {
67 // Currently we don't support this, but in theory we could
68 PrintDebug("Invalid Host Memory Type\n");
70 } else if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
71 addr_t shadow_pa = get_shadow_addr(info, guest_pa);
74 pte_cursor->page_base_addr = PT32_BASE_ADDR(shadow_pa);
75 pte_cursor->present = 1;
76 pte_cursor->writable = large_shadow_pde->writable;
77 pte_cursor->user_page = large_shadow_pde->user_page;
78 pte_cursor->write_through = 0;
79 pte_cursor->cache_disable = 0;
80 pte_cursor->global_page = 0;
83 PrintDebug("Unsupported Host Memory Type\n");
90 int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
91 pde32_t * guest_pd = NULL;
92 pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
93 addr_t guest_cr3 = CR3_TO_PDE32(info->shdw_pg_state.guest_cr3);
94 pt_access_status_t guest_pde_access;
95 pt_access_status_t shadow_pde_access;
96 pde32_t * guest_pde = NULL;
97 pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(fault_addr)]);
99 if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
100 PrintDebug("Invalid Guest PDE Address: 0x%x\n", guest_cr3);
105 guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(fault_addr)]);
107 // Check the guest page permissions
108 guest_pde_access = can_access_pde32(guest_pd, fault_addr, error_code);
110 // Check the shadow page permissions
111 shadow_pde_access = can_access_pde32(shadow_pd, fault_addr, error_code);
113 /* This should be redone,
114 but basically the reasoning is that there can be multiple reasons for a page fault:
115 If there is a permissions failure for a page present in the guest _BUT_
116 the reason for the fault was that the page is not present in the shadow,
117 _THEN_ we have to map the shadow page in and reexecute, this will generate
118 a permissions fault which is _THEN_ valid to send to the guest
122 if ((guest_pde_access != PT_ACCESS_OK) &&
123 ( (shadow_pde_access != PT_ENTRY_NOT_PRESENT) &&
124 (guest_pde_access != PT_ENTRY_NOT_PRESENT))) { // aka (guest permission error)
125 // inject page fault to the guest (Guest PDE fault)
127 info->ctrl_regs.cr2 = fault_addr;
128 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
131 PrintDebug("Injecting PDE pf to guest: (guest access error=%d) (pf error code=%d)\n", guest_pde_access, error_code);
134 PrintDebug("Guest CR3=%x\n", guest_cr3);
135 PrintDebug("Guest PD\n");
137 PrintDebug("Shadow PD\n");
138 PrintPD32(shadow_pd);
145 //shadow_pde_access = can_access_pde32(shadow_pd, fault_addr, error_code);
148 if (shadow_pde_access == PT_ENTRY_NOT_PRESENT) {
150 shadow_pde->present = 1;
151 shadow_pde->user_page = guest_pde->user_page;
152 shadow_pde->large_page = guest_pde->large_page;
155 // VMM Specific options
156 shadow_pde->write_through = 0;
157 shadow_pde->cache_disable = 0;
158 shadow_pde->global_page = 0;
161 guest_pde->accessed = 1;
163 if (guest_pde->large_page == 0) {
164 pte32_t * shadow_pt = NULL;
166 V3_AllocPages(shadow_pt, 1);
167 memset(shadow_pt, 0, PAGE_SIZE);
169 shadow_pde->pt_base_addr = PD32_BASE_ADDR(shadow_pt);
171 shadow_pde->writable = guest_pde->writable;
173 struct shadow_region * mem_reg;
174 pde32_4MB_t * large_guest_pde = (pde32_4MB_t *)guest_pde;
175 pde32_4MB_t * large_shadow_pde = (pde32_4MB_t *)shadow_pde;
176 host_region_type_t host_page_type;
177 addr_t guest_start_addr = PDE32_4MB_T_ADDR(*large_guest_pde);
178 // addr_t guest_end_addr = guest_start_addr + PAGE_SIZE_4MB; // start address + 4MB
181 // Check that the Guest PDE entry points to valid memory
182 // else Machine Check the guest
183 PrintDebug("Large Page: Page Base Addr=%x\n", guest_start_addr);
185 host_page_type = get_shadow_addr_type(info, guest_start_addr);
187 if (host_page_type == HOST_REGION_INVALID) {
189 raise_exception(info, MC_EXCEPTION);
190 PrintDebug("Invalid guest address in large page (0x%x)\n", guest_start_addr);
192 } else if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
193 addr_t host_start_addr = 0;
194 addr_t region_end_addr = 0;
196 // Check for a large enough region in host memory
197 mem_reg = get_shadow_region_by_addr(&(info->mem_map), guest_start_addr);
198 PrintDebug("Host region: host_addr=%x (guest_start=%x, end=%x)\n",
199 mem_reg->host_addr, mem_reg->guest_start, mem_reg->guest_end);
200 host_start_addr = mem_reg->host_addr + (guest_start_addr - mem_reg->guest_start);
201 region_end_addr = mem_reg->host_addr + (mem_reg->guest_end - mem_reg->guest_start);
203 PrintDebug("Host Start Addr=%x; Region End Addr=%x\n", host_start_addr, region_end_addr);
209 if (large_guest_pde->dirty == 1) { // dirty
210 large_shadow_pde->writable = guest_pde->writable;
211 } else if (error_code.write == 1) { // not dirty, access is write
212 large_shadow_pde->writable = guest_pde->writable;
213 large_guest_pde->dirty = 1;
214 } else { // not dirty, access is read
215 large_shadow_pde->writable = 0;
219 // Check if the region is at least an additional 4MB
223 if ((PD32_4MB_PAGE_OFFSET(host_start_addr) == 0) &&
224 (region_end_addr >= host_start_addr + PAGE_SIZE_4MB)) { // if 4MB boundary
225 large_shadow_pde->page_base_addr = PD32_4MB_BASE_ADDR(host_start_addr);
226 } else { // else generate 4k pages
227 pte32_t * shadow_pt = NULL;
228 PrintDebug("Handling non aligned large page\n");
230 shadow_pde->large_page = 0;
232 V3_AllocPages(shadow_pt, 1);
233 memset(shadow_pt, 0, PAGE_SIZE);
235 if (handle_pd32_nonaligned_4MB_page(info, shadow_pt, guest_start_addr, large_shadow_pde) == -1) {
236 PrintDebug("Non Aligned Large Page Error\n");
243 PrintDebug("non-aligned Shadow PT\n");
244 PrintPT32(PT32_PAGE_ADDR(fault_addr), shadow_pt);
246 shadow_pde->pt_base_addr = PD32_BASE_ADDR(shadow_pt);
251 // Handle hooked pages as well as other special pages
252 if (handle_special_page_fault(info, fault_addr, error_code) == -1) {
253 PrintDebug("Special Page Fault handler returned error for address: %x\n", fault_addr);
259 } else if ((shadow_pde_access == PT_WRITE_ERROR) &&
260 (guest_pde->large_page = 1) &&
261 (((pde32_4MB_t *)guest_pde)->dirty == 0)) {
264 // Page Directory Entry marked read-only
267 ((pde32_4MB_t *)guest_pde)->dirty = 1;
268 shadow_pde->writable = guest_pde->writable;
271 } else if (shadow_pde_access == PT_USER_ERROR) {
274 // Page Directory Entry marked non-user
277 PrintDebug("Shadow Paging User access error (shadow_pde_access=0x%x, guest_pde_access=0x%x - injecting into guest\n", shadow_pde_access, guest_pde_access);
278 info->ctrl_regs.cr2 = fault_addr;
279 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
282 } else if (shadow_pde_access == PT_ACCESS_OK) {
283 pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde));
284 pte32_t * guest_pt = NULL;
286 // Page Table Entry fault
288 if (guest_pa_to_host_va(info, PDE32_T_ADDR((*guest_pde)), (addr_t*)&guest_pt) == -1) {
289 PrintDebug("Invalid Guest PTE Address: 0x%x\n", PDE32_T_ADDR((*guest_pde)));
290 // Machine check the guest
292 raise_exception(info, MC_EXCEPTION);
298 if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
299 PrintDebug("Error handling Page fault caused by PTE\n");
304 // Unknown error raise page fault in guest
305 info->ctrl_regs.cr2 = fault_addr;
306 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
308 // For debugging we will return an error here for the time being,
309 // this probably shouldn't ever happen
310 PrintDebug("Unknown Error occurred\n");
311 PrintDebug("Manual Says to inject page fault into guest\n");
312 //return -1; Huh? It's a successful handling of the fault...
316 //PrintDebugPageTables(shadow_pd);
317 PrintDebug("Returning end of PDE function (rip=%x)\n", info->rip);
324 * We assume the the guest pte pointer has already been translated to a host virtual address
326 int handle_shadow_pte32_fault(struct guest_info * info,
328 pf_error_t error_code,
330 pte32_t * guest_pt) {
332 pt_access_status_t guest_pte_access;
333 pt_access_status_t shadow_pte_access;
334 pte32_t * guest_pte = (pte32_t *)&(guest_pt[PTE32_INDEX(fault_addr)]);;
335 pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
338 // Check the guest page permissions
339 guest_pte_access = can_access_pte32(guest_pt, fault_addr, error_code);
341 // Check the shadow page permissions
342 shadow_pte_access = can_access_pte32(shadow_pt, fault_addr, error_code);
344 /* This should be redone,
345 but basically the reasoning is that there can be multiple reasons for a page fault:
346 If there is a permissions failure for a page present in the guest _BUT_
347 the reason for the fault was that the page is not present in the shadow,
348 _THEN_ we have to map the shadow page in and reexecute, this will generate
349 a permissions fault which is _THEN_ valid to send to the guest
353 if ((guest_pte_access != PT_ACCESS_OK) &&
354 ((shadow_pte_access != PT_ENTRY_NOT_PRESENT) &&
355 (guest_pte_access != PT_ENTRY_NOT_PRESENT))) { // aka (guest permission error)
356 // Inject page fault into the guest
358 info->ctrl_regs.cr2 = fault_addr;
359 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
361 PrintDebug("Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n", guest_pte_access, error_code);
368 if (shadow_pte_access == PT_ACCESS_OK) {
369 // Inconsistent state...
370 // Guest Re-Entry will flush page tables and everything should now work
371 PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
373 } else if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
375 addr_t guest_pa = PTE32_T_ADDR((*guest_pte));
377 // Page Table Entry Not Present
379 host_region_type_t host_page_type = get_shadow_addr_type(info, guest_pa);
381 if (host_page_type == HOST_REGION_INVALID) {
382 // Inject a machine check in the guest
384 raise_exception(info, MC_EXCEPTION);
386 PrintDebug("Invalid Guest Address in page table (0x%x)\n", guest_pa);
387 PrintDebug("fault_addr=0x%x next are guest and shadow ptes \n",fault_addr);
388 PrintPTE32(fault_addr,guest_pte);
389 PrintPTE32(fault_addr,shadow_pte);
390 PrintDebug("Done.\n");
393 } else if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
395 shadow_pa = get_shadow_addr(info, guest_pa);
397 shadow_pte->page_base_addr = PT32_BASE_ADDR(shadow_pa);
399 shadow_pte->present = guest_pte->present;
400 shadow_pte->user_page = guest_pte->user_page;
402 //set according to VMM policy
403 shadow_pte->write_through = 0;
404 shadow_pte->cache_disable = 0;
405 shadow_pte->global_page = 0;
408 guest_pte->accessed = 1;
410 if (guest_pte->dirty == 1) {
411 shadow_pte->writable = guest_pte->writable;
412 } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
413 shadow_pte->writable = guest_pte->writable;
414 guest_pte->dirty = 1;
415 } else if ((guest_pte->dirty = 0) && (error_code.write == 0)) {
416 shadow_pte->writable = 0;
419 // Page fault handled by hook functions
420 if (handle_special_page_fault(info, fault_addr, error_code) == -1) {
421 PrintDebug("Special Page fault handler returned error for address: %x\n", fault_addr);
426 } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
427 (guest_pte->dirty == 0)) {
428 guest_pte->dirty = 1;
429 shadow_pte->writable = guest_pte->writable;
431 PrintDebug("Shadow PTE Write Error\n");
435 // Inject page fault into the guest
437 info->ctrl_regs.cr2 = fault_addr;
438 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
440 PrintDebug("PTE Page fault fell through... Not sure if this should ever happen\n");
441 PrintDebug("Manual Says to inject page fault into guest\n");
445 PrintDebug("Returning end of function\n");
454 /* Currently Does not work with Segmentation!!! */
455 int handle_shadow_invlpg(struct guest_info * info) {
456 if (info->mem_mode != VIRTUAL_MEM) {
457 // Paging must be turned on...
458 // should handle with some sort of fault I think
459 PrintDebug("ERROR: INVLPG called in non paged mode\n");
464 if (info->cpu_mode == PROTECTED) {
469 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
471 PrintDebug("Could not read instruction 0x%x (ret=%d)\n", info->rip, ret);
476 /* Can INVLPG work with Segments?? */
477 while (is_prefix_byte(instr[index])) {
482 if ((instr[index] == (uchar_t)0x0f) &&
483 (instr[index + 1] == (uchar_t)0x01)) {
485 addr_t first_operand;
486 addr_t second_operand;
487 operand_type_t addr_type;
488 addr_t guest_cr3 = CR3_TO_PDE32(info->shdw_pg_state.guest_cr3);
490 pde32_t * guest_pd = NULL;
492 if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
493 PrintDebug("Invalid Guest PDE Address: 0x%x\n", guest_cr3);
502 addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
504 if (addr_type == MEM_OPERAND) {
505 pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
506 pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
509 //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
510 //PrintDebug("FirstOperand = %x\n", first_operand);
512 PrintDebug("Invalidating page for %x\n", first_operand);
514 guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(first_operand)]);
516 if (guest_pde->large_page == 1) {
517 shadow_pde->present = 0;
518 PrintDebug("Invalidating Large Page\n");
521 if (shadow_pde->present == 1) {
522 pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde));
523 pte32_t * shadow_pte = (pte32_t *)&shadow_pt[PTE32_INDEX(first_operand)];
524 PrintDebug("Setting not present\n");
525 PrintPTE32(first_operand, shadow_pte);
526 shadow_pte->present = 0;
533 PrintDebug("Invalid Operand type\n");
537 PrintDebug("invalid Instruction Opcode\n");
538 PrintTraceMemDump(instr, 15);
550 addr_t setup_shadow_pt32(struct guest_info * info, addr_t virt_cr3) {
551 addr_t cr3_guest_addr = CR3_TO_PDE32(virt_cr3);
553 pde32_t * host_pde = NULL;
556 // Setup up guest_pde to point to the PageDir in host addr
557 if (guest_pa_to_host_va(info, cr3_guest_addr, (addr_t*)&guest_pde) == -1) {
561 V3_AllocPages(host_pde, 1);
562 memset(host_pde, 0, PAGE_SIZE);
564 for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
565 if (guest_pde[i].present == 1) {
569 if (guest_pa_to_host_va(info, PDE32_T_ADDR(guest_pde[i]), &pt_host_addr) == -1) {
573 if ((host_pte = setup_shadow_pte32(info, pt_host_addr)) == 0) {
577 host_pde[i].present = 1;
578 host_pde[i].pt_base_addr = PD32_BASE_ADDR(host_pte);
581 // Set Page DIR flags
586 PrintDebugPageTables(host_pde);
588 return (addr_t)host_pde;
593 addr_t setup_shadow_pte32(struct guest_info * info, addr_t pt_host_addr) {
594 pte32_t * guest_pte = (pte32_t *)pt_host_addr;
595 pte32_t * host_pte = NULL;
598 V3_AllocPages(host_pte, 1);
599 memset(host_pte, 0, PAGE_SIZE);
601 for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
602 if (guest_pte[i].present == 1) {
603 addr_t guest_pa = PTE32_T_ADDR(guest_pte[i]);
604 shadow_mem_type_t page_type;
607 page_type = get_shadow_addr_type(info, guest_pa);
609 if (page_type == HOST_REGION_PHYSICAL_MEMORY) {
610 host_pa = get_shadow_addr(info, guest_pa);
614 // Setup various memory types
618 host_pte[i].page_base_addr = PT32_BASE_ADDR(host_pa);
619 host_pte[i].present = 1;
623 return (addr_t)host_pte;