1 #include <palacios/vmm_shadow_paging.h>
4 #include <palacios/vmm.h>
5 #include <palacios/vm_guest_mem.h>
10 int init_shadow_page_state(struct shadow_page_state * state) {
11 state->guest_mode = PDE32;
12 state->shadow_mode = PDE32;
15 state->shadow_cr3 = 0;
20 int handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
21 if (info->cpu_mode == PROTECTED_PG) {
22 return handle_shadow_pagefault32(info, fault_addr, error_code);
29 int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
30 pde32_t * guest_pde = NULL;
31 pde32_t * shadow_pde = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
32 addr_t guest_cr3 = CR3_TO_PDE32(info->shdw_pg_state.guest_cr3);
33 pt_access_status_t guest_pde_access;
34 pt_access_status_t shadow_pde_access;
35 pde32_t * guest_pde_entry = NULL;
36 pde32_t * shadow_pde_entry = (pde32_t *)&(shadow_pde[PDE32_INDEX(fault_addr)]);
38 if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pde) == -1) {
39 PrintDebug("Invalid Guest PDE Address: 0x%x\n", guest_cr3);
44 guest_pde_entry = (pde32_t *)&(guest_pde[PDE32_INDEX(fault_addr)]);
46 // Check the guest page permissions
47 guest_pde_access = can_access_pde32(guest_pde, fault_addr, error_code);
49 if (guest_pde_access != PT_ACCESS_OK) {
52 // inject page fault to the guest (Guest PDE fault)
55 PrintDebug("Guest Page fault (currently not handled)\n");
59 shadow_pde_access = can_access_pde32(shadow_pde, fault_addr, error_code);
62 if (shadow_pde_access == PT_ENTRY_NOT_PRESENT) {
63 pte32_t * shadow_pte = NULL;
65 V3_AllocPages(shadow_pte, 1);
66 memset(shadow_pte, 0, PAGE_SIZE);
68 shadow_pde_entry->pt_base_addr = PD32_BASE_ADDR(shadow_pte);
71 shadow_pde_entry->present = 1;
72 shadow_pde_entry->user_page = guest_pde_entry->user_page;
74 // VMM Specific options
75 shadow_pde_entry->write_through = 0;
76 shadow_pde_entry->cache_disable = 0;
77 shadow_pde_entry->global_page = 0;
80 guest_pde_entry->accessed = 1;
82 if (guest_pde_entry->large_page == 0) {
83 shadow_pde_entry->writable = guest_pde_entry->writable;
86 * Check the Intel manual because we are ignoring Large Page issues here
90 } else if (shadow_pde_access == PT_WRITE_ERROR) {
93 // Page Directory Entry marked read-only
96 PrintDebug("Shadow Paging Write Error\n");
98 } else if (shadow_pde_access == PT_USER_ERROR) {
101 // Page Directory Entry marked non-user
104 PrintDebug("Shadow Paging User access error\n");
106 } else if (shadow_pde_access == PT_ACCESS_OK) {
107 pte32_t * shadow_pte = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
108 pte32_t * guest_pte = NULL;
110 // Page Table entry fault
112 if (guest_pa_to_host_va(info, PDE32_T_ADDR((*guest_pde_entry)), (addr_t*)&guest_pte) == -1) {
113 PrintDebug("Invalid Guest PTE Address: 0x%x\n", PDE32_T_ADDR((*guest_pde_entry)));
118 if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pte, guest_pte) == -1) {
119 PrintDebug("Error handling Page fault caused by PTE\n");
124 PrintDebug("Unknown Error\n");
128 PrintDebugPageTables(shadow_pde);
136 * We assume the the guest pte pointer has already been translated to a host virtual address
138 int handle_shadow_pte32_fault(struct guest_info* info,
140 pf_error_t error_code,
141 pte32_t * shadow_pte,
142 pte32_t * guest_pte) {
144 pt_access_status_t guest_pte_access;
145 pt_access_status_t shadow_pte_access;
146 pte32_t * guest_pte_entry = (pte32_t *)&(guest_pte[PTE32_INDEX(fault_addr)]);;
147 pte32_t * shadow_pte_entry = (pte32_t *)&(shadow_pte[PTE32_INDEX(fault_addr)]);
150 // Check the guest page permissions
151 guest_pte_access = can_access_pte32(guest_pte, fault_addr, error_code);
153 if (guest_pte_access != PT_ACCESS_OK) {
156 // Inject page fault into the guest
159 PrintDebug("Guest Page fault (currently not handled)\n");
163 shadow_pte_access = can_access_pte32(shadow_pte, fault_addr, error_code);
165 if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
167 addr_t guest_pa = PTE32_T_ADDR((*guest_pte_entry));
169 // Page Table Entry Not Present
171 if (get_shadow_addr_type(info, guest_pa) == HOST_REGION_INVALID) {
174 // Inject a machine check in the guest
177 PrintDebug("Invalid Guest Address in page table (0x%x)\n", guest_pa);
181 shadow_pa = get_shadow_addr(info, guest_pa);
183 shadow_pte_entry->page_base_addr = PT32_BASE_ADDR(shadow_pa);
185 shadow_pte_entry->present = guest_pte_entry->present;
186 shadow_pte_entry->user_page = guest_pte_entry->user_page;
188 //set according to VMM policy
189 shadow_pte_entry->write_through = 0;
190 shadow_pte_entry->cache_disable = 0;
191 shadow_pte_entry->global_page = 0;
194 guest_pte_entry->accessed = 1;
196 if (guest_pte_entry->dirty == 1) {
197 shadow_pte_entry->writable = guest_pte_entry->writable;
198 } else if ((guest_pte_entry->dirty == 0) && (error_code.write == 1)) {
199 shadow_pte_entry->writable = guest_pte_entry->writable;
200 guest_pte_entry->dirty = 1;
201 } else if ((guest_pte_entry->dirty = 0) && (error_code.write == 0)) {
202 shadow_pte_entry->writable = 0;
205 } else if (shadow_pte_access == PT_WRITE_ERROR) {
208 // Page Table Entry marked read-only
211 PrintDebug("Shadow Paging Write Error\n");
213 } else if (shadow_pte_access == PT_USER_ERROR) {
216 // Page Table Entry marked non-user
219 PrintDebug("Shadow Paging User access error\n");
221 } else if (shadow_pte_access == PT_ACCESS_OK) {
223 PrintDebug("Page Fault occurred for No Reason\n");
226 PrintDebug("Unknown Error\n");
235 addr_t create_new_shadow_pt32(struct guest_info * info) {
238 V3_AllocPages(host_pde, 1);
239 memset(host_pde, 0, PAGE_SIZE);
241 return (addr_t)host_pde;
247 addr_t setup_shadow_pt32(struct guest_info * info, addr_t virt_cr3) {
248 addr_t cr3_guest_addr = CR3_TO_PDE32(virt_cr3);
250 pde32_t * host_pde = NULL;
253 // Setup up guest_pde to point to the PageDir in host addr
254 if (guest_pa_to_host_va(info, cr3_guest_addr, (addr_t*)&guest_pde) == -1) {
258 V3_AllocPages(host_pde, 1);
259 memset(host_pde, 0, PAGE_SIZE);
261 for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
262 if (guest_pde[i].present == 1) {
266 if (guest_pa_to_host_va(info, PDE32_T_ADDR(guest_pde[i]), &pt_host_addr) == -1) {
270 if ((host_pte = setup_shadow_pte32(info, pt_host_addr)) == 0) {
274 host_pde[i].present = 1;
275 host_pde[i].pt_base_addr = PD32_BASE_ADDR(host_pte);
278 // Set Page DIR flags
283 PrintDebugPageTables(host_pde);
285 return (addr_t)host_pde;
290 addr_t setup_shadow_pte32(struct guest_info * info, addr_t pt_host_addr) {
291 pte32_t * guest_pte = (pte32_t *)pt_host_addr;
292 pte32_t * host_pte = NULL;
295 V3_AllocPages(host_pte, 1);
296 memset(host_pte, 0, PAGE_SIZE);
298 for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
299 if (guest_pte[i].present == 1) {
300 addr_t guest_pa = PTE32_T_ADDR(guest_pte[i]);
301 shadow_mem_type_t page_type;
304 page_type = get_shadow_addr_type(info, guest_pa);
306 if (page_type == HOST_REGION_PHYSICAL_MEMORY) {
307 host_pa = get_shadow_addr(info, guest_pa);
311 // Setup various memory types
315 host_pte[i].page_base_addr = PT32_BASE_ADDR(host_pa);
316 host_pte[i].present = 1;
320 return (addr_t)host_pte;