1 #include <palacios/vmm_shadow_paging.h>
4 #include <palacios/vmm.h>
5 #include <palacios/vm_guest_mem.h>
6 #include <palacios/vmm_decoder.h>
10 int init_shadow_page_state(struct shadow_page_state * state) {
11 state->guest_mode = PDE32;
12 state->shadow_mode = PDE32;
15 state->shadow_cr3 = 0;
20 int handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
22 if (info->mem_mode == PHYSICAL_MEM) {
23 // If paging is not turned on we need to handle the special cases
24 return handle_special_page_fault(info, fault_addr, error_code);
25 } else if (info->mem_mode == VIRTUAL_MEM) {
27 switch (info->cpu_mode) {
29 return handle_shadow_pagefault32(info, fault_addr, error_code);
33 // currently not handled
40 PrintDebug("Invalid Memory mode\n");
46 int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
47 pde32_t * guest_pde = NULL;
48 pde32_t * shadow_pde = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
49 addr_t guest_cr3 = CR3_TO_PDE32(info->shdw_pg_state.guest_cr3);
50 pt_access_status_t guest_pde_access;
51 pt_access_status_t shadow_pde_access;
52 pde32_t * guest_pde_entry = NULL;
53 pde32_t * shadow_pde_entry = (pde32_t *)&(shadow_pde[PDE32_INDEX(fault_addr)]);
55 if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pde) == -1) {
56 PrintDebug("Invalid Guest PDE Address: 0x%x\n", guest_cr3);
61 guest_pde_entry = (pde32_t *)&(guest_pde[PDE32_INDEX(fault_addr)]);
63 // Check the guest page permissions
64 guest_pde_access = can_access_pde32(guest_pde, fault_addr, error_code);
66 if (guest_pde_access != PT_ACCESS_OK) {
67 // inject page fault to the guest (Guest PDE fault)
69 info->ctrl_regs.cr2 = fault_addr;
70 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
75 shadow_pde_access = can_access_pde32(shadow_pde, fault_addr, error_code);
78 if (shadow_pde_access == PT_ENTRY_NOT_PRESENT) {
79 pte32_t * shadow_pte = NULL;
81 V3_AllocPages(shadow_pte, 1);
82 memset(shadow_pte, 0, PAGE_SIZE);
84 shadow_pde_entry->pt_base_addr = PD32_BASE_ADDR(shadow_pte);
87 shadow_pde_entry->present = 1;
88 shadow_pde_entry->user_page = guest_pde_entry->user_page;
90 // VMM Specific options
91 shadow_pde_entry->write_through = 0;
92 shadow_pde_entry->cache_disable = 0;
93 shadow_pde_entry->global_page = 0;
96 guest_pde_entry->accessed = 1;
98 if (guest_pde_entry->large_page == 0) {
99 shadow_pde_entry->writable = guest_pde_entry->writable;
102 * Check the Intel manual because we are ignoring Large Page issues here
103 * Also be wary of hooked pages
107 } else if (shadow_pde_access == PT_WRITE_ERROR) {
110 // Page Directory Entry marked read-only
113 PrintDebug("Shadow Paging Write Error\n");
115 } else if (shadow_pde_access == PT_USER_ERROR) {
118 // Page Directory Entry marked non-user
121 PrintDebug("Shadow Paging User access error\n");
123 } else if (shadow_pde_access == PT_ACCESS_OK) {
124 pte32_t * shadow_pte = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
125 pte32_t * guest_pte = NULL;
127 // Page Table Entry fault
129 if (guest_pa_to_host_va(info, PDE32_T_ADDR((*guest_pde_entry)), (addr_t*)&guest_pte) == -1) {
130 PrintDebug("Invalid Guest PTE Address: 0x%x\n", PDE32_T_ADDR((*guest_pde_entry)));
131 // Machine check the guest
133 raise_exception(info, MC_EXCEPTION);
139 if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pte, guest_pte) == -1) {
140 PrintDebug("Error handling Page fault caused by PTE\n");
145 // Unknown error raise page fault in guest
146 info->ctrl_regs.cr2 = fault_addr;
147 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
149 // For debugging we will return an error here for the time being,
150 // this probably shouldn't ever happen
151 PrintDebug("Unknown Error occurred\n");
152 PrintDebug("Manual Says to inject page fault into guest\n");
156 //PrintDebugPageTables(shadow_pde);
164 * We assume the the guest pte pointer has already been translated to a host virtual address
166 int handle_shadow_pte32_fault(struct guest_info * info,
168 pf_error_t error_code,
169 pte32_t * shadow_pte,
170 pte32_t * guest_pte) {
172 pt_access_status_t guest_pte_access;
173 pt_access_status_t shadow_pte_access;
174 pte32_t * guest_pte_entry = (pte32_t *)&(guest_pte[PTE32_INDEX(fault_addr)]);;
175 pte32_t * shadow_pte_entry = (pte32_t *)&(shadow_pte[PTE32_INDEX(fault_addr)]);
178 // Check the guest page permissions
179 guest_pte_access = can_access_pte32(guest_pte, fault_addr, error_code);
182 if (guest_pte_access != PT_ACCESS_OK) {
183 // Inject page fault into the guest
185 info->ctrl_regs.cr2 = fault_addr;
186 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
192 shadow_pte_access = can_access_pte32(shadow_pte, fault_addr, error_code);
194 if (shadow_pte_access == PT_ACCESS_OK) {
195 // Inconsistent state...
196 // Guest Re-Entry will flush page tables and everything should now work
198 } else if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
200 addr_t guest_pa = PTE32_T_ADDR((*guest_pte_entry));
202 // Page Table Entry Not Present
204 host_region_type_t host_page_type = get_shadow_addr_type(info, guest_pa);
206 if (host_page_type == HOST_REGION_INVALID) {
207 // Inject a machine check in the guest
209 raise_exception(info, MC_EXCEPTION);
211 PrintDebug("Invalid Guest Address in page table (0x%x)\n", guest_pa);
214 } else if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
216 shadow_pa = get_shadow_addr(info, guest_pa);
218 shadow_pte_entry->page_base_addr = PT32_BASE_ADDR(shadow_pa);
220 shadow_pte_entry->present = guest_pte_entry->present;
221 shadow_pte_entry->user_page = guest_pte_entry->user_page;
223 //set according to VMM policy
224 shadow_pte_entry->write_through = 0;
225 shadow_pte_entry->cache_disable = 0;
226 shadow_pte_entry->global_page = 0;
229 guest_pte_entry->accessed = 1;
231 if (guest_pte_entry->dirty == 1) {
232 shadow_pte_entry->writable = guest_pte_entry->writable;
233 } else if ((guest_pte_entry->dirty == 0) && (error_code.write == 1)) {
234 shadow_pte_entry->writable = guest_pte_entry->writable;
235 guest_pte_entry->dirty = 1;
236 } else if ((guest_pte_entry->dirty = 0) && (error_code.write == 0)) {
237 shadow_pte_entry->writable = 0;
240 // Page fault handled by hook functions
241 if (handle_special_page_fault(info, fault_addr, error_code) == -1) {
242 PrintDebug("Special Page fault handler returned error for address: %x\n", fault_addr);
247 } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
248 (guest_pte_entry->dirty == 0)) {
249 guest_pte_entry->dirty = 1;
250 shadow_pte_entry->writable = guest_pte_entry->writable;
254 // Inject page fault into the guest
256 info->ctrl_regs.cr2 = fault_addr;
257 raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
259 PrintDebug("PTE Page fault fell through... Not sure if this should ever happen\n");
260 PrintDebug("Manual Says to inject page fault into guest\n");
269 addr_t create_new_shadow_pt32(struct guest_info * info) {
272 V3_AllocPages(host_pde, 1);
273 memset(host_pde, 0, PAGE_SIZE);
275 return (addr_t)host_pde;
280 /* Currently Does not work with Segmentation!!! */
281 int handle_shadow_invlpg(struct guest_info * info) {
282 if (info->mem_mode != VIRTUAL_MEM) {
283 // Paging must be turned on...
284 // should handle with some sort of fault I think
285 PrintDebug("ERROR: INVLPG called in non paged mode\n");
290 if (info->cpu_mode == PROTECTED) {
295 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
297 PrintDebug("Could not read instruction 0x%x (ret=%d)\n", info->rip, ret);
302 /* Can INVLPG work with Segments?? */
303 while (is_prefix_byte(instr[index])) {
308 if ((instr[index] == (uchar_t)0x0f) &&
309 (instr[index + 1] == (uchar_t)0x01)) {
311 addr_t first_operand;
312 addr_t second_operand;
313 operand_type_t addr_type;
317 addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
319 if (addr_type == MEM_OPERAND) {
320 pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
321 pde32_t * shadow_pde_entry = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
323 //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
324 //PrintDebug("FirstOperand = %x\n", first_operand);
326 if (shadow_pde_entry->large_page == 1) {
327 shadow_pde_entry->present = 0;
329 if (shadow_pde_entry->present == 1) {
330 pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
331 pte32_t * shadow_pte_entry = (pte32_t *)&shadow_pt[PTE32_INDEX(first_operand)];
333 shadow_pte_entry->present = 0;
340 PrintDebug("Invalid Operand type\n");
344 PrintDebug("invalid Instruction Opcode\n");
345 PrintTraceMemDump(instr, 15);
357 addr_t setup_shadow_pt32(struct guest_info * info, addr_t virt_cr3) {
358 addr_t cr3_guest_addr = CR3_TO_PDE32(virt_cr3);
360 pde32_t * host_pde = NULL;
363 // Setup up guest_pde to point to the PageDir in host addr
364 if (guest_pa_to_host_va(info, cr3_guest_addr, (addr_t*)&guest_pde) == -1) {
368 V3_AllocPages(host_pde, 1);
369 memset(host_pde, 0, PAGE_SIZE);
371 for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
372 if (guest_pde[i].present == 1) {
376 if (guest_pa_to_host_va(info, PDE32_T_ADDR(guest_pde[i]), &pt_host_addr) == -1) {
380 if ((host_pte = setup_shadow_pte32(info, pt_host_addr)) == 0) {
384 host_pde[i].present = 1;
385 host_pde[i].pt_base_addr = PD32_BASE_ADDR(host_pte);
388 // Set Page DIR flags
393 PrintDebugPageTables(host_pde);
395 return (addr_t)host_pde;
400 addr_t setup_shadow_pte32(struct guest_info * info, addr_t pt_host_addr) {
401 pte32_t * guest_pte = (pte32_t *)pt_host_addr;
402 pte32_t * host_pte = NULL;
405 V3_AllocPages(host_pte, 1);
406 memset(host_pte, 0, PAGE_SIZE);
408 for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
409 if (guest_pte[i].present == 1) {
410 addr_t guest_pa = PTE32_T_ADDR(guest_pte[i]);
411 shadow_mem_type_t page_type;
414 page_type = get_shadow_addr_type(info, guest_pa);
416 if (page_type == HOST_REGION_PHYSICAL_MEMORY) {
417 host_pa = get_shadow_addr(info, guest_pa);
421 // Setup various memory types
425 host_pte[i].page_base_addr = PT32_BASE_ADDR(host_pa);
426 host_pte[i].present = 1;
430 return (addr_t)host_pte;