2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Steven Jaconette <stevenjaconette2007@u.northwestern.edu>
11 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
12 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
13 * All rights reserved.
15 * Author: Steven Jaconette <stevenjaconette2007@u.northwestern.edu>
17 * This is free software. You are permitted to use,
18 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #ifndef __VMM_DIRECT_PAGING_32_H__
22 #define __VMM_DIRECT_PAGING_32_H__
24 #include <palacios/vmm_mem.h>
25 #include <palacios/vmm_paging.h>
26 #include <palacios/vmm.h>
27 #include <palacios/vm_guest_mem.h>
28 #include <palacios/vm_guest.h>
31 static inline int handle_passthrough_pagefault_32(struct guest_info * info,
33 pf_error_t error_code) {
34 // Check to see if pde and pte exist (create them if not)
39 int pde_index = PDE32_INDEX(fault_addr);
40 int pte_index = PTE32_INDEX(fault_addr);
42 struct v3_mem_region * region = v3_get_mem_region(info->vm_info, info->cpu_id, fault_addr);
45 PrintError("Invalid region in passthrough page fault 32, addr=%p\n",
50 host_addr = v3_get_shadow_addr(region, info->cpu_id, fault_addr);
52 // Lookup the correct PDE address based on the PAGING MODE
53 if (info->shdw_pg_mode == SHADOW_PAGING) {
54 pde = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
56 pde = CR3_TO_PDE32_VA(info->direct_map_pt);
60 // Fix up the PDE entry
61 if (pde[pde_index].present == 0) {
62 pte = (pte32_t *)create_generic_pt_page();
64 pde[pde_index].present = 1;
65 pde[pde_index].writable = 1;
66 pde[pde_index].user_page = 1;
67 pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
70 pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
73 // Fix up the PTE entry
74 if (pte[pte_index].present == 0) {
77 if ((region->flags.alloced == 1) &&
78 (region->flags.read == 1)) {
80 pte[pte_index].user_page = 1;
82 pte[pte_index].present = 1;
84 if (region->flags.write == 1) {
85 pte[pte_index].writable = 1;
87 pte[pte_index].writable = 0;
90 pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
92 return region->unhandled(info, fault_addr, fault_addr, region, error_code);
95 // We fix all permissions on the first pass,
96 // so we only get here if its an unhandled exception
97 return region->unhandled(info, fault_addr, fault_addr, region, error_code);
106 static inline int invalidate_addr_32(struct guest_info * info, addr_t inv_addr) {
107 pde32_t * pde = NULL;
108 pte32_t * pte = NULL;
113 // clear the page table entry
114 int pde_index = PDE32_INDEX(inv_addr);
115 int pte_index = PTE32_INDEX(inv_addr);
118 // Lookup the correct PDE address based on the PAGING MODE
119 if (info->shdw_pg_mode == SHADOW_PAGING) {
120 pde = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
122 pde = CR3_TO_PDE32_VA(info->direct_map_pt);
125 if (pde[pde_index].present == 0) {
127 } else if (pde[pde_index].large_page) {
128 pde[pde_index].present = 0;
132 pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
134 pte[pte_index].present = 0;