2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm_mem.h>
21 #include <palacios/vmm.h>
22 #include <palacios/vmcb.h>
23 #include <palacios/vmm_decoder.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
28 #ifndef DEBUG_CTRL_REGS
30 #define PrintDebug(fmt, args...)
34 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr);
35 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr);
36 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr);
39 // First Attempt = 494 lines
40 // current = 106 lines
41 int v3_handle_cr0_write(struct guest_info * info) {
44 struct x86_instr dec_instr;
46 if (info->mem_mode == PHYSICAL_MEM) {
47 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
49 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
52 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
53 PrintError("Could not decode instruction\n");
58 if (dec_instr.op_type == V3_OP_LMSW) {
59 if (handle_lmsw(info, &dec_instr) == -1) {
62 } else if (dec_instr.op_type == V3_OP_MOV2CR) {
63 if (handle_mov_to_cr0(info, &dec_instr) == -1) {
66 } else if (dec_instr.op_type == V3_OP_CLTS) {
67 if (handle_clts(info, &dec_instr) == -1) {
71 PrintError("Unhandled opcode in handle_cr0_write\n");
75 info->rip += dec_instr.instr_length;
83 // The CR0 register only has flags in the low 32 bits
84 // The hardware does a format check to make sure the high bits are zero
85 // Because of this we can ignore the high 32 bits here
86 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
88 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
89 struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
90 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
91 uint_t paging_transition = 0;
93 PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
95 PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
97 PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
98 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
101 // We detect if this is a paging transition
102 if (guest_cr0->pg != new_cr0->pg) {
103 paging_transition = 1;
106 // Guest always sees the value they wrote
107 *guest_cr0 = *new_cr0;
109 // This value must always be set to 1
112 // Set the shadow register to catch non-virtualized flags
113 *shadow_cr0 = *guest_cr0;
115 // Paging is always enabled
118 // Was there a paging transition
119 // Meaning we need to change the page tables
120 if (paging_transition) {
121 if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
123 struct efer_64 * guest_efer = (struct efer_64 *)&(info->guest_efer);
124 struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
126 // Check long mode LME to set LME
127 if (guest_efer->lme == 1) {
128 PrintDebug("Enabing Long Mode\n");
131 shadow_efer->lma = 1;
132 shadow_efer->lme = 1;
134 PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
137 PrintDebug("Activating Shadow Page Tables\n");
139 if (v3_activate_shadow_pt(info) == -1) {
140 PrintError("Failed to activate shadow page tables\n");
145 if (v3_activate_passthrough_pt(info) == -1) {
146 PrintError("Failed to activate passthrough page tables\n");
153 PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
154 PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
162 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
164 struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
168 if (info->shdw_pg_mode == SHADOW_PAGING) {
169 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
176 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
177 struct cr0_real * real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
178 struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
181 PrintDebug("LMSW\n");
183 new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
185 PrintDebug("OperandVal = %x\n", new_cr0_val);
187 // We can just copy the new value through
188 // we don't need to virtualize the lower 4 bits
189 PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
190 *(uchar_t*)real_cr0 &= 0xf0;
191 *(uchar_t*)real_cr0 |= new_cr0_val;
192 PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
195 // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
196 if (info->shdw_pg_mode == SHADOW_PAGING) {
197 struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
199 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
200 *(uchar_t*)guest_cr0 &= 0xf0;
201 *(uchar_t*)guest_cr0 |= new_cr0_val;
202 PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
211 // First attempt = 253 lines
212 // current = 51 lines
213 int v3_handle_cr0_read(struct guest_info * info) {
216 struct x86_instr dec_instr;
218 if (info->mem_mode == PHYSICAL_MEM) {
219 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
221 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
225 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
226 PrintError("Could not decode instruction\n");
230 if (dec_instr.op_type == V3_OP_MOVCR2) {
231 struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
232 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
234 PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
236 if (info->shdw_pg_mode == SHADOW_PAGING) {
237 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
238 *dst_reg = *guest_cr0;
240 *dst_reg = *shadow_cr0;
243 PrintDebug("Shadow CR0: %x\n", *(uint_t*)shadow_cr0);
244 PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
245 } else if (dec_instr.op_type == V3_OP_SMSW) {
246 struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
247 struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
248 char cr0_val = *(char*)shadow_cr0 & 0x0f;
250 PrintDebug("SMSW\n");
252 // The lower 4 bits of the guest/shadow CR0 are mapped through
253 // We can treat nested and shadow paging the same here
254 *(char *)dst_reg &= 0xf0;
255 *(char *)dst_reg |= cr0_val;
258 PrintError("Unhandled opcode in handle_cr0_read\n");
262 info->rip += dec_instr.instr_length;
270 // First Attempt = 256 lines
271 // current = 65 lines
272 int v3_handle_cr3_write(struct guest_info * info) {
275 struct x86_instr dec_instr;
277 if (info->mem_mode == PHYSICAL_MEM) {
278 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
280 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
283 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
284 PrintError("Could not decode instruction\n");
288 if (dec_instr.op_type == V3_OP_MOV2CR) {
289 PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
291 if (info->shdw_pg_mode == SHADOW_PAGING) {
292 PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n",
293 (void *)(addr_t)(info->ctrl_regs.cr3),
294 (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
297 // We update the guest CR3
298 if (info->cpu_mode == LONG) {
299 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
300 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
301 *guest_cr3 = *new_cr3;
303 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
304 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
305 *guest_cr3 = *new_cr3;
308 // If Paging is enabled in the guest then we need to change the shadow page tables
309 if (info->mem_mode == VIRTUAL_MEM) {
310 if (v3_activate_shadow_pt(info) == -1) {
311 PrintError("Failed to activate 32 bit shadow page table\n");
316 PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n",
317 (void *)(addr_t)(info->ctrl_regs.cr3),
318 (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
320 } else if (info->shdw_pg_mode == NESTED_PAGING) {
322 // This is just a passthrough operation which we probably don't need here
323 if (info->cpu_mode == LONG) {
324 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
325 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
326 *guest_cr3 = *new_cr3;
328 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
329 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
330 *guest_cr3 = *new_cr3;
335 PrintError("Unhandled opcode in handle_cr3_write\n");
339 info->rip += dec_instr.instr_length;
346 // first attempt = 156 lines
347 // current = 36 lines
348 int v3_handle_cr3_read(struct guest_info * info) {
351 struct x86_instr dec_instr;
353 if (info->mem_mode == PHYSICAL_MEM) {
354 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
356 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
359 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
360 PrintError("Could not decode instruction\n");
364 if (dec_instr.op_type == V3_OP_MOVCR2) {
365 PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
367 if (info->shdw_pg_mode == SHADOW_PAGING) {
369 if ((v3_get_cpu_mode(info) == LONG) ||
370 (v3_get_cpu_mode(info) == LONG_32_COMPAT)) {
371 struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
372 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
373 *dst_reg = *guest_cr3;
375 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
376 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
377 *dst_reg = *guest_cr3;
380 } else if (info->shdw_pg_mode == NESTED_PAGING) {
382 // This is just a passthrough operation which we probably don't need here
383 if ((v3_get_cpu_mode(info) == LONG) ||
384 (v3_get_cpu_mode(info) == LONG_32_COMPAT)) {
385 struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
386 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
387 *dst_reg = *guest_cr3;
389 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
390 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
391 *dst_reg = *guest_cr3;
396 PrintError("Unhandled opcode in handle_cr3_read\n");
400 info->rip += dec_instr.instr_length;
406 // We don't need to virtualize CR4, all we need is to detect the activation of PAE
407 int v3_handle_cr4_read(struct guest_info * info) {
408 // PrintError("CR4 Read not handled\n");
413 int v3_handle_cr4_write(struct guest_info * info) {
416 struct x86_instr dec_instr;
417 v3_vm_cpu_mode_t cpu_mode = v3_get_cpu_mode(info);
419 if (info->mem_mode == PHYSICAL_MEM) {
420 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
422 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
425 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
426 PrintError("Could not decode instruction\n");
430 if (dec_instr.op_type != V3_OP_MOV2CR) {
431 PrintError("Invalid opcode in write to CR4\n");
435 if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) {
436 struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
437 struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
439 PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
440 PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
442 if ((info->shdw_pg_mode == SHADOW_PAGING) &&
443 (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
445 if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
446 PrintDebug("Creating PAE passthrough tables\n");
448 // Delete the old 32 bit direct map page tables
449 delete_page_tables_32((pde32_t *)V3_VAddr((void *)(info->direct_map_pt)));
451 // create 32 bit PAE direct map page table
452 info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_32PAE(info));
454 // reset cr3 to new page tables
455 info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
457 } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
458 // Create passthrough standard 32bit pagetables
464 PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
466 } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) {
467 struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand);
468 struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
470 PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4);
471 PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4);
473 if (new_cr4->pae == 0) {
474 // cannot turn off PAE in long mode GPF the guest
475 PrintError("Cannot disable PAE in long mode, sending GPF\n");
482 PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
486 info->rip += dec_instr.instr_length;
491 int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) {
492 struct guest_info * info = (struct guest_info *)(priv_data);
493 PrintDebug("EFER Read HI=%x LO=%x\n", info->guest_efer.hi, info->guest_efer.lo);
495 dst->value = info->guest_efer.value;
497 info->rip += 2; // WRMSR/RDMSR are two byte operands
502 int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
503 struct guest_info * info = (struct guest_info *)(priv_data);
504 //struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
505 // struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
506 struct v3_msr * guest_efer = &(info->guest_efer);
508 PrintDebug("EFER Write\n");
509 PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo);
510 //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
512 // We virtualize the guests efer to hide the SVME and LMA bits
513 guest_efer->value = src.value;
516 // We have to handle long mode writes....
519 if ((info->shdw_pg_mode == SHADOW_PAGING) &&
520 (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
522 if ((shadow_efer->lme == 0) && (new_efer->lme == 1)) {
523 PrintDebug("Transition to longmode\n");
524 PrintDebug("Creating Passthrough 64 bit page tables\n");
526 // Delete the old 32 bit direct map page tables
528 PrintDebug("Deleting old PAE Page tables\n");
529 PrintError("JRL BUG?: Will the old page tables always be in PAE format??\n");
530 delete_page_tables_32PAE((pdpe32pae_t *)V3_VAddr((void *)(info->direct_map_pt)));
532 // create 64 bit direct map page table
533 info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(info));
535 // reset cr3 to new page tables
536 info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
538 // We mark the Long Mode active because we have paging enabled
539 // We do this in new_efer because we copy the msr in full below
540 // new_efer->lma = 1;
542 } else if ((shadow_efer->lme == 1) && (new_efer->lme == 0)) {
543 // transition out of long mode
544 //((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
545 //((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
550 // accept all changes to the efer, but make sure that the SVME bit is set... (SVM specific)
551 *shadow_efer = *new_efer;
552 shadow_efer->svme = 1;
556 PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(shadow_efer));
558 PrintError("Write to EFER in NESTED_PAGING or VIRTUAL_MEM mode not supported\n");
559 // Should probably just check for a long mode transition, and bomb out if it is
563 info->rip += 2; // WRMSR/RDMSR are two byte operands