2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm_mem.h>
21 #include <palacios/vmm.h>
22 #include <palacios/vmcb.h>
23 #include <palacios/vmm_decoder.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
29 /* Segmentation is a problem here...
31 * When we get a memory operand, presumably we use the default segment (which is?)
32 * unless an alternate segment was specfied in the prefix...
36 #ifndef DEBUG_CTRL_REGS
38 #define PrintDebug(fmt, args...)
42 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr);
43 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr);
45 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr);
46 static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr);
47 static int handle_mov_to_cr0_32pae(struct guest_info * info, struct x86_instr * dec_instr);
48 static int handle_mov_to_cr0_64(struct guest_info * info, struct x86_instr * dec_instr);
49 static int handle_mov_to_cr0_64compat(struct guest_info * info, struct x86_instr * dec_instr);
51 static int handle_mov_to_cr3_32(struct guest_info * info, struct x86_instr * dec_instr);
52 static int handle_mov_to_cr3_32pae(struct guest_info * info, struct x86_instr * dec_instr);
53 static int handle_mov_to_cr3_64(struct guest_info * info, struct x86_instr * dec_instr);
54 static int handle_mov_to_cr3_64compat(struct guest_info * info, struct x86_instr * dec_instr);
59 // First Attempt = 494 lines
60 // current = 106 lines
61 int v3_handle_cr0_write(struct guest_info * info) {
64 struct x86_instr dec_instr;
66 if (info->mem_mode == PHYSICAL_MEM) {
67 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
69 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
74 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
75 PrintError("Could not decode instruction\n");
79 if (v3_opcode_cmp(V3_OPCODE_LMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
81 if (handle_lmsw(info, &dec_instr) == -1) {
85 } else if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
87 if (handle_mov_to_cr0(info, &dec_instr) == -1) {
91 } else if (v3_opcode_cmp(V3_OPCODE_CLTS, (const uchar_t *)(dec_instr.opcode)) == 0) {
93 if (handle_clts(info, &dec_instr) == -1) {
98 PrintError("Unhandled opcode in handle_cr0_write\n");
102 info->rip += dec_instr.instr_length;
110 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
111 PrintDebug("MOV2CR0\n");
113 switch (info->cpu_mode) {
116 return handle_mov_to_cr0_32(info, dec_instr);
118 return handle_mov_to_cr0_32pae(info, dec_instr);
120 return handle_mov_to_cr0_64(info, dec_instr);
122 return handle_mov_to_cr0_64compat(info, dec_instr);
124 PrintError("Invalid CPU Operating Mode: %d\n", info->cpu_mode);
130 static int handle_mov_to_cr0_32pae(struct guest_info * info, struct x86_instr * dec_instr) {
131 PrintError("32 bit PAE mov to CR0 not implemented\n");
135 static int handle_mov_to_cr0_64(struct guest_info * info, struct x86_instr * dec_instr) {
136 PrintError("64 bit mov to CR0 not implemented\n");
140 static int handle_mov_to_cr0_64compat(struct guest_info * info, struct x86_instr * dec_instr) {
141 PrintError("64 bit compatibility mode move to CR0 not implemented\n");
146 static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr) {
148 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
149 struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
150 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
152 PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
154 PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
155 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
157 // Guest always sees the value they wrote
158 *guest_cr0 = *new_cr0;
160 // This value must always be set to 1
163 // Set the shadow register to catch non-virtualized flags
164 *shadow_cr0 = *guest_cr0;
167 if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
168 /* struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
169 info->ctrl_regs.cr3 = *(addr_t*)guest_cr3;
171 PrintDebug("Activating Shadow Page Tables\n");
173 if (v3_activate_shadow_pt(info) == -1) {
174 PrintError("Failed to activate shadow page tables\n");
179 if (v3_activate_passthrough_pt(info) == -1) {
180 PrintError("Failed to activate passthrough page tables\n");
186 PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
188 PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
196 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
198 struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
202 if (info->shdw_pg_mode == SHADOW_PAGING) {
203 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
210 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
211 struct cr0_real * real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
212 struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
215 PrintDebug("LMSW\n");
217 new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
219 PrintDebug("OperandVal = %x\n", new_cr0_val);
221 // We can just copy the new value through
222 // we don't need to virtualize the lower 4 bits
223 PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
224 *(uchar_t*)real_cr0 &= 0xf0;
225 *(uchar_t*)real_cr0 |= new_cr0_val;
226 PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
229 // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
230 if (info->shdw_pg_mode == SHADOW_PAGING) {
231 struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
233 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
234 *(uchar_t*)guest_cr0 &= 0xf0;
235 *(uchar_t*)guest_cr0 |= new_cr0_val;
236 PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
245 // First attempt = 253 lines
246 // current = 51 lines
247 int v3_handle_cr0_read(struct guest_info * info) {
250 struct x86_instr dec_instr;
252 if (info->mem_mode == PHYSICAL_MEM) {
253 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
255 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
259 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
260 PrintError("Could not decode instruction\n");
264 if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
265 struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
266 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
268 PrintDebug("MOVCR2\n");
270 if (info->shdw_pg_mode == SHADOW_PAGING) {
271 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
272 *dst_reg = *guest_cr0;
274 *dst_reg = *shadow_cr0;
277 PrintDebug("Shadow CR0: %x\n", *(uint_t*)shadow_cr0);
278 PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
279 } else if (v3_opcode_cmp(V3_OPCODE_SMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
280 struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
281 struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
282 char cr0_val = *(char*)shadow_cr0 & 0x0f;
284 PrintDebug("SMSW\n");
286 // The lower 4 bits of the guest/shadow CR0 are mapped through
287 // We can treat nested and shadow paging the same here
288 *(char *)dst_reg &= 0xf0;
289 *(char *)dst_reg |= cr0_val;
292 PrintError("Unhandled opcode in handle_cr0_read\n");
296 info->rip += dec_instr.instr_length;
304 // First Attempt = 256 lines
305 // current = 65 lines
306 int v3_handle_cr3_write(struct guest_info * info) {
309 struct x86_instr dec_instr;
311 if (info->mem_mode == PHYSICAL_MEM) {
312 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
314 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
317 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
318 PrintError("Could not decode instruction\n");
322 if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
323 PrintDebug("MOV2CR3\n");
325 if (info->mem_mode == PHYSICAL_MEM) {
326 // All we do is update the guest CR3
328 if (info->cpu_mode == LONG) {
329 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
330 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
331 *guest_cr3 = *new_cr3;
333 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
334 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
335 *guest_cr3 = *new_cr3;
340 switch (info->cpu_mode) {
342 if (handle_mov_to_cr3_32(info, &dec_instr) == -1) {
347 if (handle_mov_to_cr3_32pae(info, &dec_instr) == -1) {
352 if (handle_mov_to_cr3_64(info, &dec_instr) == -1) {
357 if (handle_mov_to_cr3_64compat(info, &dec_instr) == -1) {
362 PrintError("Unhandled CPU mode: %d\n", info->cpu_mode);
367 PrintError("Unhandled opcode in handle_cr3_write\n");
371 info->rip += dec_instr.instr_length;
382 static int handle_mov_to_cr3_32(struct guest_info * info, struct x86_instr * dec_instr) {
383 PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
385 if (info->shdw_pg_mode == SHADOW_PAGING) {
386 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr->src_operand.operand);
387 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
388 #ifdef DEBUG_CTRL_REGS
389 struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
392 PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
393 *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
396 // Store the write value to virtualize CR3
397 *guest_cr3 = *new_cr3;
399 if (v3_activate_shadow_pt(info) == -1) {
400 PrintError("Failed to activate 32 bit shadow page table\n");
404 PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
405 *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
411 static int handle_mov_to_cr3_32pae(struct guest_info * info, struct x86_instr * dec_instr) {
412 PrintError("32 Bit PAE mode Mov to CR3 not implemented\n");
416 static int handle_mov_to_cr3_64(struct guest_info * info, struct x86_instr * dec_instr) {
417 PrintError("Long mode Mov to CR3 not implemented\n");
421 static int handle_mov_to_cr3_64compat(struct guest_info * info, struct x86_instr * dec_instr) {
422 PrintError("Long compatiblity mode move to CR3 not implemented\n");
428 // first attempt = 156 lines
429 // current = 36 lines
430 int v3_handle_cr3_read(struct guest_info * info) {
433 struct x86_instr dec_instr;
435 if (info->mem_mode == PHYSICAL_MEM) {
436 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
438 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
443 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
444 PrintError("Could not decode instruction\n");
448 if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
449 PrintDebug("MOVCR32\n");
450 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
452 PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
454 if (info->shdw_pg_mode == SHADOW_PAGING) {
455 *dst_reg = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
457 *dst_reg = *(struct cr3_32 *)&(info->ctrl_regs.cr3);
460 PrintError("Unhandled opcode in handle_cr3_read\n");
464 info->rip += dec_instr.instr_length;
470 // We don't need to virtualize CR4, all we need is to detect the activation of PAE
471 int v3_handle_cr4_read(struct guest_info * info) {
472 // PrintError("CR4 Read not handled\n");
477 int v3_handle_cr4_write(struct guest_info * info) {
480 struct x86_instr dec_instr;
482 if (info->mem_mode == PHYSICAL_MEM) {
483 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
485 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
488 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
489 PrintError("Could not decode instruction\n");
493 if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) != 0) {
494 PrintError("Invalid opcode in write to CR4\n");
498 if ((info->cpu_mode == PROTECTED) || (info->cpu_mode == PROTECTED_PAE)) {
499 struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
500 struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
502 PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
503 PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
505 if ((info->shdw_pg_mode == SHADOW_PAGING) &&
506 (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
508 if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
509 PrintDebug("Creating PAE passthrough tables\n");
511 // Delete the old 32 bit direct map page tables
512 delete_page_tables_32((pde32_t *)V3_VAddr((void *)(info->direct_map_pt)));
514 // create 32 bit PAE direct map page table
515 info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_32PAE(info));
517 // reset cr3 to new page tables
518 info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
520 } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
521 // Create passthrough standard 32bit pagetables
527 PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
530 PrintError("CR4 write not supported in CPU_MODE: %d\n", info->cpu_mode);
534 info->rip += dec_instr.instr_length;
539 int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) {
540 struct guest_info * info = (struct guest_info *)(priv_data);
541 PrintDebug("EFER Read\n");
543 dst->value = info->guest_efer.value;
545 info->rip += 2; // WRMSR/RDMSR are two byte operands
550 int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
551 struct guest_info * info = (struct guest_info *)(priv_data);
552 struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
553 struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
554 struct v3_msr * guest_efer = &(info->guest_efer);
556 PrintDebug("EFER Write\n");
557 PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
559 // We virtualize the guests efer to hide the SVME and LMA bits
560 guest_efer->value = src.value;
563 if ((info->shdw_pg_mode == SHADOW_PAGING) &&
564 (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
566 if ((shadow_efer->lme == 0) && (new_efer->lme == 1)) {
567 PrintDebug("Transition to longmode\n");
568 PrintDebug("Creating Passthrough 64 bit page tables\n");
570 // Delete the old 32 bit direct map page tables
573 * Will these page tables always be in PAE format??
575 PrintDebug("Deleting old PAE Page tables\n");
576 PrintError("JRL BUG?: Will the old page tables always be in PAE format??\n");
577 delete_page_tables_32PAE((pdpe32pae_t *)V3_VAddr((void *)(info->direct_map_pt)));
579 // create 64 bit direct map page table
580 info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(info));
582 // reset cr3 to new page tables
583 info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
585 // We mark the Long Mode active because we have paging enabled
586 // We do this in new_efer because we copy the msr in full below
589 } else if ((shadow_efer->lme == 1) && (new_efer->lme == 0)) {
590 // transition out of long mode
591 //((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
592 //((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
597 // accept all changes to the efer, but make sure that the SVME bit is set... (SVM specific)
598 *shadow_efer = *new_efer;
599 shadow_efer->svme = 1;
603 PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(shadow_efer));
605 PrintError("Write to EFER in NESTED_PAGING or VIRTUAL_MEM mode not supported\n");
606 // Should probably just check for a long mode transition, and bomb out if it is
610 info->rip += 2; // WRMSR/RDMSR are two byte operands