Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


bug fix to check for illegal memory ranges
[palacios.git] / palacios / src / palacios / vmcs.c
1 /* 
2  * This file is part of the Palacios Virtual Machine Monitor developed
3  * by the V3VEE Project with funding from the United States National 
4  * Science Foundation and the Department of Energy.  
5  *
6  * The V3VEE Project is a joint project between Northwestern University
7  * and the University of New Mexico.  You can find out more at 
8  * http://www.v3vee.org
9  *
10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
12  * All rights reserved.
13  *
14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
15  *
16  * This is free software.  You are permitted to use,
17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
18  */
19
20 #include <palacios/vmcs.h>
21 #include <palacios/vmx_lowlevel.h>
22 #include <palacios/vmm.h>
23 #include <palacios/vmx.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
26 #include <palacios/vmm_lowlevel.h>
27
28
29
30
31
32 static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
33     int ret = 0;
34     ret = vmcs_write(field, val);
35
36     if (ret != VMX_SUCCESS) {
37         PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
38         return 1;
39     }
40
41     return 0;
42 }
43
44 static int inline check_vmcs_read(vmcs_field_t field, void * val) {
45     int ret = 0;
46     ret = vmcs_read(field, val);
47
48     if (ret != VMX_SUCCESS) {
49         PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
50     }
51
52     return ret;
53 }
54
55
56
57
58
59
60
61 typedef enum { ES = 0, 
62                CS = 2,
63                SS = 4,
64                DS = 6, 
65                FS = 8, 
66                GS = 10, 
67                LDTR = 12, 
68                TR = 14, 
69                GDTR = 16, 
70                IDTR = 18} vmcs_seg_offsets_t;
71
72 typedef enum {BASE = VMCS_GUEST_ES_BASE,
73               LIMIT = VMCS_GUEST_ES_LIMIT, 
74               ACCESS = VMCS_GUEST_ES_ACCESS, 
75               SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t;
76  
77
78
79 static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
80     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
81     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
82     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
83     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
84     struct vmcs_segment vmcs_seg;
85
86     memset(&vmcs_seg, 0, sizeof(struct vmcs_segment));
87
88     check_vmcs_read(limit, &(vmcs_seg.limit));
89     check_vmcs_read(base, &(vmcs_seg.base));
90
91     if ((seg_type != GDTR) && (seg_type != IDTR)) {
92         check_vmcs_read(selector, &(vmcs_seg.selector));
93         check_vmcs_read(access, &(vmcs_seg.access.val)); 
94     }
95
96     v3_vmxseg_to_seg(&vmcs_seg, seg);
97
98     return 0;
99 }
100
101 static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
102     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
103     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
104     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
105     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
106     struct vmcs_segment vmcs_seg;
107
108     v3_seg_to_vmxseg(seg, &vmcs_seg);
109
110     check_vmcs_write(limit, vmcs_seg.limit);
111     check_vmcs_write(base, vmcs_seg.base);
112
113     if ((seg_type != GDTR) && (seg_type != IDTR)) {
114         check_vmcs_write(access, vmcs_seg.access.val); 
115         check_vmcs_write(selector, vmcs_seg.selector);
116     }
117
118     return 0;
119 }
120
121 int v3_read_vmcs_segments(struct v3_segments * segs) {
122     v3_read_vmcs_segment(&(segs->cs), CS);
123     v3_read_vmcs_segment(&(segs->ds), DS);
124     v3_read_vmcs_segment(&(segs->es), ES);
125     v3_read_vmcs_segment(&(segs->fs), FS);
126     v3_read_vmcs_segment(&(segs->gs), GS);
127     v3_read_vmcs_segment(&(segs->ss), SS);
128     v3_read_vmcs_segment(&(segs->ldtr), LDTR);
129     v3_read_vmcs_segment(&(segs->gdtr), GDTR);
130     v3_read_vmcs_segment(&(segs->idtr), IDTR);
131     v3_read_vmcs_segment(&(segs->tr), TR);
132
133     return 0;
134 }
135
136 int v3_write_vmcs_segments(struct v3_segments * segs) {
137     v3_write_vmcs_segment(&(segs->cs), CS);
138     v3_write_vmcs_segment(&(segs->ds), DS);
139     v3_write_vmcs_segment(&(segs->es), ES);
140     v3_write_vmcs_segment(&(segs->fs), FS);
141     v3_write_vmcs_segment(&(segs->gs), GS);
142     v3_write_vmcs_segment(&(segs->ss), SS);
143     v3_write_vmcs_segment(&(segs->ldtr), LDTR);
144     v3_write_vmcs_segment(&(segs->gdtr), GDTR);
145     v3_write_vmcs_segment(&(segs->idtr), IDTR);
146     v3_write_vmcs_segment(&(segs->tr), TR);
147
148     return 0;
149 }
150
151
152 void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) {
153     memset(seg, 0, sizeof(struct v3_segment));
154
155     seg->selector = vmcs_seg->selector;
156     seg->limit = vmcs_seg->limit;
157     seg->base = vmcs_seg->base;
158
159     seg->type = vmcs_seg->access.type;
160     seg->system = vmcs_seg->access.desc_type;
161     seg->dpl = vmcs_seg->access.dpl;
162     seg->present = vmcs_seg->access.present;
163     seg->avail = vmcs_seg->access.avail;
164     seg->long_mode = vmcs_seg->access.long_mode;
165     seg->db = vmcs_seg->access.db;
166     seg->granularity = vmcs_seg->access.granularity;
167     seg->unusable = vmcs_seg->access.unusable;
168
169 }
170
171 void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) {
172     memset(vmcs_seg, 0, sizeof(struct vmcs_segment));
173
174     vmcs_seg->selector = seg->selector;
175     vmcs_seg->limit = seg->limit;
176     vmcs_seg->base = seg->base;
177
178     vmcs_seg->access.type = seg->type;
179     vmcs_seg->access.desc_type = seg->system;
180     vmcs_seg->access.dpl = seg->dpl;
181     vmcs_seg->access.present = seg->present;
182     vmcs_seg->access.avail = seg->avail;
183     vmcs_seg->access.long_mode = seg->long_mode;
184     vmcs_seg->access.db = seg->db;
185     vmcs_seg->access.granularity = seg->granularity;
186     vmcs_seg->access.unusable = seg->unusable;
187 }
188
189
190
191
192 int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
193     int vmx_ret = 0;
194     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
195
196     vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value);
197     vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value);
198
199     if (arch_data->pri_proc_ctrls.sec_ctrls) {
200         vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value);
201     }
202
203     vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value);
204     vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value);
205     vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, arch_data->excp_bmap.value);
206
207     if (info->shdw_pg_mode == NESTED_PAGING) {
208         vmx_ret |= check_vmcs_write(VMCS_EPT_PTR, info->direct_map_pt);
209     }
210
211     return vmx_ret;
212 }
213
214
215
216
217
218
219 int v3_vmx_save_vmcs(struct guest_info * info) {
220     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
221     int error = 0;
222
223     check_vmcs_read(VMCS_GUEST_RIP, &(info->rip));
224     check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp));
225
226     check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0));
227     check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0));
228     check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3));
229     check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4));
230     check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4));
231     check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7));
232
233     check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags));
234
235 #ifdef __V3_64BIT__
236     check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer));
237     check_vmcs_read(VMCS_ENTRY_CTRLS, &(vmx_info->entry_ctrls.value));
238 #endif
239     
240     error =  v3_read_vmcs_segments(&(info->segments));
241
242     return error;
243 }
244
245
246 int v3_vmx_restore_vmcs(struct guest_info * info) {
247     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
248     int error = 0;
249
250     check_vmcs_write(VMCS_GUEST_RIP, info->rip);
251     check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
252
253     check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
254     check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
255     check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
256     check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
257     check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4);
258     check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7);
259
260     check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
261
262 #ifdef __V3_64BIT__
263     check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer);
264     check_vmcs_write(VMCS_ENTRY_CTRLS, vmx_info->entry_ctrls.value);
265 #endif
266
267     error = v3_write_vmcs_segments(&(info->segments));
268
269     return error;
270
271 }
272
273
274
275 int v3_update_vmcs_host_state(struct guest_info * info) {
276     int vmx_ret = 0;
277     addr_t tmp;
278     struct v3_msr tmp_msr;
279     addr_t gdtr_base;
280     struct {
281         uint16_t selector;
282         addr_t   base;
283     } __attribute__((packed)) tmp_seg;
284
285 #ifdef __V3_64BIT__
286     __asm__ __volatile__ ( "movq    %%cr0, %0; "                
287                            : "=q"(tmp)
288                            :
289     );
290 #else
291     __asm__ __volatile__ ( "movl    %%cr0, %0; "                
292                            : "=q"(tmp)
293                            :
294     );
295 #endif    
296     vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp);
297
298
299 #ifdef __V3_64BIT__
300     __asm__ __volatile__ ( "movq %%cr3, %0; "           
301                            : "=q"(tmp)
302                            :
303     );
304 #else
305     __asm__ __volatile__ ( "movl %%cr3, %0; "           
306                            : "=q"(tmp)
307                            :
308     );
309 #endif
310     vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp);
311
312
313 #ifdef __V3_64BIT__
314     __asm__ __volatile__ ( "movq %%cr4, %0; "           
315                            : "=q"(tmp)
316                            :
317     );
318 #else
319     __asm__ __volatile__ ( "movl %%cr4, %0; "           
320                            : "=q"(tmp)
321                            :
322     );
323 #endif
324     vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp);
325
326
327     __asm__ __volatile__(
328                          "sgdt (%0);"
329                          :
330                          : "q"(&tmp_seg)
331                          : "memory"
332                          );
333     gdtr_base = tmp_seg.base;
334     vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, tmp_seg.base);
335
336     __asm__ __volatile__(
337                          "sidt (%0);"
338                          :
339                          : "q"(&tmp_seg)
340                          : "memory"
341                          );
342     vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, tmp_seg.base);
343
344     __asm__ __volatile__(
345                          "str (%0);"
346                          :
347                          : "q"(&tmp_seg)
348                          : "memory"
349                          );
350     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, tmp_seg.selector);
351
352     /* The GDTR *index* is bits 3-15 of the selector. */
353     {
354         struct tss_descriptor * desc = NULL;
355         desc = (struct tss_descriptor *)(gdtr_base + (8 * (tmp_seg.selector >> 3)));
356
357         tmp_seg.base = ((desc->base1) |
358                         (desc->base2 << 16) |
359                         (desc->base3 << 24) |
360 #ifdef __V3_64BIT__
361                         ((uint64_t)desc->base4 << 32)
362 #else
363                         (0)
364 #endif
365                         );
366
367         vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, tmp_seg.base);
368     }
369
370
371 #ifdef __V3_64BIT__
372     __asm__ __volatile__ ( "movq %%cs, %0; "            
373                            : "=q"(tmp)
374                            :
375     );
376 #else
377     __asm__ __volatile__ ( "movl %%cs, %0; "            
378                            : "=q"(tmp)
379                            :
380     );
381 #endif
382     vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp);
383
384 #ifdef __V3_64BIT__
385     __asm__ __volatile__ ( "movq %%ss, %0; "            
386                            : "=q"(tmp)
387                            :
388     );
389 #else
390     __asm__ __volatile__ ( "movl %%ss, %0; "            
391                            : "=q"(tmp)
392                            :
393     );
394 #endif
395     vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp);
396
397 #ifdef __V3_64BIT__
398     __asm__ __volatile__ ( "movq %%ds, %0; "            
399                            : "=q"(tmp)
400                            :
401     );
402 #else
403     __asm__ __volatile__ ( "movl %%ds, %0; "            
404                            : "=q"(tmp)
405                            :
406     );
407 #endif
408     vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp);
409
410 #ifdef __V3_64BIT__
411     __asm__ __volatile__ ( "movq %%es, %0; "            
412                            : "=q"(tmp)
413                            :
414     );
415 #else
416     __asm__ __volatile__ ( "movl %%es, %0; "            
417                            : "=q"(tmp)
418                            :
419     );
420 #endif
421     vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp);
422
423 #ifdef __V3_64BIT__
424     __asm__ __volatile__ ( "movq %%fs, %0; "            
425                            : "=q"(tmp)
426                            :
427     );
428 #else
429     __asm__ __volatile__ ( "movl %%fs, %0; "            
430                            : "=q"(tmp)
431                            :
432     );
433 #endif
434     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp);
435
436 #ifdef __V3_64BIT__
437     __asm__ __volatile__ ( "movq %%gs, %0; "            
438                            : "=q"(tmp)
439                            :
440     );
441 #else
442     __asm__ __volatile__ ( "movl %%gs, %0; "            
443                            : "=q"(tmp)
444                            :
445     );
446 #endif
447     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp);
448
449
450 #define SYSENTER_CS_MSR 0x00000174
451 #define SYSENTER_ESP_MSR 0x00000175
452 #define SYSENTER_EIP_MSR 0x00000176
453 #define FS_BASE_MSR 0xc0000100
454 #define GS_BASE_MSR 0xc0000101
455 #define EFER_MSR 0xc0000080
456
457
458     // SYSENTER CS MSR
459     v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
460     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo);
461
462     // SYSENTER_ESP MSR
463     v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
464     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value);
465
466     // SYSENTER_EIP MSR
467     v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
468     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value);
469
470
471     // FS.BASE MSR
472     v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
473     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value);    
474
475     // GS.BASE MSR
476     v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
477     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value);    
478
479
480     // EFER
481     v3_get_msr(EFER_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
482     vmx_ret |= check_vmcs_write(VMCS_HOST_EFER, tmp_msr.value);
483
484     // PERF GLOBAL CONTROL
485
486     // PAT
487
488     v3_get_msr(IA32_PAT_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
489     vmx_ret |= check_vmcs_write(VMCS_HOST_PAT, tmp_msr.value);  
490
491
492     // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area
493     {
494         struct vmx_data * vmx_state = (struct vmx_data *)info->vmm_data;
495         struct vmcs_msr_save_area * msr_entries = vmx_state->msr_area;
496
497     
498         v3_get_msr(IA32_STAR_MSR, &(msr_entries->host_star.hi), &(msr_entries->host_star.lo));
499         v3_get_msr(IA32_LSTAR_MSR, &(msr_entries->host_lstar.hi), &(msr_entries->host_lstar.lo));
500         v3_get_msr(IA32_FMASK_MSR, &(msr_entries->host_fmask.hi), &(msr_entries->host_fmask.lo));
501         v3_get_msr(IA32_KERN_GS_BASE_MSR, &(msr_entries->host_kern_gs.hi), &(msr_entries->host_kern_gs.lo));
502     }
503
504     
505
506
507
508     return vmx_ret;
509 }
510
511
512
513
514
515
516 static inline void print_vmcs_field(vmcs_field_t vmcs_index) {
517     int len = v3_vmcs_get_field_len(vmcs_index);
518     addr_t val;
519     
520     if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) {
521         PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index));
522         return;
523     };
524     
525     if (len == 2) {
526         PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
527     } else if (len == 4) {
528         PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
529     } else if (len == 8) {
530         PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
531     }
532 }
533
534
535 static void print_vmcs_segments() {
536     struct v3_segments segs; 
537
538     v3_read_vmcs_segments(&segs);
539     v3_print_segments(&segs);
540
541
542     PrintDebug("   ==> CS\n");
543     print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
544     print_vmcs_field(VMCS_GUEST_CS_BASE);
545     print_vmcs_field(VMCS_GUEST_CS_LIMIT);
546     print_vmcs_field(VMCS_GUEST_CS_ACCESS);
547
548     PrintDebug("   ==> SS\n");
549     print_vmcs_field(VMCS_GUEST_SS_SELECTOR);
550     print_vmcs_field(VMCS_GUEST_SS_BASE);
551     print_vmcs_field(VMCS_GUEST_SS_LIMIT);
552     print_vmcs_field(VMCS_GUEST_SS_ACCESS);
553
554     PrintDebug("   ==> DS\n");
555     print_vmcs_field(VMCS_GUEST_DS_SELECTOR);
556     print_vmcs_field(VMCS_GUEST_DS_BASE);
557     print_vmcs_field(VMCS_GUEST_DS_LIMIT);
558     print_vmcs_field(VMCS_GUEST_DS_ACCESS);
559
560     PrintDebug("   ==> ES\n");
561     print_vmcs_field(VMCS_GUEST_ES_SELECTOR);
562     print_vmcs_field(VMCS_GUEST_ES_BASE);
563     print_vmcs_field(VMCS_GUEST_ES_LIMIT);
564     print_vmcs_field(VMCS_GUEST_ES_ACCESS);
565
566     PrintDebug("   ==> FS\n");
567     print_vmcs_field(VMCS_GUEST_FS_SELECTOR);
568     print_vmcs_field(VMCS_GUEST_FS_BASE);
569     print_vmcs_field(VMCS_GUEST_FS_LIMIT);
570     print_vmcs_field(VMCS_GUEST_FS_ACCESS);
571
572     PrintDebug("   ==> GS\n");
573     print_vmcs_field(VMCS_GUEST_GS_SELECTOR);
574     print_vmcs_field(VMCS_GUEST_GS_BASE);
575     print_vmcs_field(VMCS_GUEST_GS_LIMIT);
576     print_vmcs_field(VMCS_GUEST_GS_ACCESS);
577
578     PrintDebug("   ==> LDTR\n");
579     print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR);
580     print_vmcs_field(VMCS_GUEST_LDTR_BASE);
581     print_vmcs_field(VMCS_GUEST_LDTR_LIMIT);
582     print_vmcs_field(VMCS_GUEST_LDTR_ACCESS);
583
584     PrintDebug("   ==> TR\n");
585     print_vmcs_field(VMCS_GUEST_TR_SELECTOR);
586     print_vmcs_field(VMCS_GUEST_TR_BASE);
587     print_vmcs_field(VMCS_GUEST_TR_LIMIT);
588     print_vmcs_field(VMCS_GUEST_TR_ACCESS);
589
590     PrintDebug("   ==> GDTR\n");
591     print_vmcs_field(VMCS_GUEST_GDTR_BASE);
592     print_vmcs_field(VMCS_GUEST_GDTR_LIMIT);
593
594     PrintDebug("   ==> IDTR\n");
595     print_vmcs_field(VMCS_GUEST_IDTR_BASE);
596     print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
597
598
599 }
600
601
602
603
604 static void print_guest_state()
605 {
606     PrintDebug("VMCS_GUEST_STATE\n");
607     print_vmcs_field(VMCS_GUEST_RIP);
608     print_vmcs_field(VMCS_GUEST_RSP);
609     print_vmcs_field(VMCS_GUEST_RFLAGS);
610     print_vmcs_field(VMCS_GUEST_CR0);
611     print_vmcs_field(VMCS_GUEST_CR3);
612     print_vmcs_field(VMCS_GUEST_CR4);
613     print_vmcs_field(VMCS_GUEST_DR7);
614
615     // if save IA32_EFER
616     print_vmcs_field(VMCS_GUEST_EFER);
617 #ifdef __V3_32BIT__
618     print_vmcs_field(VMCS_GUEST_EFER_HIGH);
619 #endif
620
621
622     PrintDebug("\n");
623
624     print_vmcs_segments();
625
626     PrintDebug("\n");
627
628     print_vmcs_field(VMCS_GUEST_DBG_CTL);
629 #ifdef __V3_32BIT__
630     print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH);
631 #endif
632     print_vmcs_field(VMCS_GUEST_SYSENTER_CS);
633     print_vmcs_field(VMCS_GUEST_SYSENTER_ESP);
634     print_vmcs_field(VMCS_GUEST_SYSENTER_EIP);
635
636
637     // if save IA32_PAT
638     print_vmcs_field(VMCS_GUEST_PAT);
639 #ifdef __V3_32BIT__
640     print_vmcs_field(VMCS_GUEST_PAT_HIGH);
641 #endif
642
643     //if load  IA32_PERF_GLOBAL_CTRL
644     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL);
645 #ifdef __V3_32BIT__
646     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH);
647 #endif
648
649     print_vmcs_field(VMCS_GUEST_SMBASE);
650
651
652
653
654     PrintDebug("GUEST_NON_REGISTER_STATE\n");
655
656     print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
657     print_vmcs_field(VMCS_GUEST_INT_STATE);
658     print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
659
660     // if VMX preempt timer
661     print_vmcs_field(VMCS_PREEMPT_TIMER);
662
663 }
664        
665 static void print_host_state()
666 {
667     PrintDebug("VMCS_HOST_STATE\n");
668
669     print_vmcs_field(VMCS_HOST_RIP);
670     print_vmcs_field(VMCS_HOST_RSP);
671     print_vmcs_field(VMCS_HOST_CR0);
672     print_vmcs_field(VMCS_HOST_CR3);
673     print_vmcs_field(VMCS_HOST_CR4);
674     
675
676
677     // if load IA32_EFER
678     print_vmcs_field(VMCS_HOST_EFER);
679 #ifdef __V3_32BIT__
680     print_vmcs_field(VMCS_HOST_EFER_HIGH);
681 #endif
682
683
684     PrintDebug("\n");
685     print_vmcs_field(VMCS_HOST_CS_SELECTOR);
686     print_vmcs_field(VMCS_HOST_SS_SELECTOR);
687     print_vmcs_field(VMCS_HOST_DS_SELECTOR);
688     print_vmcs_field(VMCS_HOST_ES_SELECTOR);
689     print_vmcs_field(VMCS_HOST_FS_SELECTOR);
690     print_vmcs_field(VMCS_HOST_GS_SELECTOR);
691     print_vmcs_field(VMCS_HOST_TR_SELECTOR);
692
693     PrintDebug("\n");
694     print_vmcs_field(VMCS_HOST_FS_BASE);
695     print_vmcs_field(VMCS_HOST_GS_BASE);
696     print_vmcs_field(VMCS_HOST_TR_BASE);
697     print_vmcs_field(VMCS_HOST_GDTR_BASE);
698     print_vmcs_field(VMCS_HOST_IDTR_BASE);
699
700     PrintDebug("\n");
701     print_vmcs_field(VMCS_HOST_SYSENTER_CS);
702     print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
703     print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
704
705
706     // if load IA32_PAT
707     print_vmcs_field(VMCS_HOST_PAT);
708 #ifdef __V3_32BIT__
709     print_vmcs_field(VMCS_HOST_PAT_HIGH);
710 #endif
711
712     // if load IA32_PERF_GLOBAL_CTRL
713     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL);
714 #ifdef __V3_32BIT__
715     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH);
716 #endif
717 }
718
719
720 static void print_exec_ctrls() {
721     PrintDebug("VMCS_EXEC_CTRL_FIELDS\n");
722     print_vmcs_field(VMCS_PIN_CTRLS);
723     print_vmcs_field(VMCS_PROC_CTRLS);
724     
725     // if activate secondary controls
726     print_vmcs_field(VMCS_SEC_PROC_CTRLS);
727     
728     print_vmcs_field(VMCS_EXCP_BITMAP);
729     print_vmcs_field(VMCS_PG_FAULT_ERR_MASK);
730     print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH);
731
732     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR);
733 #ifdef __V3_32BIT__
734     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH);
735 #endif
736
737     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR);
738 #ifdef __V3_32BIT__
739     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH);
740 #endif
741
742     print_vmcs_field(VMCS_TSC_OFFSET);
743 #ifdef __V3_32BIT__
744     print_vmcs_field(VMCS_TSC_OFFSET_HIGH);
745 #endif
746
747     PrintDebug("\n");
748
749     print_vmcs_field(VMCS_CR0_MASK);
750     print_vmcs_field(VMCS_CR0_READ_SHDW);
751     print_vmcs_field(VMCS_CR4_MASK);
752     print_vmcs_field(VMCS_CR4_READ_SHDW);
753
754     print_vmcs_field(VMCS_CR3_TGT_CNT);
755     print_vmcs_field(VMCS_CR3_TGT_VAL_0);
756     print_vmcs_field(VMCS_CR3_TGT_VAL_1);
757     print_vmcs_field(VMCS_CR3_TGT_VAL_2);
758     print_vmcs_field(VMCS_CR3_TGT_VAL_3);
759
760     // Check max number of CR3 targets... may continue...
761
762
763     PrintDebug("\n");
764
765     // if virtualize apic accesses
766     print_vmcs_field(VMCS_APIC_ACCESS_ADDR);    
767 #ifdef __V3_32BIT__
768     print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH);
769 #endif
770
771     // if use tpr shadow
772     print_vmcs_field(VMCS_VAPIC_ADDR);    
773 #ifdef __V3_32BIT__
774     print_vmcs_field(VMCS_VAPIC_ADDR_HIGH);
775 #endif
776
777     // if use tpr shadow
778     print_vmcs_field(VMCS_TPR_THRESHOLD);
779
780
781     // if use MSR bitmaps
782     print_vmcs_field(VMCS_MSR_BITMAP);
783 #ifdef __V3_32BIT__
784     print_vmcs_field(VMCS_MSR_BITMAP_HIGH);
785 #endif
786
787     print_vmcs_field(VMCS_EXEC_PTR);
788 #ifdef __V3_32BIT__
789     print_vmcs_field(VMCS_EXEC_PTR_HIGH);
790 #endif
791
792
793 }
794
795 static void print_ept_state() {
796     V3_Print("VMCS EPT INFO\n");
797
798     // if enable vpid
799     print_vmcs_field(VMCS_VPID);
800
801     print_vmcs_field(VMCS_EPT_PTR);
802 #ifdef __V3_32BIT__
803     print_vmcs_field(VMCS_EPT_PTR_HIGH);
804 #endif
805
806     print_vmcs_field(VMCS_GUEST_PHYS_ADDR);
807 #ifdef __V3_32BIT__
808     print_vmcs_field(VMCS_GUEST_PHYS_ADDR_HIGH);
809 #endif
810
811
812
813     print_vmcs_field(VMCS_GUEST_PDPTE0);
814 #ifdef __V3_32BIT__
815     print_vmcs_field(VMCS_GUEST_PDPTE0_HIGH);
816 #endif
817
818     print_vmcs_field(VMCS_GUEST_PDPTE1);
819 #ifdef __V3_32BIT__
820     print_vmcs_field(VMCS_GUEST_PDPTE1_HIGH);
821 #endif
822
823     print_vmcs_field(VMCS_GUEST_PDPTE2);
824 #ifdef __V3_32BIT__
825     print_vmcs_field(VMCS_GUEST_PDPTE2_HIGH);
826 #endif
827
828     print_vmcs_field(VMCS_GUEST_PDPTE3);
829 #ifdef __V3_32BIT__
830     print_vmcs_field(VMCS_GUEST_PDPTE3_HIGH);
831 #endif
832
833
834
835 }
836
837
838 static void print_exit_ctrls() {
839     PrintDebug("VMCS_EXIT_CTRLS\n");
840
841     print_vmcs_field(VMCS_EXIT_CTRLS);
842
843
844     print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT);
845     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR);
846 #ifdef __V3_32BIT__
847     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH);
848 #endif
849
850     print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT);
851     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR);
852 #ifdef __V3_32BIT__
853     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH);
854 #endif
855
856
857     // if pause loop exiting
858     print_vmcs_field(VMCS_PLE_GAP);
859     print_vmcs_field(VMCS_PLE_WINDOW);
860
861 }
862
863
864 static void print_entry_ctrls() {
865     PrintDebug("VMCS_ENTRY_CTRLS\n");
866     
867     print_vmcs_field(VMCS_ENTRY_CTRLS);
868
869     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT);
870     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR);
871 #ifdef __V3_32BIT__
872     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH);
873 #endif
874
875     print_vmcs_field(VMCS_ENTRY_INT_INFO);
876     print_vmcs_field(VMCS_ENTRY_EXCP_ERR);
877     print_vmcs_field(VMCS_ENTRY_INSTR_LEN);
878
879
880 }
881
882
883 static void print_exit_info() {
884     PrintDebug("VMCS_EXIT_INFO\n");
885
886     print_vmcs_field(VMCS_EXIT_REASON);
887     print_vmcs_field(VMCS_EXIT_QUAL);
888
889     print_vmcs_field(VMCS_EXIT_INT_INFO);
890     print_vmcs_field(VMCS_EXIT_INT_ERR);
891
892     print_vmcs_field(VMCS_IDT_VECTOR_INFO);
893     print_vmcs_field(VMCS_IDT_VECTOR_ERR);
894
895     print_vmcs_field(VMCS_EXIT_INSTR_LEN);
896
897     print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
898     print_vmcs_field(VMCS_EXIT_INSTR_INFO);
899
900     print_vmcs_field(VMCS_IO_RCX);
901     print_vmcs_field(VMCS_IO_RSI);
902     print_vmcs_field(VMCS_IO_RDI);
903     print_vmcs_field(VMCS_IO_RIP);
904
905
906     print_vmcs_field(VMCS_INSTR_ERR);
907 }
908
909 void v3_print_vmcs() {
910
911     print_vmcs_field(VMCS_LINK_PTR);
912 #ifdef __V3_32BIT__
913     print_vmcs_field(VMCS_LINK_PTR_HIGH);
914 #endif
915
916     print_guest_state();
917     print_host_state();
918
919     print_ept_state();
920
921     print_exec_ctrls();
922     print_exit_ctrls();
923     print_entry_ctrls();
924     print_exit_info();
925
926 }
927
928
929 /*
930  * Returns the field length in bytes
931  *   It doesn't get much uglier than this... Thanks Intel
932  */
933 int v3_vmcs_get_field_len(vmcs_field_t field) {
934     struct vmcs_field_encoding * enc = (struct vmcs_field_encoding *)&field;
935
936     switch (enc->width)  {
937         case 0:
938             return 2;
939         case 1: {
940             if (enc->access_type == 1) {
941                 return 4;
942             } else {
943                 return sizeof(addr_t);
944             }
945         }
946         case 2:
947             return 4;
948         case 3:
949             return sizeof(addr_t);
950         default:
951             PrintError("Invalid VMCS field: 0x%x\n", field);
952             return -1;
953     }
954 }
955
956
957
958
959
960
961
962
963
964
965
966 static const char VMCS_VPID_STR[] = "VPID";
967 static const char VMCS_GUEST_ES_SELECTOR_STR[] = "GUEST_ES_SELECTOR";
968 static const char VMCS_GUEST_CS_SELECTOR_STR[] = "GUEST_CS_SELECTOR";
969 static const char VMCS_GUEST_SS_SELECTOR_STR[] = "GUEST_SS_SELECTOR";
970 static const char VMCS_GUEST_DS_SELECTOR_STR[] = "GUEST_DS_SELECTOR";
971 static const char VMCS_GUEST_FS_SELECTOR_STR[] = "GUEST_FS_SELECTOR";
972 static const char VMCS_GUEST_GS_SELECTOR_STR[] = "GUEST_GS_SELECTOR";
973 static const char VMCS_GUEST_LDTR_SELECTOR_STR[] = "GUEST_LDTR_SELECTOR";
974 static const char VMCS_GUEST_TR_SELECTOR_STR[] = "GUEST_TR_SELECTOR";
975 static const char VMCS_HOST_ES_SELECTOR_STR[] = "HOST_ES_SELECTOR";
976 static const char VMCS_HOST_CS_SELECTOR_STR[] = "HOST_CS_SELECTOR";
977 static const char VMCS_HOST_SS_SELECTOR_STR[] = "HOST_SS_SELECTOR";
978 static const char VMCS_HOST_DS_SELECTOR_STR[] = "HOST_DS_SELECTOR";
979 static const char VMCS_HOST_FS_SELECTOR_STR[] = "HOST_FS_SELECTOR";
980 static const char VMCS_HOST_GS_SELECTOR_STR[] = "HOST_GS_SELECTOR";
981 static const char VMCS_HOST_TR_SELECTOR_STR[] = "HOST_TR_SELECTOR";
982 static const char VMCS_IO_BITMAP_A_ADDR_STR[] = "IO_BITMAP_A_ADDR";
983 static const char VMCS_IO_BITMAP_A_ADDR_HIGH_STR[] = "IO_BITMAP_A_ADDR_HIGH";
984 static const char VMCS_IO_BITMAP_B_ADDR_STR[] = "IO_BITMAP_B_ADDR";
985 static const char VMCS_IO_BITMAP_B_ADDR_HIGH_STR[] = "IO_BITMAP_B_ADDR_HIGH";
986 static const char VMCS_MSR_BITMAP_STR[] = "MSR_BITMAPS";
987 static const char VMCS_MSR_BITMAP_HIGH_STR[] = "MSR_BITMAPS_HIGH";
988 static const char VMCS_EXIT_MSR_STORE_ADDR_STR[] = "EXIT_MSR_STORE_ADDR";
989 static const char VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR[] = "EXIT_MSR_STORE_ADDR_HIGH";
990 static const char VMCS_EXIT_MSR_LOAD_ADDR_STR[] = "EXIT_MSR_LOAD_ADDR";
991 static const char VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR[] = "EXIT_MSR_LOAD_ADDR_HIGH";
992 static const char VMCS_ENTRY_MSR_LOAD_ADDR_STR[] = "ENTRY_MSR_LOAD_ADDR";
993 static const char VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR[] = "ENTRY_MSR_LOAD_ADDR_HIGH";
994 static const char VMCS_EXEC_PTR_STR[] = "VMCS_EXEC_PTR";
995 static const char VMCS_EXEC_PTR_HIGH_STR[] = "VMCS_EXEC_PTR_HIGH";
996 static const char VMCS_TSC_OFFSET_STR[] = "TSC_OFFSET";
997 static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH";
998 static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR";
999 static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH";
1000 static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR";
1001 static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH";
1002 static const char VMCS_EPT_PTR_STR[] = "VMCS_EPT_PTR";
1003 static const char VMCS_EPT_PTR_HIGH_STR[] = "VMCS_EPT_PTR_HIGH";
1004 static const char VMCS_GUEST_PHYS_ADDR_STR[] = "VMCS_GUEST_PHYS_ADDR";
1005 static const char VMCS_GUEST_PHYS_ADDR_HIGH_STR[] = "VMCS_GUEST_PHYS_ADDR_HIGH";
1006 static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR";
1007 static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH";
1008 static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL";
1009 static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH";
1010 static const char VMCS_GUEST_PAT_STR[] = "GUEST_PAT";
1011 static const char VMCS_GUEST_PAT_HIGH_STR[] = "GUEST_PAT_HIGH";
1012 static const char VMCS_GUEST_EFER_STR[] = "GUEST_EFER";
1013 static const char VMCS_GUEST_EFER_HIGH_STR[] = "GUEST_EFER_HIGH";
1014 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL";
1015 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH";
1016 static const char VMCS_GUEST_PDPTE0_STR[] = "GUEST_PDPTE0";
1017 static const char VMCS_GUEST_PDPTE0_HIGH_STR[] = "GUEST_PDPTE0_HIGH";
1018 static const char VMCS_GUEST_PDPTE1_STR[] = "GUEST_PDPTE1";
1019 static const char VMCS_GUEST_PDPTE1_HIGH_STR[] = "GUEST_PDPTE1_HIGH";
1020 static const char VMCS_GUEST_PDPTE2_STR[] = "GUEST_PDPTE2";
1021 static const char VMCS_GUEST_PDPTE2_HIGH_STR[] = "GUEST_PDPTE2_HIGH";
1022 static const char VMCS_GUEST_PDPTE3_STR[] = "GUEST_PDPTE3";
1023 static const char VMCS_GUEST_PDPTE3_HIGH_STR[] = "GUEST_PDPTE3_HIGH";
1024 static const char VMCS_HOST_PAT_STR[] = "HOST_PAT";
1025 static const char VMCS_HOST_PAT_HIGH_STR[] = "HOST_PAT_HIGH";
1026 static const char VMCS_HOST_EFER_STR[] = "VMCS_HOST_EFER";
1027 static const char VMCS_HOST_EFER_HIGH_STR[] = "VMCS_HOST_EFER_HIGH";
1028 static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL";
1029 static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH";
1030 static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS";
1031 static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS";
1032 static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP";
1033 static const char VMCS_PG_FAULT_ERR_MASK_STR[] = "PAGE_FAULT_ERROR_MASK";
1034 static const char VMCS_PG_FAULT_ERR_MATCH_STR[] = "PAGE_FAULT_ERROR_MATCH";
1035 static const char VMCS_CR3_TGT_CNT_STR[] = "CR3_TARGET_COUNT";
1036 static const char VMCS_EXIT_CTRLS_STR[] = "VM_EXIT_CTRLS";
1037 static const char VMCS_EXIT_MSR_STORE_CNT_STR[] = "VM_EXIT_MSR_STORE_COUNT";
1038 static const char VMCS_EXIT_MSR_LOAD_CNT_STR[] = "VM_EXIT_MSR_LOAD_COUNT";
1039 static const char VMCS_ENTRY_CTRLS_STR[] = "VM_ENTRY_CTRLS";
1040 static const char VMCS_ENTRY_MSR_LOAD_CNT_STR[] = "VM_ENTRY_MSR_LOAD_COUNT";
1041 static const char VMCS_ENTRY_INT_INFO_STR[] = "VM_ENTRY_INT_INFO_FIELD";
1042 static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR";
1043 static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH";
1044 static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD";
1045 static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS";
1046 static const char VMCS_PLE_GAP_STR[] = "PLE_GAP";
1047 static const char VMCS_PLE_WINDOW_STR[] = "PLE_WINDOW";
1048 static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR";
1049 static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON";
1050 static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO";
1051 static const char VMCS_EXIT_INT_ERR_STR[] = "VM_EXIT_INT_ERROR";
1052 static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO";
1053 static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR";
1054 static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH";
1055 static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
1056 static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT";
1057 static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT";
1058 static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT";
1059 static const char VMCS_GUEST_DS_LIMIT_STR[] = "GUEST_DS_LIMIT";
1060 static const char VMCS_GUEST_FS_LIMIT_STR[] = "GUEST_FS_LIMIT";
1061 static const char VMCS_GUEST_GS_LIMIT_STR[] = "GUEST_GS_LIMIT";
1062 static const char VMCS_GUEST_LDTR_LIMIT_STR[] = "GUEST_LDTR_LIMIT";
1063 static const char VMCS_GUEST_TR_LIMIT_STR[] = "GUEST_TR_LIMIT";
1064 static const char VMCS_GUEST_GDTR_LIMIT_STR[] = "GUEST_GDTR_LIMIT";
1065 static const char VMCS_GUEST_IDTR_LIMIT_STR[] = "GUEST_IDTR_LIMIT";
1066 static const char VMCS_GUEST_ES_ACCESS_STR[] = "GUEST_ES_ACCESS";
1067 static const char VMCS_GUEST_CS_ACCESS_STR[] = "GUEST_CS_ACCESS";
1068 static const char VMCS_GUEST_SS_ACCESS_STR[] = "GUEST_SS_ACCESS";
1069 static const char VMCS_GUEST_DS_ACCESS_STR[] = "GUEST_DS_ACCESS";
1070 static const char VMCS_GUEST_FS_ACCESS_STR[] = "GUEST_FS_ACCESS";
1071 static const char VMCS_GUEST_GS_ACCESS_STR[] = "GUEST_GS_ACCESS";
1072 static const char VMCS_GUEST_LDTR_ACCESS_STR[] = "GUEST_LDTR_ACCESS";
1073 static const char VMCS_GUEST_TR_ACCESS_STR[] = "GUEST_TR_ACCESS";
1074 static const char VMCS_GUEST_INT_STATE_STR[] = "GUEST_INT_STATE";
1075 static const char VMCS_GUEST_ACTIVITY_STATE_STR[] = "GUEST_ACTIVITY_STATE";
1076 static const char VMCS_GUEST_SMBASE_STR[] = "GUEST_SMBASE";
1077 static const char VMCS_GUEST_SYSENTER_CS_STR[] = "GUEST_SYSENTER_CS";
1078 static const char VMCS_PREEMPT_TIMER_STR[] = "PREEMPT_TIMER";
1079 static const char VMCS_HOST_SYSENTER_CS_STR[] = "HOST_SYSENTER_CS";
1080 static const char VMCS_CR0_MASK_STR[] = "CR0_GUEST_HOST_MASK";
1081 static const char VMCS_CR4_MASK_STR[] = "CR4_GUEST_HOST_MASK";
1082 static const char VMCS_CR0_READ_SHDW_STR[] = "CR0_READ_SHADOW";
1083 static const char VMCS_CR4_READ_SHDW_STR[] = "CR4_READ_SHADOW";
1084 static const char VMCS_CR3_TGT_VAL_0_STR[] = "CR3_TARGET_VALUE_0";
1085 static const char VMCS_CR3_TGT_VAL_1_STR[] = "CR3_TARGET_VALUE_1";
1086 static const char VMCS_CR3_TGT_VAL_2_STR[] = "CR3_TARGET_VALUE_2";
1087 static const char VMCS_CR3_TGT_VAL_3_STR[] = "CR3_TARGET_VALUE_3";
1088 static const char VMCS_EXIT_QUAL_STR[] = "EXIT_QUALIFICATION";
1089 static const char VMCS_IO_RCX_STR[] = "IO_RCX";
1090 static const char VMCS_IO_RSI_STR[] = "IO_RSI";
1091 static const char VMCS_IO_RDI_STR[] = "IO_RDI";
1092 static const char VMCS_IO_RIP_STR[] = "IO_RIP";
1093 static const char VMCS_GUEST_LINEAR_ADDR_STR[] = "GUEST_LINEAR_ADDR";
1094 static const char VMCS_GUEST_CR0_STR[] = "GUEST_CR0";
1095 static const char VMCS_GUEST_CR3_STR[] = "GUEST_CR3";
1096 static const char VMCS_GUEST_CR4_STR[] = "GUEST_CR4";
1097 static const char VMCS_GUEST_ES_BASE_STR[] = "GUEST_ES_BASE";
1098 static const char VMCS_GUEST_CS_BASE_STR[] = "GUEST_CS_BASE";
1099 static const char VMCS_GUEST_SS_BASE_STR[] = "GUEST_SS_BASE";
1100 static const char VMCS_GUEST_DS_BASE_STR[] = "GUEST_DS_BASE";
1101 static const char VMCS_GUEST_FS_BASE_STR[] = "GUEST_FS_BASE";
1102 static const char VMCS_GUEST_GS_BASE_STR[] = "GUEST_GS_BASE";
1103 static const char VMCS_GUEST_LDTR_BASE_STR[] = "GUEST_LDTR_BASE";
1104 static const char VMCS_GUEST_TR_BASE_STR[] = "GUEST_TR_BASE";
1105 static const char VMCS_GUEST_GDTR_BASE_STR[] = "GUEST_GDTR_BASE";
1106 static const char VMCS_GUEST_IDTR_BASE_STR[] = "GUEST_IDTR_BASE";
1107 static const char VMCS_GUEST_DR7_STR[] = "GUEST_DR7";
1108 static const char VMCS_GUEST_RSP_STR[] = "GUEST_RSP";
1109 static const char VMCS_GUEST_RIP_STR[] = "GUEST_RIP";
1110 static const char VMCS_GUEST_RFLAGS_STR[] = "GUEST_RFLAGS";
1111 static const char VMCS_GUEST_PENDING_DBG_EXCP_STR[] = "GUEST_PENDING_DEBUG_EXCS";
1112 static const char VMCS_GUEST_SYSENTER_ESP_STR[] = "GUEST_SYSENTER_ESP";
1113 static const char VMCS_GUEST_SYSENTER_EIP_STR[] = "GUEST_SYSENTER_EIP";
1114 static const char VMCS_HOST_CR0_STR[] = "HOST_CR0";
1115 static const char VMCS_HOST_CR3_STR[] = "HOST_CR3";
1116 static const char VMCS_HOST_CR4_STR[] = "HOST_CR4";
1117 static const char VMCS_HOST_FS_BASE_STR[] = "HOST_FS_BASE";
1118 static const char VMCS_HOST_GS_BASE_STR[] = "HOST_GS_BASE";
1119 static const char VMCS_HOST_TR_BASE_STR[] = "HOST_TR_BASE";
1120 static const char VMCS_HOST_GDTR_BASE_STR[] = "HOST_GDTR_BASE";
1121 static const char VMCS_HOST_IDTR_BASE_STR[] = "HOST_IDTR_BASE";
1122 static const char VMCS_HOST_SYSENTER_ESP_STR[] = "HOST_SYSENTER_ESP";
1123 static const char VMCS_HOST_SYSENTER_EIP_STR[] = "HOST_SYSENTER_EIP";
1124 static const char VMCS_HOST_RSP_STR[] = "HOST_RSP";
1125 static const char VMCS_HOST_RIP_STR[] = "HOST_RIP";
1126
1127
1128
1129 const char * v3_vmcs_field_to_str(vmcs_field_t field) {   
1130     switch (field) {
1131         case VMCS_VPID:
1132             return VMCS_VPID_STR;
1133         case VMCS_GUEST_ES_SELECTOR:
1134             return VMCS_GUEST_ES_SELECTOR_STR;
1135         case VMCS_GUEST_CS_SELECTOR:
1136             return VMCS_GUEST_CS_SELECTOR_STR;
1137         case VMCS_GUEST_SS_SELECTOR:
1138             return VMCS_GUEST_SS_SELECTOR_STR;
1139         case VMCS_GUEST_DS_SELECTOR:
1140             return VMCS_GUEST_DS_SELECTOR_STR;
1141         case VMCS_GUEST_FS_SELECTOR:
1142             return VMCS_GUEST_FS_SELECTOR_STR;
1143         case VMCS_GUEST_GS_SELECTOR:
1144             return VMCS_GUEST_GS_SELECTOR_STR;
1145         case VMCS_GUEST_LDTR_SELECTOR:
1146             return VMCS_GUEST_LDTR_SELECTOR_STR;
1147         case VMCS_GUEST_TR_SELECTOR:
1148             return VMCS_GUEST_TR_SELECTOR_STR;
1149         case VMCS_HOST_ES_SELECTOR:
1150             return VMCS_HOST_ES_SELECTOR_STR;
1151         case VMCS_HOST_CS_SELECTOR:
1152             return VMCS_HOST_CS_SELECTOR_STR;
1153         case VMCS_HOST_SS_SELECTOR:
1154             return VMCS_HOST_SS_SELECTOR_STR;
1155         case VMCS_HOST_DS_SELECTOR:
1156             return VMCS_HOST_DS_SELECTOR_STR;
1157         case VMCS_HOST_FS_SELECTOR:
1158             return VMCS_HOST_FS_SELECTOR_STR;
1159         case VMCS_HOST_GS_SELECTOR:
1160             return VMCS_HOST_GS_SELECTOR_STR;
1161         case VMCS_HOST_TR_SELECTOR:
1162             return VMCS_HOST_TR_SELECTOR_STR;
1163         case VMCS_IO_BITMAP_A_ADDR:
1164             return VMCS_IO_BITMAP_A_ADDR_STR;
1165         case VMCS_IO_BITMAP_A_ADDR_HIGH:
1166             return VMCS_IO_BITMAP_A_ADDR_HIGH_STR;
1167         case VMCS_IO_BITMAP_B_ADDR:
1168             return VMCS_IO_BITMAP_B_ADDR_STR;
1169         case VMCS_IO_BITMAP_B_ADDR_HIGH:
1170             return VMCS_IO_BITMAP_B_ADDR_HIGH_STR;
1171         case VMCS_MSR_BITMAP:
1172             return VMCS_MSR_BITMAP_STR;
1173         case VMCS_MSR_BITMAP_HIGH:
1174             return VMCS_MSR_BITMAP_HIGH_STR;
1175         case VMCS_EXIT_MSR_STORE_ADDR:
1176             return VMCS_EXIT_MSR_STORE_ADDR_STR;
1177         case VMCS_EXIT_MSR_STORE_ADDR_HIGH:
1178             return VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR;
1179         case VMCS_EXIT_MSR_LOAD_ADDR:
1180             return VMCS_EXIT_MSR_LOAD_ADDR_STR;
1181         case VMCS_EXIT_MSR_LOAD_ADDR_HIGH:
1182             return VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR;
1183         case VMCS_ENTRY_MSR_LOAD_ADDR:
1184             return VMCS_ENTRY_MSR_LOAD_ADDR_STR;
1185         case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH:
1186             return VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR;
1187         case VMCS_EXEC_PTR:
1188             return VMCS_EXEC_PTR_STR;
1189         case VMCS_EXEC_PTR_HIGH:
1190             return VMCS_EXEC_PTR_HIGH_STR;
1191         case VMCS_TSC_OFFSET:
1192             return VMCS_TSC_OFFSET_STR;
1193         case VMCS_TSC_OFFSET_HIGH:
1194             return VMCS_TSC_OFFSET_HIGH_STR;
1195         case VMCS_VAPIC_ADDR:
1196             return VMCS_VAPIC_ADDR_STR;
1197         case VMCS_VAPIC_ADDR_HIGH:
1198             return VMCS_VAPIC_ADDR_HIGH_STR;
1199         case VMCS_APIC_ACCESS_ADDR:
1200             return VMCS_APIC_ACCESS_ADDR_STR;
1201         case VMCS_APIC_ACCESS_ADDR_HIGH:
1202             return VMCS_APIC_ACCESS_ADDR_HIGH_STR;
1203         case VMCS_EPT_PTR:
1204             return VMCS_EPT_PTR_STR;
1205         case VMCS_EPT_PTR_HIGH:
1206             return VMCS_EPT_PTR_HIGH_STR;
1207         case VMCS_GUEST_PHYS_ADDR:
1208             return VMCS_GUEST_PHYS_ADDR_STR;
1209         case VMCS_GUEST_PHYS_ADDR_HIGH:
1210             return VMCS_GUEST_PHYS_ADDR_HIGH_STR;
1211         case VMCS_LINK_PTR:
1212             return VMCS_LINK_PTR_STR;
1213         case VMCS_LINK_PTR_HIGH:
1214             return VMCS_LINK_PTR_HIGH_STR;
1215         case VMCS_GUEST_DBG_CTL:
1216             return VMCS_GUEST_DBG_CTL_STR;
1217         case VMCS_GUEST_DBG_CTL_HIGH:
1218             return VMCS_GUEST_DBG_CTL_HIGH_STR;
1219         case VMCS_GUEST_PAT:
1220             return VMCS_GUEST_PAT_STR;
1221         case VMCS_GUEST_PAT_HIGH:
1222             return VMCS_GUEST_PAT_HIGH_STR;
1223         case VMCS_GUEST_EFER:
1224             return VMCS_GUEST_EFER_STR;
1225         case VMCS_GUEST_EFER_HIGH:
1226             return VMCS_GUEST_EFER_HIGH_STR;
1227         case VMCS_GUEST_PERF_GLOBAL_CTRL:
1228             return VMCS_GUEST_PERF_GLOBAL_CTRL_STR;
1229         case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
1230             return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR;
1231         case VMCS_GUEST_PDPTE0:
1232             return VMCS_GUEST_PDPTE0_STR;
1233         case VMCS_GUEST_PDPTE0_HIGH:
1234             return VMCS_GUEST_PDPTE0_HIGH_STR;
1235         case VMCS_GUEST_PDPTE1:
1236             return VMCS_GUEST_PDPTE1_STR;
1237         case VMCS_GUEST_PDPTE1_HIGH:
1238             return VMCS_GUEST_PDPTE1_HIGH_STR;
1239         case VMCS_GUEST_PDPTE2:
1240             return VMCS_GUEST_PDPTE2_STR;
1241         case VMCS_GUEST_PDPTE2_HIGH:
1242             return VMCS_GUEST_PDPTE2_HIGH_STR;
1243         case VMCS_GUEST_PDPTE3:
1244             return VMCS_GUEST_PDPTE3_STR;
1245         case VMCS_GUEST_PDPTE3_HIGH:
1246             return VMCS_GUEST_PDPTE3_HIGH_STR;
1247         case VMCS_HOST_PAT:
1248             return VMCS_HOST_PAT_STR;
1249         case VMCS_HOST_PAT_HIGH:
1250             return VMCS_HOST_PAT_HIGH_STR;
1251         case VMCS_HOST_EFER:
1252             return VMCS_HOST_EFER_STR;
1253         case VMCS_HOST_EFER_HIGH:
1254             return VMCS_HOST_EFER_HIGH_STR;
1255         case VMCS_HOST_PERF_GLOBAL_CTRL:
1256             return VMCS_HOST_PERF_GLOBAL_CTRL_STR;
1257         case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
1258             return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR;
1259         case VMCS_PIN_CTRLS:
1260             return VMCS_PIN_CTRLS_STR;
1261         case VMCS_PROC_CTRLS:
1262             return VMCS_PROC_CTRLS_STR;
1263         case VMCS_EXCP_BITMAP:
1264             return VMCS_EXCP_BITMAP_STR;
1265         case VMCS_PG_FAULT_ERR_MASK:
1266             return VMCS_PG_FAULT_ERR_MASK_STR;
1267         case VMCS_PG_FAULT_ERR_MATCH:
1268             return VMCS_PG_FAULT_ERR_MATCH_STR;
1269         case VMCS_CR3_TGT_CNT:
1270             return VMCS_CR3_TGT_CNT_STR;
1271         case VMCS_EXIT_CTRLS:
1272             return VMCS_EXIT_CTRLS_STR;
1273         case VMCS_EXIT_MSR_STORE_CNT:
1274             return VMCS_EXIT_MSR_STORE_CNT_STR;
1275         case VMCS_EXIT_MSR_LOAD_CNT:
1276             return VMCS_EXIT_MSR_LOAD_CNT_STR;
1277         case VMCS_ENTRY_CTRLS:
1278             return VMCS_ENTRY_CTRLS_STR;
1279         case VMCS_ENTRY_MSR_LOAD_CNT:
1280             return VMCS_ENTRY_MSR_LOAD_CNT_STR;
1281         case VMCS_ENTRY_INT_INFO:
1282             return VMCS_ENTRY_INT_INFO_STR;
1283         case VMCS_ENTRY_EXCP_ERR:
1284             return VMCS_ENTRY_EXCP_ERR_STR;
1285         case VMCS_ENTRY_INSTR_LEN:
1286             return VMCS_ENTRY_INSTR_LEN_STR;
1287         case VMCS_TPR_THRESHOLD:
1288             return VMCS_TPR_THRESHOLD_STR;
1289         case VMCS_SEC_PROC_CTRLS:
1290             return VMCS_SEC_PROC_CTRLS_STR;
1291         case VMCS_PLE_GAP:
1292             return VMCS_PLE_GAP_STR;
1293         case VMCS_PLE_WINDOW:
1294             return VMCS_PLE_WINDOW_STR;
1295         case VMCS_INSTR_ERR:
1296             return VMCS_INSTR_ERR_STR;
1297         case VMCS_EXIT_REASON:
1298             return VMCS_EXIT_REASON_STR;
1299         case VMCS_EXIT_INT_INFO:
1300             return VMCS_EXIT_INT_INFO_STR;
1301         case VMCS_EXIT_INT_ERR:
1302             return VMCS_EXIT_INT_ERR_STR;
1303         case VMCS_IDT_VECTOR_INFO:
1304             return VMCS_IDT_VECTOR_INFO_STR;
1305         case VMCS_IDT_VECTOR_ERR:
1306             return VMCS_IDT_VECTOR_ERR_STR;
1307         case VMCS_EXIT_INSTR_LEN:
1308             return VMCS_EXIT_INSTR_LEN_STR;
1309         case VMCS_EXIT_INSTR_INFO:
1310             return VMCS_EXIT_INSTR_INFO_STR;
1311         case VMCS_GUEST_ES_LIMIT:
1312             return VMCS_GUEST_ES_LIMIT_STR;
1313         case VMCS_GUEST_CS_LIMIT:
1314             return VMCS_GUEST_CS_LIMIT_STR;
1315         case VMCS_GUEST_SS_LIMIT:
1316             return VMCS_GUEST_SS_LIMIT_STR;
1317         case VMCS_GUEST_DS_LIMIT:
1318             return VMCS_GUEST_DS_LIMIT_STR;
1319         case VMCS_GUEST_FS_LIMIT:
1320             return VMCS_GUEST_FS_LIMIT_STR;
1321         case VMCS_GUEST_GS_LIMIT:
1322             return VMCS_GUEST_GS_LIMIT_STR;
1323         case VMCS_GUEST_LDTR_LIMIT:
1324             return VMCS_GUEST_LDTR_LIMIT_STR;
1325         case VMCS_GUEST_TR_LIMIT:
1326             return VMCS_GUEST_TR_LIMIT_STR;
1327         case VMCS_GUEST_GDTR_LIMIT:
1328             return VMCS_GUEST_GDTR_LIMIT_STR;
1329         case VMCS_GUEST_IDTR_LIMIT:
1330             return VMCS_GUEST_IDTR_LIMIT_STR;
1331         case VMCS_GUEST_ES_ACCESS:
1332             return VMCS_GUEST_ES_ACCESS_STR;
1333         case VMCS_GUEST_CS_ACCESS:
1334             return VMCS_GUEST_CS_ACCESS_STR;
1335         case VMCS_GUEST_SS_ACCESS:
1336             return VMCS_GUEST_SS_ACCESS_STR;
1337         case VMCS_GUEST_DS_ACCESS:
1338             return VMCS_GUEST_DS_ACCESS_STR;
1339         case VMCS_GUEST_FS_ACCESS:
1340             return VMCS_GUEST_FS_ACCESS_STR;
1341         case VMCS_GUEST_GS_ACCESS:
1342             return VMCS_GUEST_GS_ACCESS_STR;
1343         case VMCS_GUEST_LDTR_ACCESS:
1344             return VMCS_GUEST_LDTR_ACCESS_STR;
1345         case VMCS_GUEST_TR_ACCESS:
1346             return VMCS_GUEST_TR_ACCESS_STR;
1347         case VMCS_GUEST_INT_STATE:
1348             return VMCS_GUEST_INT_STATE_STR;
1349         case VMCS_GUEST_ACTIVITY_STATE:
1350             return VMCS_GUEST_ACTIVITY_STATE_STR;
1351         case VMCS_GUEST_SMBASE:
1352             return VMCS_GUEST_SMBASE_STR;
1353         case VMCS_GUEST_SYSENTER_CS:
1354             return VMCS_GUEST_SYSENTER_CS_STR;
1355         case VMCS_PREEMPT_TIMER:
1356             return VMCS_PREEMPT_TIMER_STR;
1357         case VMCS_HOST_SYSENTER_CS:         
1358             return VMCS_HOST_SYSENTER_CS_STR;
1359         case VMCS_CR0_MASK:
1360             return VMCS_CR0_MASK_STR;
1361         case VMCS_CR4_MASK:
1362             return VMCS_CR4_MASK_STR;
1363         case VMCS_CR0_READ_SHDW:
1364             return VMCS_CR0_READ_SHDW_STR;
1365         case VMCS_CR4_READ_SHDW:
1366             return VMCS_CR4_READ_SHDW_STR;
1367         case VMCS_CR3_TGT_VAL_0:
1368             return VMCS_CR3_TGT_VAL_0_STR;
1369         case VMCS_CR3_TGT_VAL_1:
1370             return VMCS_CR3_TGT_VAL_1_STR;
1371         case VMCS_CR3_TGT_VAL_2:
1372             return VMCS_CR3_TGT_VAL_2_STR;
1373         case VMCS_CR3_TGT_VAL_3:
1374             return VMCS_CR3_TGT_VAL_3_STR;
1375         case VMCS_EXIT_QUAL:
1376             return VMCS_EXIT_QUAL_STR;
1377         case VMCS_IO_RCX:
1378             return VMCS_IO_RCX_STR;
1379         case VMCS_IO_RSI:
1380             return VMCS_IO_RSI_STR;
1381         case VMCS_IO_RDI:
1382             return VMCS_IO_RDI_STR;
1383         case VMCS_IO_RIP:
1384             return VMCS_IO_RIP_STR;
1385         case VMCS_GUEST_LINEAR_ADDR:
1386             return VMCS_GUEST_LINEAR_ADDR_STR;
1387         case VMCS_GUEST_CR0:
1388             return VMCS_GUEST_CR0_STR;
1389         case VMCS_GUEST_CR3:
1390             return VMCS_GUEST_CR3_STR;
1391         case VMCS_GUEST_CR4:
1392             return VMCS_GUEST_CR4_STR;
1393         case VMCS_GUEST_ES_BASE:
1394             return VMCS_GUEST_ES_BASE_STR;
1395         case VMCS_GUEST_CS_BASE:
1396             return VMCS_GUEST_CS_BASE_STR;
1397         case VMCS_GUEST_SS_BASE:
1398             return VMCS_GUEST_SS_BASE_STR;
1399         case VMCS_GUEST_DS_BASE:
1400             return VMCS_GUEST_DS_BASE_STR;
1401         case VMCS_GUEST_FS_BASE:
1402             return VMCS_GUEST_FS_BASE_STR;
1403         case VMCS_GUEST_GS_BASE:
1404             return VMCS_GUEST_GS_BASE_STR;
1405         case VMCS_GUEST_LDTR_BASE:
1406             return VMCS_GUEST_LDTR_BASE_STR;
1407         case VMCS_GUEST_TR_BASE:
1408             return VMCS_GUEST_TR_BASE_STR;
1409         case VMCS_GUEST_GDTR_BASE:
1410             return VMCS_GUEST_GDTR_BASE_STR;
1411         case VMCS_GUEST_IDTR_BASE:
1412             return VMCS_GUEST_IDTR_BASE_STR;
1413         case VMCS_GUEST_DR7:
1414             return VMCS_GUEST_DR7_STR;
1415         case VMCS_GUEST_RSP:
1416             return VMCS_GUEST_RSP_STR;
1417         case VMCS_GUEST_RIP:
1418             return VMCS_GUEST_RIP_STR;
1419         case VMCS_GUEST_RFLAGS:
1420             return VMCS_GUEST_RFLAGS_STR;
1421         case VMCS_GUEST_PENDING_DBG_EXCP:
1422             return VMCS_GUEST_PENDING_DBG_EXCP_STR;
1423         case VMCS_GUEST_SYSENTER_ESP:
1424             return VMCS_GUEST_SYSENTER_ESP_STR;
1425         case VMCS_GUEST_SYSENTER_EIP:
1426             return VMCS_GUEST_SYSENTER_EIP_STR;
1427         case VMCS_HOST_CR0:
1428             return VMCS_HOST_CR0_STR;
1429         case VMCS_HOST_CR3:
1430             return VMCS_HOST_CR3_STR;
1431         case VMCS_HOST_CR4:
1432             return VMCS_HOST_CR4_STR;
1433         case VMCS_HOST_FS_BASE:
1434             return VMCS_HOST_FS_BASE_STR;
1435         case VMCS_HOST_GS_BASE:
1436             return VMCS_HOST_GS_BASE_STR;
1437         case VMCS_HOST_TR_BASE:
1438             return VMCS_HOST_TR_BASE_STR;
1439         case VMCS_HOST_GDTR_BASE:
1440             return VMCS_HOST_GDTR_BASE_STR;
1441         case VMCS_HOST_IDTR_BASE:
1442             return VMCS_HOST_IDTR_BASE_STR;
1443         case VMCS_HOST_SYSENTER_ESP:
1444             return VMCS_HOST_SYSENTER_ESP_STR;
1445         case VMCS_HOST_SYSENTER_EIP:
1446             return VMCS_HOST_SYSENTER_EIP_STR;
1447         case VMCS_HOST_RSP:
1448             return VMCS_HOST_RSP_STR;
1449         case VMCS_HOST_RIP:
1450             return VMCS_HOST_RIP_STR;
1451         default:
1452             return NULL;
1453     }
1454 }
1455
1456
1457