Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


Handling of pause exits (currently just noop, but power management would go here)
[palacios-OLD.git] / palacios / src / palacios / vmcs.c
1 #include <palacios/vmcs.h>
2
3
4
5
6
7
8 //extern char * exception_names;
9 //
10 // Ignores "HIGH" addresses - 32 bit only for now
11 //
12
13
14 #define CHK_VMCS_READ(tag, val) {if (VMCS_READ(tag, val) != 0) return -1;}
15 #define CHK_VMCS_WRITE(tag, val) {if (VMCS_WRITE(tag, val) != 0) return -1;}
16
17
18
19 int CopyOutVMCSGuestStateArea(struct VMCSGuestStateArea *p) {
20   CHK_VMCS_READ(GUEST_CR0, &(p->cr0));
21   CHK_VMCS_READ(GUEST_CR3, &(p->cr3));
22   CHK_VMCS_READ(GUEST_CR4, &(p->cr4));
23   CHK_VMCS_READ(GUEST_DR7, &(p->dr7));
24   CHK_VMCS_READ(GUEST_RSP, &(p->rsp));
25   CHK_VMCS_READ(GUEST_RIP, &(p->rip));
26   CHK_VMCS_READ(GUEST_RFLAGS, &(p->rflags));
27   CHK_VMCS_READ(VMCS_GUEST_CS_SELECTOR, &(p->cs.selector));
28   CHK_VMCS_READ(VMCS_GUEST_SS_SELECTOR, &(p->ss.selector));
29   CHK_VMCS_READ(VMCS_GUEST_DS_SELECTOR, &(p->ds.selector));
30   CHK_VMCS_READ(VMCS_GUEST_ES_SELECTOR, &(p->es.selector));
31   CHK_VMCS_READ(VMCS_GUEST_FS_SELECTOR, &(p->fs.selector));
32   CHK_VMCS_READ(VMCS_GUEST_GS_SELECTOR, &(p->gs.selector));
33   CHK_VMCS_READ(VMCS_GUEST_LDTR_SELECTOR, &(p->ldtr.selector));
34   CHK_VMCS_READ(VMCS_GUEST_TR_SELECTOR, &(p->tr.selector));
35   CHK_VMCS_READ(GUEST_CS_BASE, &(p->cs.baseAddr));
36   CHK_VMCS_READ(GUEST_SS_BASE, &(p->ss.baseAddr));
37   CHK_VMCS_READ(GUEST_DS_BASE, &(p->ds.baseAddr));
38   CHK_VMCS_READ(GUEST_ES_BASE, &(p->es.baseAddr));
39   CHK_VMCS_READ(GUEST_FS_BASE, &(p->fs.baseAddr));
40   CHK_VMCS_READ(GUEST_GS_BASE, &(p->gs.baseAddr));
41   CHK_VMCS_READ(GUEST_LDTR_BASE, &(p->ldtr.baseAddr));
42   CHK_VMCS_READ(GUEST_TR_BASE, &(p->tr.baseAddr));
43   CHK_VMCS_READ(GUEST_CS_LIMIT, &(p->cs.limit));
44   CHK_VMCS_READ(GUEST_SS_LIMIT, &(p->ss.limit));
45   CHK_VMCS_READ(GUEST_DS_LIMIT, &(p->ds.limit));
46   CHK_VMCS_READ(GUEST_ES_LIMIT, &(p->es.limit));
47   CHK_VMCS_READ(GUEST_FS_LIMIT, &(p->fs.limit));
48   CHK_VMCS_READ(GUEST_GS_LIMIT, &(p->gs.limit));
49   CHK_VMCS_READ(GUEST_LDTR_LIMIT, &(p->ldtr.limit));
50   CHK_VMCS_READ(GUEST_TR_LIMIT, &(p->tr.limit));
51   CHK_VMCS_READ(GUEST_CS_ACCESS, &(p->cs.access));
52   CHK_VMCS_READ(GUEST_SS_ACCESS, &(p->ss.access));
53   CHK_VMCS_READ(GUEST_DS_ACCESS, &(p->ds.access));
54   CHK_VMCS_READ(GUEST_ES_ACCESS, &(p->es.access));
55   CHK_VMCS_READ(GUEST_FS_ACCESS, &(p->fs.access));
56   CHK_VMCS_READ(GUEST_GS_ACCESS, &(p->gs.access));
57   CHK_VMCS_READ(GUEST_LDTR_ACCESS, &(p->ldtr.access));
58   CHK_VMCS_READ(GUEST_TR_ACCESS, &(p->tr.access));
59   CHK_VMCS_READ(GUEST_GDTR_BASE, &(p->gdtr.baseAddr));
60   CHK_VMCS_READ(GUEST_IDTR_BASE, &(p->idtr.baseAddr));
61   CHK_VMCS_READ(GUEST_GDTR_LIMIT, &(p->gdtr.limit));
62   CHK_VMCS_READ(GUEST_IDTR_LIMIT, &(p->idtr.limit));
63   CHK_VMCS_READ(GUEST_IA32_DEBUGCTL, &(p->dbg_ctrl));
64   CHK_VMCS_READ(GUEST_IA32_DEBUGCTL_HIGH, ((char *)&(p->dbg_ctrl)) + 4);
65   CHK_VMCS_READ(GUEST_IA32_SYSENTER_CS, &(p->sysenter_cs));
66   CHK_VMCS_READ(GUEST_IA32_SYSENTER_ESP, &(p->sysenter_esp));
67   CHK_VMCS_READ(GUEST_IA32_SYSENTER_EIP, &(p->sysenter_eip));
68   CHK_VMCS_READ(GUEST_SMBASE, &(p->smbase));
69
70   CHK_VMCS_READ(GUEST_ACTIVITY_STATE, &(p->activity));
71   CHK_VMCS_READ(GUEST_INT_STATE, &(p->interrupt_state));
72   CHK_VMCS_READ(GUEST_PENDING_DEBUG_EXCS, &(p->pending_dbg_exceptions));
73   CHK_VMCS_READ(VMCS_LINK_PTR, &(p->vmcs_link));
74   CHK_VMCS_READ(VMCS_LINK_PTR_HIGH, ((char *)&(p->vmcs_link)) + 4);
75   return 0;
76 }
77
78
79 int CopyInVMCSGuestStateArea(struct VMCSGuestStateArea *p) {
80   CHK_VMCS_WRITE(GUEST_CR0, &(p->cr0));
81   CHK_VMCS_WRITE(GUEST_CR3, &(p->cr3));
82   CHK_VMCS_WRITE(GUEST_CR4, &(p->cr4));
83   CHK_VMCS_WRITE(GUEST_DR7, &(p->dr7));
84   CHK_VMCS_WRITE(GUEST_RSP, &(p->rsp));
85   CHK_VMCS_WRITE(GUEST_RIP, &(p->rip));
86   CHK_VMCS_WRITE(GUEST_RFLAGS, &(p->rflags));
87   CHK_VMCS_WRITE(VMCS_GUEST_CS_SELECTOR, &(p->cs.selector));
88   CHK_VMCS_WRITE(VMCS_GUEST_SS_SELECTOR, &(p->ss.selector));
89   CHK_VMCS_WRITE(VMCS_GUEST_DS_SELECTOR, &(p->ds.selector));
90   CHK_VMCS_WRITE(VMCS_GUEST_ES_SELECTOR, &(p->es.selector));
91   CHK_VMCS_WRITE(VMCS_GUEST_FS_SELECTOR, &(p->fs.selector));
92   CHK_VMCS_WRITE(VMCS_GUEST_GS_SELECTOR, &(p->gs.selector));
93   CHK_VMCS_WRITE(VMCS_GUEST_LDTR_SELECTOR, &(p->ldtr.selector));
94   CHK_VMCS_WRITE(VMCS_GUEST_TR_SELECTOR, &(p->tr.selector));
95   CHK_VMCS_WRITE(GUEST_CS_BASE, &(p->cs.baseAddr));
96   CHK_VMCS_WRITE(GUEST_SS_BASE, &(p->ss.baseAddr));
97   CHK_VMCS_WRITE(GUEST_DS_BASE, &(p->ds.baseAddr));
98   CHK_VMCS_WRITE(GUEST_ES_BASE, &(p->es.baseAddr));
99   CHK_VMCS_WRITE(GUEST_FS_BASE, &(p->fs.baseAddr));
100   CHK_VMCS_WRITE(GUEST_GS_BASE, &(p->gs.baseAddr));
101   CHK_VMCS_WRITE(GUEST_LDTR_BASE, &(p->ldtr.baseAddr));
102   CHK_VMCS_WRITE(GUEST_TR_BASE, &(p->tr.baseAddr));
103   CHK_VMCS_WRITE(GUEST_CS_LIMIT, &(p->cs.limit));
104   CHK_VMCS_WRITE(GUEST_SS_LIMIT, &(p->ss.limit));
105   CHK_VMCS_WRITE(GUEST_DS_LIMIT, &(p->ds.limit));
106   CHK_VMCS_WRITE(GUEST_ES_LIMIT, &(p->es.limit));
107   CHK_VMCS_WRITE(GUEST_FS_LIMIT, &(p->fs.limit));
108   CHK_VMCS_WRITE(GUEST_GS_LIMIT, &(p->gs.limit));
109   CHK_VMCS_WRITE(GUEST_LDTR_LIMIT, &(p->ldtr.limit));
110   CHK_VMCS_WRITE(GUEST_TR_LIMIT, &(p->tr.limit));
111   CHK_VMCS_WRITE(GUEST_CS_ACCESS, &(p->cs.access));
112   CHK_VMCS_WRITE(GUEST_SS_ACCESS, &(p->ss.access));
113   CHK_VMCS_WRITE(GUEST_DS_ACCESS, &(p->ds.access));
114   CHK_VMCS_WRITE(GUEST_ES_ACCESS, &(p->es.access));
115   CHK_VMCS_WRITE(GUEST_FS_ACCESS, &(p->fs.access));
116   CHK_VMCS_WRITE(GUEST_GS_ACCESS, &(p->gs.access));
117   CHK_VMCS_WRITE(GUEST_LDTR_ACCESS, &(p->ldtr.access));
118   CHK_VMCS_WRITE(GUEST_TR_ACCESS, &(p->tr.access));
119   CHK_VMCS_WRITE(GUEST_GDTR_BASE, &(p->gdtr.baseAddr));
120   CHK_VMCS_WRITE(GUEST_IDTR_BASE, &(p->idtr.baseAddr));
121   CHK_VMCS_WRITE(GUEST_GDTR_LIMIT, &(p->gdtr.limit));
122   CHK_VMCS_WRITE(GUEST_IDTR_LIMIT, &(p->idtr.limit));
123   CHK_VMCS_WRITE(GUEST_IA32_DEBUGCTL, &(p->dbg_ctrl));
124   CHK_VMCS_WRITE(GUEST_IA32_DEBUGCTL_HIGH, ((char *)&(p->dbg_ctrl)) + 4);
125   CHK_VMCS_WRITE(GUEST_IA32_SYSENTER_CS, &(p->sysenter_cs));
126   CHK_VMCS_WRITE(GUEST_IA32_SYSENTER_ESP, &(p->sysenter_esp));
127   CHK_VMCS_WRITE(GUEST_IA32_SYSENTER_EIP, &(p->sysenter_eip));
128   CHK_VMCS_WRITE(GUEST_SMBASE, &(p->smbase));
129
130   CHK_VMCS_WRITE(GUEST_ACTIVITY_STATE, &(p->activity));
131   CHK_VMCS_WRITE(GUEST_INT_STATE, &(p->interrupt_state));
132   CHK_VMCS_WRITE(GUEST_PENDING_DEBUG_EXCS, &(p->pending_dbg_exceptions));
133   CHK_VMCS_WRITE(VMCS_LINK_PTR, &(p->vmcs_link));
134   CHK_VMCS_WRITE(VMCS_LINK_PTR_HIGH, ((char *)&(p->vmcs_link)) + 4);
135   return 0;
136 }
137
138
139
140 int CopyOutVMCSHostStateArea(struct VMCSHostStateArea *p) {
141   CHK_VMCS_READ(HOST_CR0, &(p->cr0));
142   CHK_VMCS_READ(HOST_CR3, &(p->cr3));
143   CHK_VMCS_READ(HOST_CR4, &(p->cr4));
144   CHK_VMCS_READ(HOST_RSP, &(p->rsp));
145   CHK_VMCS_READ(HOST_RIP, &(p->rip));
146   CHK_VMCS_READ(VMCS_HOST_CS_SELECTOR, &(p->csSelector));
147   CHK_VMCS_READ(VMCS_HOST_SS_SELECTOR, &(p->ssSelector));
148   CHK_VMCS_READ(VMCS_HOST_DS_SELECTOR, &(p->dsSelector));
149   CHK_VMCS_READ(VMCS_HOST_ES_SELECTOR, &(p->esSelector));
150   CHK_VMCS_READ(VMCS_HOST_FS_SELECTOR, &(p->fsSelector));
151   CHK_VMCS_READ(VMCS_HOST_GS_SELECTOR, &(p->gsSelector));
152   CHK_VMCS_READ(VMCS_HOST_TR_SELECTOR, &(p->trSelector));
153   CHK_VMCS_READ(HOST_FS_BASE, &(p->fsBaseAddr));
154   CHK_VMCS_READ(HOST_GS_BASE, &(p->gsBaseAddr));
155   CHK_VMCS_READ(HOST_TR_BASE, &(p->trBaseAddr));
156   CHK_VMCS_READ(HOST_GDTR_BASE, &(p->gdtrBaseAddr));
157   CHK_VMCS_READ(HOST_IDTR_BASE, &(p->idtrBaseAddr));
158   CHK_VMCS_READ(HOST_IA32_SYSENTER_CS, &(p->sysenter_cs));
159   CHK_VMCS_READ(HOST_IA32_SYSENTER_ESP, &(p->sysenter_esp));
160   CHK_VMCS_READ(HOST_IA32_SYSENTER_EIP, &(p->sysenter_eip));
161   return 0;
162 }
163
164
165
166 int CopyInVMCSHostStateArea(struct VMCSHostStateArea *p) {
167   CHK_VMCS_WRITE(HOST_CR0, &(p->cr0));
168   CHK_VMCS_WRITE(HOST_CR3, &(p->cr3));
169   CHK_VMCS_WRITE(HOST_CR4, &(p->cr4));
170   CHK_VMCS_WRITE(HOST_RSP, &(p->rsp));
171   CHK_VMCS_WRITE(HOST_RIP, &(p->rip));
172   CHK_VMCS_WRITE(VMCS_HOST_CS_SELECTOR, &(p->csSelector));
173   CHK_VMCS_WRITE(VMCS_HOST_SS_SELECTOR, &(p->ssSelector));
174   CHK_VMCS_WRITE(VMCS_HOST_DS_SELECTOR, &(p->dsSelector));
175   CHK_VMCS_WRITE(VMCS_HOST_ES_SELECTOR, &(p->esSelector));
176   CHK_VMCS_WRITE(VMCS_HOST_FS_SELECTOR, &(p->fsSelector));
177   CHK_VMCS_WRITE(VMCS_HOST_GS_SELECTOR, &(p->gsSelector));
178   CHK_VMCS_WRITE(VMCS_HOST_TR_SELECTOR, &(p->trSelector));
179   CHK_VMCS_WRITE(HOST_FS_BASE, &(p->fsBaseAddr));
180   CHK_VMCS_WRITE(HOST_GS_BASE, &(p->gsBaseAddr));
181   CHK_VMCS_WRITE(HOST_TR_BASE, &(p->trBaseAddr));
182   CHK_VMCS_WRITE(HOST_GDTR_BASE, &(p->gdtrBaseAddr));
183   CHK_VMCS_WRITE(HOST_IDTR_BASE, &(p->idtrBaseAddr));
184   CHK_VMCS_WRITE(HOST_IA32_SYSENTER_CS, &(p->sysenter_cs));
185   CHK_VMCS_WRITE(HOST_IA32_SYSENTER_ESP, &(p->sysenter_esp));
186   CHK_VMCS_WRITE(HOST_IA32_SYSENTER_EIP, &(p->sysenter_eip));
187   return 0;
188 }
189
190
191 int CopyOutVMCSExitCtrlFields(struct VMCSExitCtrlFields *p)
192 {
193   CHK_VMCS_READ(VM_EXIT_CTRLS,&(p->exitCtrls));
194   CHK_VMCS_READ(VM_EXIT_MSR_STORE_COUNT,&(p->msrStoreCount));
195   CHK_VMCS_READ(VM_EXIT_MSR_STORE_ADDR,&(p->msrStoreAddr));
196   CHK_VMCS_READ(VM_EXIT_MSR_LOAD_COUNT,&(p->msrLoadCount));
197   CHK_VMCS_READ(VM_EXIT_MSR_LOAD_ADDR,&(p->msrLoadAddr));
198   return 0;
199 }
200
201 int CopyInVMCSExitCtrlFields(struct VMCSExitCtrlFields *p)
202 {
203   CHK_VMCS_WRITE(VM_EXIT_CTRLS,&(p->exitCtrls));
204   CHK_VMCS_WRITE(VM_EXIT_MSR_STORE_COUNT,&(p->msrStoreCount));
205   CHK_VMCS_WRITE(VM_EXIT_MSR_STORE_ADDR,&(p->msrStoreAddr));
206   CHK_VMCS_WRITE(VM_EXIT_MSR_LOAD_COUNT,&(p->msrLoadCount));
207   CHK_VMCS_WRITE(VM_EXIT_MSR_LOAD_ADDR,&(p->msrLoadAddr));
208   return 0;
209 }
210
211
212 int CopyOutVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p)
213 {
214   CHK_VMCS_READ(VM_ENTRY_CTRLS,&(p->entryCtrls));
215   CHK_VMCS_READ(VM_ENTRY_MSR_LOAD_COUNT,&(p->msrLoadCount));
216   CHK_VMCS_READ(VM_ENTRY_MSR_LOAD_ADDR,&(p->msrLoadAddr));
217   CHK_VMCS_READ(VM_ENTRY_INT_INFO_FIELD,&(p->intInfo));
218   CHK_VMCS_READ(VM_ENTRY_EXCEPTION_ERROR,&(p->exceptionErrorCode));
219   CHK_VMCS_READ(VM_ENTRY_INSTR_LENGTH,&(p->instrLength));
220   return 0;
221 }
222
223 int CopyInVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p)
224 {
225   CHK_VMCS_WRITE(VM_ENTRY_CTRLS,&(p->entryCtrls));
226   CHK_VMCS_WRITE(VM_ENTRY_MSR_LOAD_COUNT,&(p->msrLoadCount));
227   CHK_VMCS_WRITE(VM_ENTRY_MSR_LOAD_ADDR,&(p->msrLoadAddr));
228   CHK_VMCS_WRITE(VM_ENTRY_INT_INFO_FIELD,&(p->intInfo));
229   CHK_VMCS_WRITE(VM_ENTRY_EXCEPTION_ERROR,&(p->exceptionErrorCode));
230   CHK_VMCS_WRITE(VM_ENTRY_INSTR_LENGTH,&(p->instrLength));
231   return 0;
232 }
233
234 int CopyOutVMCSExitInfoFields(struct VMCSExitInfoFields *p) {
235   CHK_VMCS_READ(EXIT_REASON,&(p->reason));
236   CHK_VMCS_READ(EXIT_QUALIFICATION,&(p->qualification));
237   CHK_VMCS_READ(VM_EXIT_INT_INFO,&(p->intInfo));
238   CHK_VMCS_READ(VM_EXIT_INT_ERROR,&(p->intErrorCode));
239   CHK_VMCS_READ(IDT_VECTOR_INFO,&(p->idtVectorInfo));
240   CHK_VMCS_READ(IDT_VECTOR_ERROR,&(p->idtVectorErrorCode));
241   CHK_VMCS_READ(VM_EXIT_INSTR_LENGTH,&(p->instrLength));
242   CHK_VMCS_READ(GUEST_LINEAR_ADDR,&(p->guestLinearAddr));
243   CHK_VMCS_READ(VMX_INSTR_INFO,&(p->instrInfo));
244   CHK_VMCS_READ(IO_RCX,&(p->ioRCX));
245   CHK_VMCS_READ(IO_RSI,&(p->ioRSI));
246   CHK_VMCS_READ(IO_RDI,&(p->ioRDI));
247   CHK_VMCS_READ(IO_RIP,&(p->ioRIP));
248   CHK_VMCS_READ(VM_INSTR_ERROR,&(p->instrErrorField));
249   return 0;
250 }
251
252
253 int CopyOutVMCSExecCtrlFields(struct VMCSExecCtrlFields *p)
254 {
255   CHK_VMCS_READ(PIN_VM_EXEC_CTRLS,&(p->pinCtrls));
256   CHK_VMCS_READ(PROC_VM_EXEC_CTRLS,&(p->procCtrls));
257   CHK_VMCS_READ(EXCEPTION_BITMAP,&(p->execBitmap));
258   CHK_VMCS_READ(PAGE_FAULT_ERROR_MASK,&(p->pageFaultErrorMask));
259   CHK_VMCS_READ(PAGE_FAULT_ERROR_MATCH,&(p->pageFaultErrorMatch));
260   CHK_VMCS_READ(IO_BITMAP_A_ADDR,&(p->ioBitmapA));
261   CHK_VMCS_READ(IO_BITMAP_B_ADDR,&(p->ioBitmapB));
262   CHK_VMCS_READ(TSC_OFFSET,&(p->tscOffset));
263   CHK_VMCS_READ(CR0_GUEST_HOST_MASK,&(p->cr0GuestHostMask));
264   CHK_VMCS_READ(CR0_READ_SHADOW,&(p->cr0ReadShadow));
265   CHK_VMCS_READ(CR4_GUEST_HOST_MASK,&(p->cr4GuestHostMask));
266   CHK_VMCS_READ(CR4_READ_SHADOW,&(p->cr4ReadShadow));
267   CHK_VMCS_READ(CR3_TARGET_COUNT, &(p->cr3TargetCount));
268   CHK_VMCS_READ(CR3_TARGET_VALUE_0, &(p->cr3TargetValue0));
269   CHK_VMCS_READ(CR3_TARGET_VALUE_1, &(p->cr3TargetValue1));
270   CHK_VMCS_READ(CR3_TARGET_VALUE_2, &(p->cr3TargetValue2));
271   CHK_VMCS_READ(CR3_TARGET_VALUE_3, &(p->cr3TargetValue3));
272   CHK_VMCS_READ(VIRT_APIC_PAGE_ADDR, &(p->virtApicPageAddr));
273   CHK_VMCS_READ(TPR_THRESHOLD, &(p->tprThreshold));
274   CHK_VMCS_READ(MSR_BITMAPS, &(p->MSRBitmapsBaseAddr));
275   CHK_VMCS_READ(VMCS_EXEC_PTR,&(p->vmcsExecPtr));
276   return 0;
277 }
278
279
280 int CopyInVMCSExecCtrlFields(struct VMCSExecCtrlFields *p)
281 {
282   CHK_VMCS_WRITE(PIN_VM_EXEC_CTRLS,&(p->pinCtrls));
283   CHK_VMCS_WRITE(PROC_VM_EXEC_CTRLS,&(p->procCtrls));
284   CHK_VMCS_WRITE(EXCEPTION_BITMAP,&(p->execBitmap));
285   CHK_VMCS_WRITE(PAGE_FAULT_ERROR_MASK,&(p->pageFaultErrorMask));
286   CHK_VMCS_WRITE(PAGE_FAULT_ERROR_MATCH,&(p->pageFaultErrorMatch));
287   CHK_VMCS_WRITE(IO_BITMAP_A_ADDR,&(p->ioBitmapA));
288   CHK_VMCS_WRITE(IO_BITMAP_B_ADDR,&(p->ioBitmapB));
289   CHK_VMCS_WRITE(TSC_OFFSET,&(p->tscOffset));
290   CHK_VMCS_WRITE(CR0_GUEST_HOST_MASK,&(p->cr0GuestHostMask));
291   CHK_VMCS_WRITE(CR0_READ_SHADOW,&(p->cr0ReadShadow));
292   CHK_VMCS_WRITE(CR4_GUEST_HOST_MASK,&(p->cr4GuestHostMask));
293   CHK_VMCS_WRITE(CR4_READ_SHADOW,&(p->cr4ReadShadow));
294   CHK_VMCS_WRITE(CR3_TARGET_COUNT, &(p->cr3TargetCount));
295   CHK_VMCS_WRITE(CR3_TARGET_VALUE_0, &(p->cr3TargetValue0));
296   CHK_VMCS_WRITE(CR3_TARGET_VALUE_1, &(p->cr3TargetValue1));
297   CHK_VMCS_WRITE(CR3_TARGET_VALUE_2, &(p->cr3TargetValue2));
298   CHK_VMCS_WRITE(CR3_TARGET_VALUE_3, &(p->cr3TargetValue3));
299   CHK_VMCS_WRITE(VIRT_APIC_PAGE_ADDR, &(p->virtApicPageAddr));
300   CHK_VMCS_WRITE(TPR_THRESHOLD, &(p->tprThreshold));
301   CHK_VMCS_WRITE(MSR_BITMAPS, &(p->MSRBitmapsBaseAddr));
302   CHK_VMCS_WRITE(VMCS_EXEC_PTR,&(p->vmcsExecPtr));
303   return 0;
304 }
305
306
307 int CopyOutVMCSData(struct VMCSData *p) {
308   if (CopyOutVMCSGuestStateArea(&(p->guestStateArea)) != 0) {
309     return -1;
310   }
311   if (CopyOutVMCSHostStateArea(&(p->hostStateArea)) != 0) {
312     return -1;
313   }
314   if (CopyOutVMCSExecCtrlFields(&(p->execCtrlFields)) != 0) {
315     return -1;
316   }
317   if (CopyOutVMCSExitCtrlFields(&(p->exitCtrlFields)) != 0) {
318     return -1;
319   }
320   if (CopyOutVMCSEntryCtrlFields(&(p->entryCtrlFields)) != 0) {
321     return -1;
322   }
323   if (CopyOutVMCSExitInfoFields(&(p->exitInfoFields)) != 0) {
324     return -1;
325   }
326   return 0;
327 }
328
329
330 int CopyInVMCSData(struct VMCSData *p) {
331   if (CopyInVMCSGuestStateArea(&(p->guestStateArea)) != 0) {
332     return -1;
333   }
334   if (CopyInVMCSHostStateArea(&(p->hostStateArea)) != 0) {
335     return -1;
336   }
337   if (CopyInVMCSExecCtrlFields(&(p->execCtrlFields)) != 0) {
338     return -1;
339   }
340   if (CopyInVMCSExitCtrlFields(&(p->exitCtrlFields)) != 0) {
341     return -1;
342   }
343   if (CopyInVMCSEntryCtrlFields(&(p->entryCtrlFields)) != 0) {
344     return -1;
345   }
346   return 0;
347 }
348
349
350 void PrintTrace_VMX_Regs(struct VMXRegs * regs) {
351   PrintTrace("==>VMX Register values:\n");
352   PrintTrace("EAX: %x\n", regs->eax);
353   PrintTrace("ECX: %x\n", regs->ecx);
354   PrintTrace("EDX: %x\n", regs->edx);
355   PrintTrace("EBX: %x\n", regs->ebx);
356   PrintTrace("ESP: %x\n", regs->esp);
357   PrintTrace("EBP: %x\n", regs->ebp);
358   PrintTrace("ESI: %x\n", regs->esi);
359   PrintTrace("EDI: %x\n", regs->edi);
360   PrintTrace("\n");
361 }
362
363
364 void PrintTrace_VMCSSegment(char * segname, struct VMCSSegment * seg, int abbr) {
365   PrintTrace("Segment: %s\n", segname);
366   if (abbr == 0) {
367     PrintTrace("\tSelector: %x\n", (uint_t)seg->selector);
368     PrintTrace("\tAccess: %x\n", *(uint_t*)&(seg->access));
369   }
370   PrintTrace("\tBase Addr: %x\n", (uint_t)seg->baseAddr);
371   PrintTrace("\tLimit: %x\n", (uint_t)seg->limit);
372
373 }
374
375
376 void PrintTrace_VMCSGuestStateArea(struct VMCSGuestStateArea * guestState) {
377   PrintTrace("==>Guest State Area\n");
378   PrintTrace("==>==> Guest Register State\n");
379   PrintTrace("GUEST_CR0: %x\n",(uint_t) guestState->cr0);
380   PrintTrace("GUEST_CR3: %x\n",(uint_t)guestState->cr3);
381   PrintTrace("GUEST_CR4: %x\n",(uint_t)guestState->cr4);
382   PrintTrace("GUEST_DR7: %x\n",(uint_t)guestState->dr7);
383   PrintTrace("GUEST_RSP: %x\n",(uint_t)guestState->rsp);
384   PrintTrace("GUEST_RIP: %x\n",(uint_t)guestState->rip);
385   PrintTrace("GUEST_RFLAGS: %x\n",(uint_t)guestState->rflags);
386
387   PrintTrace_VMCSSegment("Guest CS", &(guestState->cs), 0);
388   PrintTrace_VMCSSegment("Guest SS", &(guestState->ss), 0);
389   PrintTrace_VMCSSegment("Guest DS",&(guestState->ds), 0);
390   PrintTrace_VMCSSegment("Guest ES", &(guestState->es), 0);
391   PrintTrace_VMCSSegment("Guest FS", &(guestState->fs), 0);
392   PrintTrace_VMCSSegment("Guest GS", &(guestState->gs), 0);
393   PrintTrace_VMCSSegment("Guest LDTR", &(guestState->ldtr), 0);
394   PrintTrace_VMCSSegment("Guest TR", &(guestState->tr), 0);
395   PrintTrace_VMCSSegment("Guest GDTR", &(guestState->gdtr), 1);  
396   PrintTrace_VMCSSegment("Guest IDTR", &(guestState->idtr), 1);  
397
398
399   PrintTrace("GUEST_IA32_DEBUGCTL: %x\n",(uint_t)(guestState->dbg_ctrl & 0xffffffff));
400   PrintTrace("GUEST_IA32_DEBUGCTL_HIGH: %x\n",(uint_t)(guestState->dbg_ctrl >> 32) & 0xffffffff);
401   PrintTrace("GUEST_IA32_SYSENTER_CS: %x\n",guestState->sysenter_cs);
402   PrintTrace("GUEST_IA32_SYSENTER_ESP: %x\n",(uint_t)guestState->sysenter_esp);
403   PrintTrace("GUEST_IA32_SYSENTER_EIP: %x\n",(uint_t)guestState->sysenter_eip);
404   PrintTrace("GUEST_SMBASE: %x\n", (uint_t)guestState->smbase);
405
406   PrintTrace("==>==> Guest Non-Register State\n");
407   PrintTrace("GUEST_ACTIVITY_STATE: %x\n", (uint_t)guestState->activity);
408   PrintTrace("GUEST_INT_STATE: %x\n", (uint_t)guestState->interrupt_state);
409   PrintTrace("GUEST_PENDING_DEBUG_EXCS: %x\n", (uint_t)guestState->pending_dbg_exceptions);
410   PrintTrace("VMCS_LINK_PTR: %x\n", (uint_t)guestState->vmcs_link & 0xffffffff);
411   PrintTrace("VMCS_LINK_PTR_HIGH: %x\n", (uint_t)(guestState->vmcs_link >> 32) & 0xffffffff);
412 }
413
414
415 void PrintTrace_VMCSHostStateArea(struct VMCSHostStateArea * hostState) {
416   PrintTrace("\n==> Host State Area\n");
417   PrintTrace("HOST_CR0: %x\n", (uint_t)hostState->cr0);
418   PrintTrace("HOST_CR3: %x\n", (uint_t)hostState->cr3);
419   PrintTrace("HOST_CR4: %x\n", (uint_t)hostState->cr4);
420   PrintTrace("HOST_RSP: %x\n", (uint_t)hostState->rsp);
421   PrintTrace("HOST_RIP: %x\n", (uint_t)hostState->rip);
422   PrintTrace("VMCS_HOST_CS_SELECTOR: %x\n", (uint_t)hostState->csSelector);
423   PrintTrace("VMCS_HOST_SS_SELECTOR: %x\n", (uint_t)hostState->ssSelector);
424   PrintTrace("VMCS_HOST_DS_SELECTOR: %x\n", (uint_t)hostState->dsSelector);
425   PrintTrace("VMCS_HOST_ES_SELECTOR: %x\n", (uint_t)hostState->esSelector);
426   PrintTrace("VMCS_HOST_FS_SELECTOR: %x\n", (uint_t)hostState->fsSelector);
427   PrintTrace("VMCS_HOST_GS_SELECTOR: %x\n", (uint_t)hostState->gsSelector);
428   PrintTrace("VMCS_HOST_TR_SELECTOR: %x\n", (uint_t)hostState->trSelector);
429   PrintTrace("HOST_FS_BASE: %x\n", (uint_t)hostState->fsBaseAddr);
430   PrintTrace("HOST_GS_BASE: %x\n", (uint_t)hostState->gsBaseAddr);
431   PrintTrace("HOST_TR_BASE: %x\n", (uint_t)hostState->trBaseAddr);
432   PrintTrace("HOST_GDTR_BASE: %x\n", (uint_t)hostState->gdtrBaseAddr);
433   PrintTrace("HOST_IDTR_BASE: %x\n", (uint_t)hostState->idtrBaseAddr);
434   PrintTrace("HOST_IA32_SYSENTER_CS: %x\n", (uint_t)hostState->sysenter_cs);
435   PrintTrace("HOST_IA32_SYSENTER_ESP: %x\n", (uint_t)hostState->sysenter_esp);
436   PrintTrace("HOST_IA32_SYSENTER_EIP: %x\n", (uint_t)hostState->sysenter_eip);
437 }
438
439 void PrintTrace_VMCSExecCtrlFields(struct VMCSExecCtrlFields * execCtrls) {
440   PrintTrace("\n==> VM-Execution Controls:\n");
441   PrintTrace("PIN_VM_EXEC_CTRLS: %x\n", (uint_t) execCtrls->pinCtrls);
442   PrintTrace("PROC_VM_EXEC_CTRLS: %x\n", (uint_t) execCtrls->procCtrls);
443   PrintTrace("EXCEPTION_BITMAP: %x\n", (uint_t) execCtrls->execBitmap);
444   PrintTrace("PAGE_FAULT_ERROR_MASK: %x\n", (uint_t) execCtrls->pageFaultErrorMask);
445   PrintTrace("PAGE_FAULT_ERROR_MATCH: %x\n", (uint_t) execCtrls->pageFaultErrorMatch);
446   PrintTrace("IO_BITMAP_A_ADDR: %x\n", (uint_t) execCtrls->ioBitmapA);
447   //  PrintTrace("IO_BITMAP_A_ADDR_HIGH: %x\n", (uint_t) execCtrls->);
448   PrintTrace("IO_BITMAP_B_ADDR: %x\n", (uint_t) execCtrls->ioBitmapB);
449   // PrintTrace("IO_BITMAP_B_ADDR_HIGH: %x\n", (uint_t) execCtrls->);
450   PrintTrace("TSC_OFFSET: %x\n", (uint_t) execCtrls->tscOffset & 0xffffffff);
451   PrintTrace("TSC_OFFSET_HIGH: %x\n", (uint_t) (execCtrls->tscOffset >> 32) & 0xffffffff);
452   PrintTrace("CR0_GUEST_HOST_MASK: %x\n", (uint_t) execCtrls->cr0GuestHostMask);
453   PrintTrace("CR0_READ_SHADOW: %x\n", (uint_t) execCtrls->cr0ReadShadow);
454   PrintTrace("CR4_GUEST_HOST_MASK: %x\n", (uint_t) execCtrls->cr4GuestHostMask);
455   PrintTrace("CR4_READ_SHADOW: %x\n", (uint_t) execCtrls->cr4ReadShadow);
456   PrintTrace("CR3_TARGET_COUNT: %x\n", (uint_t) execCtrls->cr3TargetCount);
457   PrintTrace("CR3_TARGET_VALUE_0: %x\n", (uint_t) execCtrls->cr3TargetValue0);
458   PrintTrace("CR3_TARGET_VALUE_1: %x\n", (uint_t) execCtrls->cr3TargetValue1);
459   PrintTrace("CR3_TARGET_VALUE_2: %x\n", (uint_t) execCtrls->cr3TargetValue2);
460   PrintTrace("CR3_TARGET_VALUE_3: %x\n", (uint_t) execCtrls->cr3TargetValue3);
461   PrintTrace("VIRT_APIC_PAGE_ADDR: %x\n", (uint_t) execCtrls->virtApicPageAddr & 0xffffffff);
462   PrintTrace("VIRT_APIC_PAGE_ADDR_HIGH: %x\n", (uint_t) (execCtrls->virtApicPageAddr >> 32) & 0xffffffff);
463   PrintTrace("TPR_THRESHOLD: %x\n", (uint_t) execCtrls->tprThreshold);
464   PrintTrace("MSR_BITMAPS: %x\n", (uint_t) execCtrls->MSRBitmapsBaseAddr & 0xffffffff);
465   PrintTrace("MSR_BITMAPS_HIGH: %x\n", (uint_t) (execCtrls->MSRBitmapsBaseAddr >> 32) & 0xffffffff);
466   PrintTrace("VMCS_EXEC_PTR: %x\n", (uint_t) execCtrls->vmcsExecPtr & 0xffffffff);
467   PrintTrace("VMCS_EXEC_PTR_HIGH: %x\n", (uint_t) (execCtrls->vmcsExecPtr >> 32) & 0xffffffff);
468 }
469
470 void PrintTrace_VMCSExitCtrlFields(struct VMCSExitCtrlFields * exitCtrls) {
471   PrintTrace("\n==> VM Exit Controls\n");
472   PrintTrace("VM_EXIT_CTRLS: %x\n", (uint_t) exitCtrls->exitCtrls);
473   PrintTrace("VM_EXIT_MSR_STORE_COUNT: %x\n", (uint_t) exitCtrls->msrStoreCount);
474   PrintTrace("VM_EXIT_MSR_STORE_ADDR: %x\n", (uint_t) exitCtrls->msrStoreAddr & 0xffffffff);
475   PrintTrace("VM_EXIT_MSR_STORE_ADDR_HIGH: %x\n", (uint_t) (exitCtrls->msrStoreAddr >> 32) & 0xffffffff);
476   PrintTrace("VM_EXIT_MSR_LOAD_COUNT: %x\n", (uint_t) exitCtrls->msrLoadCount);
477   PrintTrace("VM_EXIT_MSR_LOAD_ADDR: %x\n", (uint_t) exitCtrls->msrLoadAddr & 0xffffffff);
478   PrintTrace("VM_EXIT_MSR_LOAD_ADDR_HIGH: %x\n", (uint_t) (exitCtrls->msrLoadAddr >> 32) & 0xffffffff);
479 }
480
481 void PrintTrace_VMCSEntryCtrlFields(struct VMCSEntryCtrlFields * entryCtrls) {
482   PrintTrace("\n==> VM Entry Controls\n");
483   PrintTrace("VM_ENTRY_CTRLS: %x\n", (uint_t) entryCtrls->entryCtrls);
484   PrintTrace("VM_ENTRY_MSR_LOAD_COUNT: %x\n", (uint_t) entryCtrls->msrLoadCount);
485   PrintTrace("VM_ENTRY_MSR_LOAD_ADDR: %x\n", (uint_t) entryCtrls->msrLoadAddr & 0xffffffff);
486   PrintTrace("VM_ENTRY_MSR_LOAD_ADDR_HIGH: %x\n", (uint_t) (entryCtrls->msrLoadAddr >> 32) & 0xffffffff);
487   PrintTrace("VM_ENTRY_INT_INFO_FIELD: %x\n", (uint_t) entryCtrls->intInfo);
488   PrintTrace("VM_ENTRY_EXCEPTION_ERROR: %x\n", (uint_t) entryCtrls->exceptionErrorCode);
489   PrintTrace("VM_ENTRY_INSTR_LENGTH: %x\n", (uint_t) entryCtrls->instrLength);
490 }
491
492 void PrintTrace_VMCSExitInfoFields(struct VMCSExitInfoFields * exitInfo) {
493   PrintTrace("\n==> VM Exit Info\n");
494   PrintTrace("EXIT_REASON: %x\n", (uint_t) exitInfo->reason);
495   PrintTrace("EXIT_QUALIFICATION: %x\n", (uint_t) exitInfo->qualification);
496   PrintTrace("VM_EXIT_INT_INFO: %x\n", (uint_t) exitInfo->intInfo);
497   PrintTrace("VM_EXIT_INT_ERROR: %x\n", (uint_t) exitInfo->intErrorCode);
498   PrintTrace("IDT_VECTOR_INFO: %x\n", (uint_t) exitInfo->idtVectorInfo);
499   PrintTrace("IDT_VECTOR_ERROR: %x\n", (uint_t) exitInfo->idtVectorErrorCode);
500   PrintTrace("VM_EXIT_INSTR_LENGTH: %x\n", (uint_t) exitInfo->instrLength);
501   PrintTrace("GUEST_LINEAR_ADDR: %x\n", (uint_t) exitInfo->guestLinearAddr);
502   PrintTrace("VMX_INSTR_INFO: %x\n", (uint_t) exitInfo->instrInfo);
503   PrintTrace("IO_RCX: %x\n", (uint_t) exitInfo->ioRCX);
504   PrintTrace("IO_RSI: %x\n", (uint_t) exitInfo->ioRSI);
505   PrintTrace("IO_RDI: %x\n", (uint_t) exitInfo->ioRDI);
506   PrintTrace("IO_RIP: %x\n", (uint_t) exitInfo->ioRIP);
507   PrintTrace("VM_INSTR_ERROR: %x\n", (uint_t) exitInfo->instrErrorField);
508 }
509
510
511 void PrintTrace_VMCSData(struct VMCSData * vmcs) {
512   PrintTrace("VMCSData Structure\n");
513
514   PrintTrace_VMCSGuestStateArea(&(vmcs->guestStateArea));
515   PrintTrace_VMCSHostStateArea(&(vmcs->hostStateArea));
516   PrintTrace_VMCSExecCtrlFields(&(vmcs->execCtrlFields));
517   PrintTrace_VMCSExitCtrlFields(&(vmcs->exitCtrlFields));
518   PrintTrace_VMCSEntryCtrlFields(&(vmcs->entryCtrlFields));
519   PrintTrace_VMCSExitInfoFields(&(vmcs->exitInfoFields));
520   PrintTrace("\n");
521 }