2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #include <palacios/svm_io.h>
22 #include <palacios/vmm_io.h>
23 #include <palacios/vmm_ctrl_regs.h>
24 #include <palacios/vmm_decoder.h>
25 #include <palacios/vm_guest_mem.h>
27 #ifndef V3_CONFIG_DEBUG_IO
29 #define PrintDebug(fmt, args...)
33 static int update_map(struct v3_vm_info * vm, uint16_t port, int hook_read, int hook_write) {
34 uchar_t * bitmap = (uint8_t *)(vm->io_map.arch_data);;
38 if ((hook_read == 0) && (hook_write == 0)) {
39 *(bitmap + major) &= ~(0x1 << minor);
41 *(bitmap + major) |= (0x1 << minor);
48 int v3_init_svm_io_map(struct v3_vm_info * vm) {
49 vm->io_map.update_map = update_map;
51 vm->io_map.arch_data = V3_VAddr(V3_AllocPages(3));
52 memset(vm->io_map.arch_data, 0xff, PAGE_SIZE_4KB * 3);
55 v3_refresh_io_map(vm);
60 int v3_deinit_svm_io_map(struct v3_vm_info * vm) {
61 V3_FreePages(V3_PAddr(vm->io_map.arch_data), 3);
67 // This should package up an IO request and call vmm_handle_io
68 int v3_handle_svm_io_in(struct guest_info * core, struct svm_io_info * io_info) {
69 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
74 } else if (io_info->sz16) {
76 } else if (io_info->sz32) {
80 PrintDebug("IN of %d bytes on port %d (0x%x)\n", read_size, io_info->port, io_info->port);
83 PrintDebug("IN operation on unhooked IO port 0x%x\n", io_info->port);
85 /* What are the HW semantics for an IN on an invalid port?
86 * Do we need to clear the register value or leave it untouched???
89 if (hook->read(core, io_info->port, &(core->vm_regs.rax), read_size, hook->priv_data) != read_size) {
90 // not sure how we handle errors.....
91 PrintError("Read Failure for in on port 0x%x\n", io_info->port);
104 /* We might not handle wrap around of the RDI register correctly...
105 * In that if we do wrap around the effect will manifest in the higher bits of the register
107 int v3_handle_svm_io_ins(struct guest_info * core, struct svm_io_info * io_info) {
108 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
113 struct v3_segment * theseg = &(core->segments.es); // default is ES
117 // This is kind of hacky...
118 // direction can equal either 1 or -1
119 // We will multiply the final added offset by this value to go the correct direction
121 struct rflags * flags = (struct rflags *)&(core->ctrl_regs.rflags);
128 if (v3_gva_to_hva(core, get_addr_linear(core, core->rip, &(core->segments.cs)), &inst_ptr) == -1) {
129 PrintError("Can't access instruction\n");
133 while (is_prefix_byte(*((char *)inst_ptr))) {
134 switch (*((char *)inst_ptr)) {
135 case PREFIX_CS_OVERRIDE:
136 theseg = &(core->segments.cs);
138 case PREFIX_SS_OVERRIDE:
139 theseg = &(core->segments.ss);
141 case PREFIX_DS_OVERRIDE:
142 theseg = &(core->segments.ds);
144 case PREFIX_ES_OVERRIDE:
145 theseg = &(core->segments.es);
147 case PREFIX_FS_OVERRIDE:
148 theseg = &(core->segments.fs);
150 case PREFIX_GS_OVERRIDE:
151 theseg = &(core->segments.gs);
160 PrintDebug("INS on port %d (0x%x)\n", io_info->port, io_info->port);
164 } else if (io_info->sz16) {
166 } else if (io_info->sz32) {
169 PrintError("io_info Invalid Size\n");
174 if (io_info->addr16) {
176 } else if (io_info->addr32) {
178 } else if (io_info->addr64) {
179 mask = 0xffffffffffffffffLL;
181 // This value should be set depending on the host register size...
182 mask = get_gpr_mask(core);
184 PrintDebug("INS io_info invalid address size, mask=0x%p, io_info=0x%p\n",
185 (void *)(addr_t)mask, (void *)(addr_t)(io_info));
186 // PrintDebug("INS Aborted... Check implementation\n");
191 rep_num = core->vm_regs.rcx & mask;
192 //rep_num = info->vm_regs.rcx;
195 PrintDebug("INS size=%d for %d steps\n", read_size, rep_num);
197 while (rep_num > 0) {
199 dst_addr = get_addr_linear(core, (core->vm_regs.rdi & mask), theseg);
201 // PrintDebug("Writing 0x%p\n", (void *)dst_addr);
203 if (v3_gva_to_hva(core, dst_addr, &host_addr) == -1) {
204 // either page fault or gpf...
205 PrintError("Could not convert Guest VA to host VA\n");
210 PrintDebug("INS operation on unhooked IO port 0x%x\n", io_info->port);
211 /* What are the HW semantics for an INS on an invalid port?
212 * Do we need to clear the memory region or leave it untouched???
215 if (hook->read(core, io_info->port, (char *)host_addr, read_size, hook->priv_data) != read_size) {
216 // not sure how we handle errors.....
217 PrintError("Read Failure for ins on port 0x%x\n", io_info->port);
222 core->vm_regs.rdi += (read_size * direction);
234 int v3_handle_svm_io_out(struct guest_info * core, struct svm_io_info * io_info) {
235 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
240 } else if (io_info->sz16) {
242 } else if (io_info->sz32) {
246 PrintDebug("OUT of %d bytes on port %d (0x%x)\n", write_size, io_info->port, io_info->port);
249 PrintDebug("OUT operation on unhooked IO port 0x%x\n", io_info->port);
251 if (hook->write(core, io_info->port, &(core->vm_regs.rax), write_size, hook->priv_data) != write_size) {
252 // not sure how we handle errors.....
253 PrintError("Write Failure for out on port 0x%x\n", io_info->port);
263 /* We might not handle wrap around of the RSI register correctly...
264 * In that if we do wrap around the effect will manifest in the higher bits of the register
267 int v3_handle_svm_io_outs(struct guest_info * core, struct svm_io_info * io_info) {
269 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
275 struct v3_segment * theseg = &(core->segments.ds); // default is DS
277 // This is kind of hacky...
278 // direction can equal either 1 or -1
279 // We will multiply the final added offset by this value to go the correct direction
281 struct rflags * flags = (struct rflags *)&(core->ctrl_regs.rflags);
287 PrintDebug("OUTS on port %d (0x%x)\n", io_info->port, io_info->port);
291 } else if (io_info->sz16) {
293 } else if (io_info->sz32) {
298 if (io_info->addr16) {
300 } else if (io_info->addr32) {
302 } else if (io_info->addr64) {
303 mask = 0xffffffffffffffffLL;
305 // This value should be set depending on the host register size...
306 mask = get_gpr_mask(core);
308 PrintDebug("OUTS io_info invalid address size, mask=0%p, io_info=0x%p\n",
309 (void *)(addr_t)mask, (void *)(addr_t)io_info);
310 // PrintDebug("INS Aborted... Check implementation\n");
312 // should never happen
313 //PrintDebug("Invalid Address length\n");
318 rep_num = core->vm_regs.rcx & mask;
324 if (v3_gva_to_hva(core, get_addr_linear(core, core->rip, &(core->segments.cs)), &inst_ptr) == -1) {
325 PrintError("Can't access instruction\n");
329 while (is_prefix_byte(*((char *)inst_ptr))) {
330 switch (*((char *)inst_ptr)) {
331 case PREFIX_CS_OVERRIDE:
332 theseg = &(core->segments.cs);
334 case PREFIX_SS_OVERRIDE:
335 theseg = &(core->segments.ss);
337 case PREFIX_DS_OVERRIDE:
338 theseg = &(core->segments.ds);
340 case PREFIX_ES_OVERRIDE:
341 theseg = &(core->segments.es);
343 case PREFIX_FS_OVERRIDE:
344 theseg = &(core->segments.fs);
346 case PREFIX_GS_OVERRIDE:
347 theseg = &(core->segments.gs);
355 PrintDebug("OUTS size=%d for %d steps\n", write_size, rep_num);
357 while (rep_num > 0) {
358 addr_t host_addr = 0;
360 dst_addr = get_addr_linear(core, (core->vm_regs.rsi & mask), theseg);
362 if (v3_gva_to_hva(core, dst_addr, &host_addr) == -1) {
363 PrintError("Could not translate outs dest addr, either page fault or gpf...\n");
368 PrintDebug("OUTS operation on unhooked IO port 0x%x\n", io_info->port);
370 if (hook->write(core, io_info->port, (char*)host_addr, write_size, hook->priv_data) != write_size) {
371 // not sure how we handle errors.....
372 PrintError("Write Failure for outs on port 0x%x\n", io_info->port);
378 core->vm_regs.rsi += write_size * direction;