2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
24 #include <palacios/svm.h>
25 #include <palacios/vmm.h>
27 #include <palacios/vmcb.h>
28 #include <palacios/vmm_mem.h>
29 #include <palacios/vmm_paging.h>
30 #include <palacios/svm_handler.h>
32 #include <palacios/vmm_debug.h>
33 #include <palacios/vm_guest_mem.h>
35 #include <palacios/vmm_decoder.h>
36 #include <palacios/vmm_string.h>
37 #include <palacios/vmm_lowlevel.h>
41 extern uint_t Get_CR3();
45 extern void v3_stgi();
46 extern void v3_clgi();
47 extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs);
52 static vmcb_t * Allocate_VMCB() {
53 vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1));
55 memset(vmcb_page, 0, 4096);
62 #include <palacios/vmm_ctrl_regs.h>
64 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info *vm_info) {
65 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
66 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
70 guest_state->rsp = vm_info->vm_regs.rsp;
71 // guest_state->rip = vm_info->rip;
72 guest_state->rip = 0xfff0;
76 //ctrl_area->instrs.instrs.CR0 = 1;
77 ctrl_area->cr_reads.cr0 = 1;
78 ctrl_area->cr_writes.cr0 = 1;
81 /* Set up the efer to enable 64 bit page tables */
83 struct efer_64 * efer = (struct efer_64 *)&(guest_state->efer);
84 struct cr4_32 * cr4 = (struct cr4_32 *)&(guest_state->cr4);
91 guest_state->efer |= EFER_MSR_svm_enable;
95 guest_state->rflags = 0x00000002; // The reserved bit is always 1
96 ctrl_area->svm_instrs.VMRUN = 1;
97 ctrl_area->svm_instrs.VMMCALL = 1;
98 ctrl_area->svm_instrs.VMLOAD = 1;
99 ctrl_area->svm_instrs.VMSAVE = 1;
100 ctrl_area->svm_instrs.STGI = 1;
101 ctrl_area->svm_instrs.CLGI = 1;
102 ctrl_area->svm_instrs.SKINIT = 1;
103 ctrl_area->svm_instrs.RDTSCP = 1;
104 ctrl_area->svm_instrs.ICEBP = 1;
105 ctrl_area->svm_instrs.WBINVD = 1;
106 ctrl_area->svm_instrs.MONITOR = 1;
107 ctrl_area->svm_instrs.MWAIT_always = 1;
108 ctrl_area->svm_instrs.MWAIT_if_armed = 1;
111 ctrl_area->instrs.HLT = 1;
112 // guest_state->cr0 = 0x00000001; // PE
113 ctrl_area->guest_ASID = 1;
117 ctrl_area->exceptions.de = 1;
118 ctrl_area->exceptions.df = 1;
120 ctrl_area->exceptions.ts = 1;
121 ctrl_area->exceptions.ss = 1;
122 ctrl_area->exceptions.ac = 1;
123 ctrl_area->exceptions.mc = 1;
124 ctrl_area->exceptions.gp = 1;
125 ctrl_area->exceptions.ud = 1;
126 ctrl_area->exceptions.np = 1;
127 ctrl_area->exceptions.of = 1;
129 ctrl_area->exceptions.nmi = 1;
131 // Debug of boot on physical machines - 7/14/08
132 ctrl_area->instrs.NMI=1;
133 ctrl_area->instrs.SMI=1;
134 ctrl_area->instrs.INIT=1;
135 ctrl_area->instrs.PAUSE=1;
136 ctrl_area->instrs.shutdown_evts=1;
140 vm_info->vm_regs.rdx = 0x00000f00;
142 guest_state->cr0 = 0x60000010;
144 guest_state->cs.selector = 0xf000;
145 guest_state->cs.limit=0xffff;
146 guest_state->cs.base = 0x0000000f0000LL;
147 guest_state->cs.attrib.raw = 0xf3;
150 /* DEBUG FOR RETURN CODE */
151 ctrl_area->exit_code = 1;
154 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
155 for ( i = 0; segregs[i] != NULL; i++) {
156 struct vmcb_selector * seg = segregs[i];
158 seg->selector = 0x0000;
159 // seg->base = seg->selector << 4;
160 seg->base = 0x00000000;
161 seg->attrib.raw = 0xf3;
165 guest_state->gdtr.limit = 0x0000ffff;
166 guest_state->gdtr.base = 0x0000000000000000LL;
167 guest_state->idtr.limit = 0x0000ffff;
168 guest_state->idtr.base = 0x0000000000000000LL;
170 guest_state->ldtr.selector = 0x0000;
171 guest_state->ldtr.limit = 0x0000ffff;
172 guest_state->ldtr.base = 0x0000000000000000LL;
173 guest_state->tr.selector = 0x0000;
174 guest_state->tr.limit = 0x0000ffff;
175 guest_state->tr.base = 0x0000000000000000LL;
178 guest_state->dr6 = 0x00000000ffff0ff0LL;
179 guest_state->dr7 = 0x0000000000000400LL;
181 if (vm_info->io_map.num_ports > 0) {
182 struct vmm_io_hook * iter;
183 addr_t io_port_bitmap;
185 io_port_bitmap = (addr_t)V3_VAddr(V3_AllocPages(3));
186 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
188 ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr((void *)io_port_bitmap);
190 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
192 FOREACH_IO_HOOK(vm_info->io_map, iter) {
193 ushort_t port = iter->port;
194 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
196 bitmap += (port / 8);
197 // PrintDebug("Setting Bit for port 0x%x\n", port);
198 *bitmap |= 1 << (port % 8);
202 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
204 ctrl_area->instrs.IOIO_PROT = 1;
209 PrintDebug("Exiting on interrupts\n");
210 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
211 ctrl_area->instrs.INTR = 1;
214 if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
215 PrintDebug("Creating initial shadow page table\n");
216 // vm_info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pde32_pts(vm_info));
217 /* Testing 64 bit page tables for long paged real mode guests */
218 vm_info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(vm_info));
220 //vm_info->shdw_pg_state.shadow_cr3 |= (vm_info->direct_map_pt & ~0xfff);
221 vm_info->shdw_pg_state.shadow_cr3 = 0;
222 vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
223 PrintDebug("Created\n");
225 //guest_state->cr3 = vm_info->shdw_pg_state.shadow_cr3;
227 guest_state->cr3 = vm_info->direct_map_pt;
230 //PrintDebugPageTables((pde32_t*)(vm_info->shdw_pg_state.shadow_cr3.e_reg.low));
232 ctrl_area->cr_reads.cr3 = 1;
233 ctrl_area->cr_writes.cr3 = 1;
236 ctrl_area->instrs.INVLPG = 1;
237 ctrl_area->instrs.INVLPGA = 1;
239 ctrl_area->exceptions.pf = 1;
241 /* JRL: This is a performance killer, and a simplistic solution */
242 /* We need to fix this */
243 ctrl_area->TLB_CONTROL = 1;
247 guest_state->g_pat = 0x7040600070406ULL;
249 guest_state->cr0 |= 0x80000000;
251 } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
252 // Flush the TLB on entries/exits
253 ctrl_area->TLB_CONTROL = 1;
255 // Enable Nested Paging
256 ctrl_area->NP_ENABLE = 1;
258 PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
260 // Set the Nested Page Table pointer
261 vm_info->direct_map_pt = ((addr_t)create_passthrough_pde32_pts(vm_info) & ~0xfff);
262 ctrl_area->N_CR3 = vm_info->direct_map_pt;
264 // ctrl_area->N_CR3 = Get_CR3();
265 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
267 guest_state->g_pat = 0x7040600070406ULL;
275 static int init_svm_guest(struct guest_info *info) {
277 PrintDebug("Allocating VMCB\n");
278 info->vmm_data = (void*)Allocate_VMCB();
281 //PrintDebug("Generating Guest nested page tables\n");
282 // info->page_tables = NULL;
283 //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
284 //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
285 // PrintDebugPageTables(info->page_tables);
288 PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data);
289 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
292 info->run_state = VM_STOPPED;
296 info->vm_regs.rdi = 0;
297 info->vm_regs.rsi = 0;
298 info->vm_regs.rbp = 0;
299 info->vm_regs.rsp = 0;
300 info->vm_regs.rbx = 0;
301 info->vm_regs.rdx = 0;
302 info->vm_regs.rcx = 0;
303 info->vm_regs.rax = 0;
310 // can we start a kernel thread here...
311 static int start_svm_guest(struct guest_info *info) {
312 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
313 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
314 uint_t num_exits = 0;
318 PrintDebug("Launching SVM VM (vmcb=%p)\n", (void *)info->vmm_data);
319 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
321 info->run_state = VM_RUNNING;
325 uint_t vm_cr_low = 0, vm_cr_high = 0;
332 //PrintDebug("SVM Entry to rip=%p...\n", (void *)info->rip);
334 v3_get_msr(0xc0000101, &vm_cr_high, &vm_cr_low);
336 rdtscll(info->time_state.cached_host_tsc);
338 guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
340 v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs));
343 v3_set_msr(0xc0000101, vm_cr_high, vm_cr_low);
344 //PrintDebug("SVM Returned\n");
350 PrintDebug("RSP=%p\n", (void *)&x);
355 v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
358 //PrintDebug("Turning on global interrupts\n");
362 //PrintDebug("SVM Exit number %d\n", num_exits);
366 if (v3_handle_svm_exit(info) != 0) {
369 addr_t linear_addr = 0;
371 info->run_state = VM_ERROR;
373 PrintDebug("SVM ERROR!!\n");
375 PrintDebug("RIP: %p\n", (void *)guest_state->rip);
378 linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
381 PrintDebug("RIP Linear: %p\n", (void *)linear_addr);
382 v3_print_segments(info);
383 v3_print_ctrl_regs(info);
386 if (info->mem_mode == PHYSICAL_MEM) {
387 guest_pa_to_host_va(info, linear_addr, &host_addr);
388 } else if (info->mem_mode == VIRTUAL_MEM) {
389 guest_va_to_host_va(info, linear_addr, &host_addr);
393 PrintDebug("Host Address of rip = 0x%p\n", (void *)host_addr);
395 PrintDebug("Instr (15 bytes) at %p:\n", (void *)host_addr);
396 PrintTraceMemDump((uchar_t *)host_addr, 15);
408 /* Checks machine SVM capability */
409 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
410 int v3_is_svm_capable() {
414 uint_t vm_cr_low = 0, vm_cr_high = 0;
415 addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
417 v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
419 PrintDebug("CPUID_FEATURE_IDS_ecx=0x%p\n", (void *)ecx);
421 if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
422 PrintDebug("SVM Not Available\n");
425 v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
427 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
429 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
430 PrintDebug("SVM is available but is disabled.\n");
432 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
434 PrintDebug("CPUID_FEATURE_IDS_edx=0x%p\n", (void *)edx);
436 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
437 PrintDebug("SVM BIOS Disabled, not unlockable\n");
439 PrintDebug("SVM is locked with a key\n");
444 PrintDebug("SVM is available and enabled.\n");
446 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
448 PrintDebug("CPUID_FEATURE_IDS_edx=0x%p\n", (void *)edx);
450 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
451 PrintDebug("SVM Nested Paging not supported\n");
453 PrintDebug("SVM Nested Paging supported\n");
462 uint_t eax = 0, ebx = 0, ecx = 0, edx = 0;
463 addr_t vm_cr_low = 0, vm_cr_high = 0;
465 v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
467 if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
468 PrintDebug("SVM Not Available\n");
472 v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
474 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
477 // this part is clearly wrong, since the np bit is in
479 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
480 PrintDebug("Nested Paging not supported\n");
482 PrintDebug("Nested Paging supported\n");
485 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
486 PrintDebug("SVM is disabled.\n");
490 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
492 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
493 PrintDebug("SVM BIOS Disabled, not unlockable\n");
495 PrintDebug("SVM is locked with a key\n");
504 static int has_svm_nested_paging() {
505 addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
507 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
509 //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
511 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
512 PrintDebug("SVM Nested Paging not supported\n");
515 PrintDebug("SVM Nested Paging supported\n");
523 void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) {
528 // Enable SVM on the CPU
529 v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
530 msr.e_reg.low |= EFER_MSR_svm_enable;
531 v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
533 PrintDebug("SVM Enabled\n");
536 // Setup the host state save area
537 host_state = V3_AllocPages(4);
541 // msr.e_reg.high = 0;
542 //msr.e_reg.low = (uint_t)host_state;
543 msr.r_reg = (addr_t)host_state;
545 PrintDebug("Host State being saved at %p\n", (void *)(addr_t)host_state);
546 v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
550 // Setup the SVM specific vmm operations
551 vmm_ops->init_guest = &init_svm_guest;
552 vmm_ops->start_guest = &start_svm_guest;
553 vmm_ops->has_nested_paging = &has_svm_nested_paging;
609 /*static void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
610 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
611 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
615 guest_state->rsp = vm_info.vm_regs.rsp;
616 guest_state->rip = vm_info.rip;
619 //ctrl_area->instrs.instrs.CR0 = 1;
620 ctrl_area->cr_reads.cr0 = 1;
621 ctrl_area->cr_writes.cr0 = 1;
623 guest_state->efer |= EFER_MSR_svm_enable;
624 guest_state->rflags = 0x00000002; // The reserved bit is always 1
625 ctrl_area->svm_instrs.VMRUN = 1;
626 // guest_state->cr0 = 0x00000001; // PE
627 ctrl_area->guest_ASID = 1;
630 ctrl_area->exceptions.de = 1;
631 ctrl_area->exceptions.df = 1;
632 ctrl_area->exceptions.pf = 1;
633 ctrl_area->exceptions.ts = 1;
634 ctrl_area->exceptions.ss = 1;
635 ctrl_area->exceptions.ac = 1;
636 ctrl_area->exceptions.mc = 1;
637 ctrl_area->exceptions.gp = 1;
638 ctrl_area->exceptions.ud = 1;
639 ctrl_area->exceptions.np = 1;
640 ctrl_area->exceptions.of = 1;
641 ctrl_area->exceptions.nmi = 1;
643 guest_state->cs.selector = 0x0000;
644 guest_state->cs.limit=~0u;
645 guest_state->cs.base = guest_state->cs.selector<<4;
646 guest_state->cs.attrib.raw = 0xf3;
649 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
650 for ( i = 0; segregs[i] != NULL; i++) {
651 struct vmcb_selector * seg = segregs[i];
653 seg->selector = 0x0000;
654 seg->base = seg->selector << 4;
655 seg->attrib.raw = 0xf3;
659 if (vm_info.io_map.num_ports > 0) {
660 struct vmm_io_hook * iter;
661 addr_t io_port_bitmap;
663 io_port_bitmap = (addr_t)V3_AllocPages(3);
664 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
666 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
668 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
670 FOREACH_IO_HOOK(vm_info.io_map, iter) {
671 ushort_t port = iter->port;
672 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
674 bitmap += (port / 8);
675 PrintDebug("Setting Bit in block %x\n", bitmap);
676 *bitmap |= 1 << (port % 8);
680 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
682 ctrl_area->instrs.IOIO_PROT = 1;
685 ctrl_area->instrs.INTR = 1;
689 if (vm_info.page_mode == SHADOW_PAGING) {
690 PrintDebug("Creating initial shadow page table\n");
691 vm_info.shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
692 PrintDebug("Created\n");
694 guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3;
696 ctrl_area->cr_reads.cr3 = 1;
697 ctrl_area->cr_writes.cr3 = 1;
700 ctrl_area->instrs.INVLPG = 1;
701 ctrl_area->instrs.INVLPGA = 1;
703 guest_state->g_pat = 0x7040600070406ULL;
705 guest_state->cr0 |= 0x80000000;
706 } else if (vm_info.page_mode == NESTED_PAGING) {
707 // Flush the TLB on entries/exits
708 //ctrl_area->TLB_CONTROL = 1;
710 // Enable Nested Paging
711 //ctrl_area->NP_ENABLE = 1;
713 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
715 // Set the Nested Page Table pointer
716 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
717 // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
719 // ctrl_area->N_CR3 = Get_CR3();
720 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
722 // guest_state->g_pat = 0x7040600070406ULL;
737 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
738 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
739 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
743 guest_state->rsp = vm_info.vm_regs.rsp;
744 guest_state->rip = vm_info.rip;
747 /* I pretty much just gutted this from TVMM */
748 /* Note: That means its probably wrong */
750 // set the segment registers to mirror ours
751 guest_state->cs.selector = 1<<3;
752 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
753 guest_state->cs.attrib.fields.S = 1;
754 guest_state->cs.attrib.fields.P = 1;
755 guest_state->cs.attrib.fields.db = 1;
756 guest_state->cs.attrib.fields.G = 1;
757 guest_state->cs.limit = 0xfffff;
758 guest_state->cs.base = 0;
760 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
761 for ( i = 0; segregs[i] != NULL; i++) {
762 struct vmcb_selector * seg = segregs[i];
764 seg->selector = 2<<3;
765 seg->attrib.fields.type = 0x2; // Data Segment+read/write
766 seg->attrib.fields.S = 1;
767 seg->attrib.fields.P = 1;
768 seg->attrib.fields.db = 1;
769 seg->attrib.fields.G = 1;
770 seg->limit = 0xfffff;
776 /* JRL THIS HAS TO GO */
778 // guest_state->tr.selector = GetTR_Selector();
779 guest_state->tr.attrib.fields.type = 0x9;
780 guest_state->tr.attrib.fields.P = 1;
781 // guest_state->tr.limit = GetTR_Limit();
782 //guest_state->tr.base = GetTR_Base();// - 0x2000;
790 guest_state->efer |= EFER_MSR_svm_enable;
791 guest_state->rflags = 0x00000002; // The reserved bit is always 1
792 ctrl_area->svm_instrs.VMRUN = 1;
793 guest_state->cr0 = 0x00000001; // PE
794 ctrl_area->guest_ASID = 1;
797 // guest_state->cpl = 0;
803 ctrl_area->cr_writes.cr4 = 1;
805 ctrl_area->exceptions.de = 1;
806 ctrl_area->exceptions.df = 1;
807 ctrl_area->exceptions.pf = 1;
808 ctrl_area->exceptions.ts = 1;
809 ctrl_area->exceptions.ss = 1;
810 ctrl_area->exceptions.ac = 1;
811 ctrl_area->exceptions.mc = 1;
812 ctrl_area->exceptions.gp = 1;
813 ctrl_area->exceptions.ud = 1;
814 ctrl_area->exceptions.np = 1;
815 ctrl_area->exceptions.of = 1;
816 ctrl_area->exceptions.nmi = 1;
820 ctrl_area->instrs.IOIO_PROT = 1;
821 ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
825 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
826 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
829 ctrl_area->instrs.INTR = 1;
836 memset(gdt_buf, 0, 6);
837 memset(idt_buf, 0, 6);
840 uint_t gdt_base, idt_base;
841 ushort_t gdt_limit, idt_limit;
844 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
845 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
846 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
849 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
850 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
851 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
854 // gdt_base -= 0x2000;
855 //idt_base -= 0x2000;
857 guest_state->gdtr.base = gdt_base;
858 guest_state->gdtr.limit = gdt_limit;
859 guest_state->idtr.base = idt_base;
860 guest_state->idtr.limit = idt_limit;
866 // also determine if CPU supports nested paging
868 if (vm_info.page_tables) {
870 // Flush the TLB on entries/exits
871 ctrl_area->TLB_CONTROL = 1;
873 // Enable Nested Paging
874 ctrl_area->NP_ENABLE = 1;
876 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
878 // Set the Nested Page Table pointer
879 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
882 // ctrl_area->N_CR3 = Get_CR3();
883 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
885 guest_state->g_pat = 0x7040600070406ULL;
887 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
888 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
890 // guest_state->cr0 |= 0x80000000;