2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #include <palacios/svm.h>
22 #include <palacios/vmm.h>
24 #include <palacios/vmcb.h>
25 #include <palacios/vmm_mem.h>
26 #include <palacios/vmm_paging.h>
27 #include <palacios/svm_handler.h>
29 #include <palacios/vmm_debug.h>
30 #include <palacios/vm_guest_mem.h>
32 #include <palacios/vmm_decoder.h>
33 #include <palacios/vmm_string.h>
34 #include <palacios/vmm_lowlevel.h>
35 #include <palacios/svm_msr.h>
37 #include <palacios/vmm_rbtree.h>
39 #include <palacios/vmm_direct_paging.h>
41 #include <palacios/vmm_ctrl_regs.h>
42 #include <palacios/vmm_config.h>
43 #include <palacios/svm_io.h>
45 #include <palacios/vmm_sprintf.h>
48 // This is a global pointer to the host's VMCB
49 static addr_t host_vmcbs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0};
53 extern void v3_stgi();
54 extern void v3_clgi();
55 //extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
56 extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
59 static vmcb_t * Allocate_VMCB() {
60 vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1));
62 memset(vmcb_page, 0, 4096);
69 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * vm_info) {
70 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
71 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
78 ctrl_area->svm_instrs.VMRUN = 1;
79 ctrl_area->svm_instrs.VMMCALL = 1;
80 ctrl_area->svm_instrs.VMLOAD = 1;
81 ctrl_area->svm_instrs.VMSAVE = 1;
82 ctrl_area->svm_instrs.STGI = 1;
83 ctrl_area->svm_instrs.CLGI = 1;
84 ctrl_area->svm_instrs.SKINIT = 1;
85 ctrl_area->svm_instrs.RDTSCP = 1;
86 ctrl_area->svm_instrs.ICEBP = 1;
87 ctrl_area->svm_instrs.WBINVD = 1;
88 ctrl_area->svm_instrs.MONITOR = 1;
89 ctrl_area->svm_instrs.MWAIT_always = 1;
90 ctrl_area->svm_instrs.MWAIT_if_armed = 1;
91 ctrl_area->instrs.INVLPGA = 1;
92 ctrl_area->instrs.CPUID = 1;
94 ctrl_area->instrs.HLT = 1;
95 // guest_state->cr0 = 0x00000001; // PE
98 ctrl_area->exceptions.de = 1;
99 ctrl_area->exceptions.df = 1;
101 ctrl_area->exceptions.ts = 1;
102 ctrl_area->exceptions.ss = 1;
103 ctrl_area->exceptions.ac = 1;
104 ctrl_area->exceptions.mc = 1;
105 ctrl_area->exceptions.gp = 1;
106 ctrl_area->exceptions.ud = 1;
107 ctrl_area->exceptions.np = 1;
108 ctrl_area->exceptions.of = 1;
110 ctrl_area->exceptions.nmi = 1;
114 ctrl_area->instrs.NMI = 1;
115 ctrl_area->instrs.SMI = 1;
116 ctrl_area->instrs.INIT = 1;
117 ctrl_area->instrs.PAUSE = 1;
118 ctrl_area->instrs.shutdown_evts = 1;
121 /* DEBUG FOR RETURN CODE */
122 ctrl_area->exit_code = 1;
125 /* Setup Guest Machine state */
127 vm_info->vm_regs.rsp = 0x00;
128 vm_info->rip = 0xfff0;
130 vm_info->vm_regs.rdx = 0x00000f00;
135 vm_info->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1
136 vm_info->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode
137 vm_info->ctrl_regs.efer |= EFER_MSR_svm_enable;
143 vm_info->segments.cs.selector = 0xf000;
144 vm_info->segments.cs.limit = 0xffff;
145 vm_info->segments.cs.base = 0x0000000f0000LL;
147 // (raw attributes = 0xf3)
148 vm_info->segments.cs.type = 0x3;
149 vm_info->segments.cs.system = 0x1;
150 vm_info->segments.cs.dpl = 0x3;
151 vm_info->segments.cs.present = 1;
155 struct v3_segment * segregs [] = {&(vm_info->segments.ss), &(vm_info->segments.ds),
156 &(vm_info->segments.es), &(vm_info->segments.fs),
157 &(vm_info->segments.gs), NULL};
159 for ( i = 0; segregs[i] != NULL; i++) {
160 struct v3_segment * seg = segregs[i];
162 seg->selector = 0x0000;
163 // seg->base = seg->selector << 4;
164 seg->base = 0x00000000;
167 // (raw attributes = 0xf3)
174 vm_info->segments.gdtr.limit = 0x0000ffff;
175 vm_info->segments.gdtr.base = 0x0000000000000000LL;
176 vm_info->segments.idtr.limit = 0x0000ffff;
177 vm_info->segments.idtr.base = 0x0000000000000000LL;
179 vm_info->segments.ldtr.selector = 0x0000;
180 vm_info->segments.ldtr.limit = 0x0000ffff;
181 vm_info->segments.ldtr.base = 0x0000000000000000LL;
182 vm_info->segments.tr.selector = 0x0000;
183 vm_info->segments.tr.limit = 0x0000ffff;
184 vm_info->segments.tr.base = 0x0000000000000000LL;
187 vm_info->dbg_regs.dr6 = 0x00000000ffff0ff0LL;
188 vm_info->dbg_regs.dr7 = 0x0000000000000400LL;
191 v3_init_svm_io_map(vm_info);
192 ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(vm_info->io_map.arch_data);
193 ctrl_area->instrs.IOIO_PROT = 1;
196 v3_init_svm_msr_map(vm_info);
197 ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(vm_info->msr_map.arch_data);
198 ctrl_area->instrs.MSR_PROT = 1;
201 PrintDebug("Exiting on interrupts\n");
202 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
203 ctrl_area->instrs.INTR = 1;
206 if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
207 PrintDebug("Creating initial shadow page table\n");
209 /* JRL: This is a performance killer, and a simplistic solution */
210 /* We need to fix this */
211 ctrl_area->TLB_CONTROL = 1;
212 ctrl_area->guest_ASID = 1;
215 if (v3_init_passthrough_pts(vm_info) == -1) {
216 PrintError("Could not initialize passthrough page tables\n");
221 vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
222 PrintDebug("Created\n");
224 vm_info->ctrl_regs.cr0 |= 0x80000000;
225 vm_info->ctrl_regs.cr3 = vm_info->direct_map_pt;
227 ctrl_area->cr_reads.cr0 = 1;
228 ctrl_area->cr_writes.cr0 = 1;
229 //ctrl_area->cr_reads.cr4 = 1;
230 ctrl_area->cr_writes.cr4 = 1;
231 ctrl_area->cr_reads.cr3 = 1;
232 ctrl_area->cr_writes.cr3 = 1;
234 v3_hook_msr(vm_info, EFER_MSR,
235 &v3_handle_efer_read,
236 &v3_handle_efer_write,
239 ctrl_area->instrs.INVLPG = 1;
241 ctrl_area->exceptions.pf = 1;
243 guest_state->g_pat = 0x7040600070406ULL;
247 } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
248 // Flush the TLB on entries/exits
249 ctrl_area->TLB_CONTROL = 1;
250 ctrl_area->guest_ASID = 1;
252 // Enable Nested Paging
253 ctrl_area->NP_ENABLE = 1;
255 PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
257 // Set the Nested Page Table pointer
258 if (v3_init_passthrough_pts(vm_info) == -1) {
259 PrintError("Could not initialize Nested page tables\n");
263 ctrl_area->N_CR3 = vm_info->direct_map_pt;
265 guest_state->g_pat = 0x7040600070406ULL;
270 static int init_svm_guest(struct guest_info * info, struct v3_vm_config * config_ptr) {
273 v3_pre_config_guest(info, config_ptr);
275 PrintDebug("Allocating VMCB\n");
276 info->vmm_data = (void*)Allocate_VMCB();
278 PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data);
279 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
281 v3_post_config_guest(info, config_ptr);
288 static int update_irq_state_atomic(struct guest_info * info) {
289 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
291 if ((info->intr_state.irq_pending == 1) && (guest_ctrl->guest_ctrl.V_IRQ == 0)) {
293 #ifdef CONFIG_DEBUG_INTERRUPTS
294 PrintDebug("INTAK cycle completed for irq %d\n", info->intr_state.irq_vector);
297 info->intr_state.irq_started = 1;
298 info->intr_state.irq_pending = 0;
300 v3_injecting_intr(info, info->intr_state.irq_vector, V3_EXTERNAL_IRQ);
303 if ((info->intr_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 0)) {
304 #ifdef CONFIG_DEBUG_INTERRUPTS
305 PrintDebug("Interrupt %d taken by guest\n", info->intr_state.irq_vector);
308 // Interrupt was taken fully vectored
309 info->intr_state.irq_started = 0;
312 #ifdef CONFIG_DEBUG_INTERRUPTS
313 PrintDebug("EXIT INT INFO is set (vec=%d)\n", guest_ctrl->exit_int_info.vector);
321 static int update_irq_state(struct guest_info * info) {
322 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
324 if (v3_excp_pending(info)) {
325 uint_t excp = v3_get_excp_number(info);
327 guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
329 if (info->excp_state.excp_error_code_valid) {
330 guest_ctrl->EVENTINJ.error_code = info->excp_state.excp_error_code;
331 guest_ctrl->EVENTINJ.ev = 1;
332 #ifdef CONFIG_DEBUG_INTERRUPTS
333 PrintDebug("Injecting exception %d with error code %x\n", excp, guest_ctrl->EVENTINJ.error_code);
337 guest_ctrl->EVENTINJ.vector = excp;
339 guest_ctrl->EVENTINJ.valid = 1;
341 #ifdef CONFIG_DEBUG_INTERRUPTS
342 PrintDebug("<%d> Injecting Exception %d (CR2=%p) (EIP=%p)\n",
343 (int)info->num_exits,
344 guest_ctrl->EVENTINJ.vector,
345 (void *)(addr_t)info->ctrl_regs.cr2,
346 (void *)(addr_t)info->rip);
349 v3_injecting_excp(info, excp);
350 } else if (info->intr_state.irq_started == 1) {
351 #ifdef CONFIG_DEBUG_INTERRUPTS
352 PrintDebug("IRQ pending from previous injection\n");
354 guest_ctrl->guest_ctrl.V_IRQ = 1;
355 guest_ctrl->guest_ctrl.V_INTR_VECTOR = info->intr_state.irq_vector;
356 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
357 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
360 switch (v3_intr_pending(info)) {
361 case V3_EXTERNAL_IRQ: {
362 uint32_t irq = v3_get_intr(info);
364 guest_ctrl->guest_ctrl.V_IRQ = 1;
365 guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
366 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
367 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
369 #ifdef CONFIG_DEBUG_INTERRUPTS
370 PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
371 guest_ctrl->guest_ctrl.V_INTR_VECTOR,
372 (void *)(addr_t)info->rip);
375 info->intr_state.irq_pending = 1;
376 info->intr_state.irq_vector = irq;
381 guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
383 case V3_SOFTWARE_INTR:
384 guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
387 guest_ctrl->EVENTINJ.type = SVM_INJECTION_IRQ;
390 case V3_INVALID_INTR:
402 * CAUTION and DANGER!!!
404 * The VMCB CANNOT(!!) be accessed outside of the clgi/stgi calls inside this function
405 * When exectuing a symbiotic call, the VMCB WILL be overwritten, so any dependencies
406 * on its contents will cause things to break. The contents at the time of the exit WILL
407 * change before the exit handler is executed.
409 int v3_svm_enter(struct guest_info * info) {
410 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
411 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
413 addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0;
415 // Conditionally yield the CPU if the timeslice has expired
418 // disable global interrupts for vm state transition
421 // Synchronize the guest state to the VMCB
422 guest_state->cr0 = info->ctrl_regs.cr0;
423 guest_state->cr2 = info->ctrl_regs.cr2;
424 guest_state->cr3 = info->ctrl_regs.cr3;
425 guest_state->cr4 = info->ctrl_regs.cr4;
426 guest_state->dr6 = info->dbg_regs.dr6;
427 guest_state->dr7 = info->dbg_regs.dr7;
428 guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
429 guest_state->rflags = info->ctrl_regs.rflags;
430 guest_state->efer = info->ctrl_regs.efer;
432 guest_state->cpl = info->cpl;
434 v3_set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
436 guest_state->rax = info->vm_regs.rax;
437 guest_state->rip = info->rip;
438 guest_state->rsp = info->vm_regs.rsp;
442 PrintDebug("SVM Entry to CS=%p rip=%p...\n",
443 (void *)(addr_t)info->segments.cs.base,
444 (void *)(addr_t)info->rip);
447 #ifdef CONFIG_SYMBIOTIC
448 if (info->sym_state.sym_call_active == 1) {
449 if (guest_ctrl->guest_ctrl.V_IRQ == 1) {
450 V3_Print("!!! Injecting Interrupt during Sym call !!!\n");
456 rdtscll(info->time_state.cached_host_tsc);
457 // guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
459 v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[info->cpu_id]);
463 //PrintDebug("SVM Returned\n");
467 v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
470 // Save Guest state from VMCB
471 info->rip = guest_state->rip;
472 info->vm_regs.rsp = guest_state->rsp;
473 info->vm_regs.rax = guest_state->rax;
475 info->cpl = guest_state->cpl;
477 info->ctrl_regs.cr0 = guest_state->cr0;
478 info->ctrl_regs.cr2 = guest_state->cr2;
479 info->ctrl_regs.cr3 = guest_state->cr3;
480 info->ctrl_regs.cr4 = guest_state->cr4;
481 info->dbg_regs.dr6 = guest_state->dr6;
482 info->dbg_regs.dr7 = guest_state->dr7;
483 info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
484 info->ctrl_regs.rflags = guest_state->rflags;
485 info->ctrl_regs.efer = guest_state->efer;
487 v3_get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
488 info->cpu_mode = v3_get_vm_cpu_mode(info);
489 info->mem_mode = v3_get_vm_mem_mode(info);
493 // save exit info here
494 exit_code = guest_ctrl->exit_code;
495 exit_info1 = guest_ctrl->exit_info1;
496 exit_info2 = guest_ctrl->exit_info2;
499 #ifdef CONFIG_SYMBIOTIC
500 if (info->sym_state.sym_call_active == 0) {
501 update_irq_state_atomic(info);
504 update_irq_state_atomic(info);
508 // reenable global interrupts after vm exit
512 // Conditionally yield the CPU if the timeslice has expired
516 if (v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2) != 0) {
517 PrintError("Error in SVM exit handler\n");
521 #ifdef CONFIG_SYMBIOTIC
522 if (info->sym_state.sym_call_active == 0) {
523 update_irq_state(info);
526 update_irq_state(info);
533 static int start_svm_guest(struct guest_info *info) {
534 // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
535 // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
539 PrintDebug("Launching SVM VM (vmcb=%p)\n", (void *)info->vmm_data);
540 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
542 info->run_state = VM_RUNNING;
543 rdtscll(info->yield_start_cycle);
547 if (v3_svm_enter(info) == -1) {
548 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
550 addr_t linear_addr = 0;
552 info->run_state = VM_ERROR;
554 V3_Print("SVM ERROR!!\n");
556 v3_print_guest_state(info);
558 V3_Print("SVM Exit Code: %p\n", (void *)(addr_t)guest_ctrl->exit_code);
560 V3_Print("exit_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1));
561 V3_Print("exit_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
563 V3_Print("exit_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
564 V3_Print("exit_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
566 linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
568 if (info->mem_mode == PHYSICAL_MEM) {
569 guest_pa_to_host_va(info, linear_addr, &host_addr);
570 } else if (info->mem_mode == VIRTUAL_MEM) {
571 guest_va_to_host_va(info, linear_addr, &host_addr);
574 V3_Print("Host Address of rip = 0x%p\n", (void *)host_addr);
576 V3_Print("Instr (15 bytes) at %p:\n", (void *)host_addr);
577 v3_dump_mem((uint8_t *)host_addr, 15);
579 v3_print_stack(info);
584 if ((info->num_exits % 5000) == 0) {
585 V3_Print("SVM Exit number %d\n", (uint32_t)info->num_exits);
599 /* Checks machine SVM capability */
600 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
601 int v3_is_svm_capable() {
602 uint_t vm_cr_low = 0, vm_cr_high = 0;
603 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
605 v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
607 PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx);
609 if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
610 V3_Print("SVM Not Available\n");
613 v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
615 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
617 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
618 V3_Print("SVM is available but is disabled.\n");
620 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
622 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
624 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
625 V3_Print("SVM BIOS Disabled, not unlockable\n");
627 V3_Print("SVM is locked with a key\n");
632 V3_Print("SVM is available and enabled.\n");
634 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
635 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax);
636 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx);
637 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx);
638 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
645 static int has_svm_nested_paging() {
646 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
648 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
650 //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
652 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
653 V3_Print("SVM Nested Paging not supported\n");
656 V3_Print("SVM Nested Paging supported\n");
662 void v3_init_svm_cpu(int cpu_id) {
664 extern v3_cpu_arch_t v3_cpu_types[];
666 // Enable SVM on the CPU
667 v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
668 msr.e_reg.low |= EFER_MSR_svm_enable;
669 v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
671 V3_Print("SVM Enabled\n");
673 // Setup the host state save area
674 host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4);
677 // msr.e_reg.high = 0;
678 //msr.e_reg.low = (uint_t)host_vmcb;
679 msr.r_reg = host_vmcbs[cpu_id];
681 PrintDebug("Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]);
682 v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
685 if (has_svm_nested_paging() == 1) {
686 v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU;
688 v3_cpu_types[cpu_id] = V3_SVM_CPU;
693 void v3_init_svm_hooks(struct v3_ctrl_ops * vmm_ops) {
695 // Setup the SVM specific vmm operations
696 vmm_ops->init_guest = &init_svm_guest;
697 vmm_ops->start_guest = &start_svm_guest;
698 vmm_ops->has_nested_paging = &has_svm_nested_paging;
756 * Test VMSAVE/VMLOAD Latency
758 #define vmsave ".byte 0x0F,0x01,0xDB ; "
759 #define vmload ".byte 0x0F,0x01,0xDA ; "
761 uint32_t start_lo, start_hi;
762 uint32_t end_lo, end_hi;
765 __asm__ __volatile__ (
767 "movl %%eax, %%esi ; "
768 "movl %%edx, %%edi ; "
769 "movq %%rcx, %%rax ; "
772 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
773 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
784 PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
786 __asm__ __volatile__ (
788 "movl %%eax, %%esi ; "
789 "movl %%edx, %%edi ; "
790 "movq %%rcx, %%rax ; "
793 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
794 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
806 PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
808 /* End Latency Test */
819 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
820 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
821 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
825 guest_state->rsp = vm_info.vm_regs.rsp;
826 guest_state->rip = vm_info.rip;
829 /* I pretty much just gutted this from TVMM */
830 /* Note: That means its probably wrong */
832 // set the segment registers to mirror ours
833 guest_state->cs.selector = 1<<3;
834 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
835 guest_state->cs.attrib.fields.S = 1;
836 guest_state->cs.attrib.fields.P = 1;
837 guest_state->cs.attrib.fields.db = 1;
838 guest_state->cs.attrib.fields.G = 1;
839 guest_state->cs.limit = 0xfffff;
840 guest_state->cs.base = 0;
842 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
843 for ( i = 0; segregs[i] != NULL; i++) {
844 struct vmcb_selector * seg = segregs[i];
846 seg->selector = 2<<3;
847 seg->attrib.fields.type = 0x2; // Data Segment+read/write
848 seg->attrib.fields.S = 1;
849 seg->attrib.fields.P = 1;
850 seg->attrib.fields.db = 1;
851 seg->attrib.fields.G = 1;
852 seg->limit = 0xfffff;
858 /* JRL THIS HAS TO GO */
860 // guest_state->tr.selector = GetTR_Selector();
861 guest_state->tr.attrib.fields.type = 0x9;
862 guest_state->tr.attrib.fields.P = 1;
863 // guest_state->tr.limit = GetTR_Limit();
864 //guest_state->tr.base = GetTR_Base();// - 0x2000;
872 guest_state->efer |= EFER_MSR_svm_enable;
873 guest_state->rflags = 0x00000002; // The reserved bit is always 1
874 ctrl_area->svm_instrs.VMRUN = 1;
875 guest_state->cr0 = 0x00000001; // PE
876 ctrl_area->guest_ASID = 1;
879 // guest_state->cpl = 0;
885 ctrl_area->cr_writes.cr4 = 1;
887 ctrl_area->exceptions.de = 1;
888 ctrl_area->exceptions.df = 1;
889 ctrl_area->exceptions.pf = 1;
890 ctrl_area->exceptions.ts = 1;
891 ctrl_area->exceptions.ss = 1;
892 ctrl_area->exceptions.ac = 1;
893 ctrl_area->exceptions.mc = 1;
894 ctrl_area->exceptions.gp = 1;
895 ctrl_area->exceptions.ud = 1;
896 ctrl_area->exceptions.np = 1;
897 ctrl_area->exceptions.of = 1;
898 ctrl_area->exceptions.nmi = 1;
902 ctrl_area->instrs.IOIO_PROT = 1;
903 ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
907 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
908 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
911 ctrl_area->instrs.INTR = 1;
918 memset(gdt_buf, 0, 6);
919 memset(idt_buf, 0, 6);
922 uint_t gdt_base, idt_base;
923 ushort_t gdt_limit, idt_limit;
926 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
927 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
928 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
931 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
932 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
933 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
936 // gdt_base -= 0x2000;
937 //idt_base -= 0x2000;
939 guest_state->gdtr.base = gdt_base;
940 guest_state->gdtr.limit = gdt_limit;
941 guest_state->idtr.base = idt_base;
942 guest_state->idtr.limit = idt_limit;
948 // also determine if CPU supports nested paging
950 if (vm_info.page_tables) {
952 // Flush the TLB on entries/exits
953 ctrl_area->TLB_CONTROL = 1;
955 // Enable Nested Paging
956 ctrl_area->NP_ENABLE = 1;
958 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
960 // Set the Nested Page Table pointer
961 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
964 // ctrl_area->N_CR3 = Get_CR3();
965 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
967 guest_state->g_pat = 0x7040600070406ULL;
969 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
970 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
972 // guest_state->cr0 |= 0x80000000;