1 #include <palacios/svm.h>
2 #include <palacios/vmm.h>
4 #include <palacios/vmcb.h>
5 #include <palacios/vmm_mem.h>
6 #include <palacios/vmm_paging.h>
7 #include <palacios/svm_handler.h>
9 #include <palacios/vmm_debug.h>
10 #include <palacios/vm_guest_mem.h>
12 #include <palacios/vmm_decoder.h>
15 extern struct vmm_os_hooks * os_hooks;
17 extern uint_t cpuid_ecx(uint_t op);
18 extern uint_t cpuid_edx(uint_t op);
19 extern void Get_MSR(uint_t MSR, uint_t * high_byte, uint_t * low_byte);
20 extern void Set_MSR(uint_t MSR, uint_t high_byte, uint_t low_byte);
21 extern uint_t launch_svm(vmcb_t * vmcb_addr);
22 extern void safe_svm_launch(vmcb_t * vmcb_addr, struct v3_gprs * gprs);
27 extern uint_t Get_CR3();
30 extern void DisableInts();
38 static vmcb_t * Allocate_VMCB() {
39 vmcb_t * vmcb_page = (vmcb_t*)os_hooks->allocate_pages(1);
42 memset(vmcb_page, 0, 4096);
51 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info vm_info) {
52 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
53 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
57 guest_state->rsp = vm_info.vm_regs.rsp;
58 // guest_state->rip = vm_info.rip;
59 guest_state->rip = 0xfff0;
63 //ctrl_area->instrs.instrs.CR0 = 1;
64 ctrl_area->cr_reads.cr0 = 1;
65 ctrl_area->cr_writes.cr0 = 1;
67 guest_state->efer |= EFER_MSR_svm_enable;
68 guest_state->rflags = 0x00000002; // The reserved bit is always 1
69 ctrl_area->svm_instrs.VMRUN = 1;
70 ctrl_area->instrs.HLT = 1;
71 // guest_state->cr0 = 0x00000001; // PE
72 ctrl_area->guest_ASID = 1;
74 ctrl_area->exceptions.de = 1;
75 ctrl_area->exceptions.df = 1;
76 ctrl_area->exceptions.pf = 1;
77 ctrl_area->exceptions.ts = 1;
78 ctrl_area->exceptions.ss = 1;
79 ctrl_area->exceptions.ac = 1;
80 ctrl_area->exceptions.mc = 1;
81 ctrl_area->exceptions.gp = 1;
82 ctrl_area->exceptions.ud = 1;
83 ctrl_area->exceptions.np = 1;
84 ctrl_area->exceptions.of = 1;
85 ctrl_area->exceptions.nmi = 1;
87 vm_info.vm_regs.rdx = 0x00000f00;
89 guest_state->cr0 = 0x60000010;
91 guest_state->cs.selector = 0xf000;
92 guest_state->cs.limit=0xffff;
93 guest_state->cs.base = 0x0000000f0000LL;
94 guest_state->cs.attrib.raw = 0xf3;
97 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
98 for ( i = 0; segregs[i] != NULL; i++) {
99 struct vmcb_selector * seg = segregs[i];
101 seg->selector = 0x0000;
102 // seg->base = seg->selector << 4;
103 seg->base = 0x00000000;
104 seg->attrib.raw = 0xf3;
108 guest_state->gdtr.limit = 0x0000ffff;
109 guest_state->gdtr.base = 0x0000000000000000LL;
110 guest_state->idtr.limit = 0x0000ffff;
111 guest_state->idtr.base = 0x0000000000000000LL;
113 guest_state->ldtr.selector = 0x0000;
114 guest_state->ldtr.limit = 0x0000ffff;
115 guest_state->ldtr.base = 0x0000000000000000LL;
116 guest_state->tr.selector = 0x0000;
117 guest_state->tr.limit = 0x0000ffff;
118 guest_state->tr.base = 0x0000000000000000LL;
121 guest_state->dr6 = 0x00000000ffff0ff0LL;
122 guest_state->dr7 = 0x0000000000000400LL;
124 if (vm_info.io_map.num_ports > 0) {
125 vmm_io_hook_t * iter;
126 addr_t io_port_bitmap;
128 io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
129 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
131 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
133 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
135 FOREACH_IO_HOOK(vm_info.io_map, iter) {
136 ushort_t port = iter->port;
137 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
139 bitmap += (port / 8);
140 PrintDebug("Setting Bit for port 0x%x\n", port);
141 *bitmap |= 1 << (port % 8);
145 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
147 ctrl_area->instrs.IOIO_PROT = 1;
152 PrintDebug("Exiting on interrupts\n");
153 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
154 ctrl_area->instrs.INTR = 1;
157 if (vm_info.shdw_pg_mode == SHADOW_PAGING) {
158 PrintDebug("Creating initial shadow page table\n");
159 vm_info.shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
160 PrintDebug("Created\n");
162 guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3;
164 //PrintDebugPageTables((pde32_t*)(vm_info.shdw_pg_state.shadow_cr3.e_reg.low));
166 ctrl_area->cr_reads.cr3 = 1;
167 ctrl_area->cr_writes.cr3 = 1;
170 ctrl_area->instrs.INVLPG = 1;
171 ctrl_area->instrs.INVLPGA = 1;
173 /* JRL: This is a performance killer, and a simplistic solution */
174 /* We need to fix this */
175 ctrl_area->TLB_CONTROL = 1;
179 guest_state->g_pat = 0x7040600070406ULL;
181 guest_state->cr0 |= 0x80000000;
183 } else if (vm_info.shdw_pg_mode == NESTED_PAGING) {
184 // Flush the TLB on entries/exits
187 // Enable Nested Paging
188 //ctrl_area->NP_ENABLE = 1;
190 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
192 // Set the Nested Page Table pointer
193 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
194 // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
196 // ctrl_area->N_CR3 = Get_CR3();
197 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
199 // guest_state->g_pat = 0x7040600070406ULL;
214 static int init_svm_guest(struct guest_info *info) {
216 PrintDebug("Allocating VMCB\n");
217 info->vmm_data = (void*)Allocate_VMCB();
220 //PrintDebug("Generating Guest nested page tables\n");
221 // info->page_tables = NULL;
222 //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
223 //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
224 // PrintDebugPageTables(info->page_tables);
227 PrintDebug("Initializing VMCB (addr=%x)\n", info->vmm_data);
228 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), *info);
233 info->vm_regs.rdi = 0;
234 info->vm_regs.rsi = 0;
235 info->vm_regs.rbp = 0;
236 info->vm_regs.rsp = 0;
237 info->vm_regs.rbx = 0;
238 info->vm_regs.rdx = 0;
239 info->vm_regs.rcx = 0;
240 info->vm_regs.rax = 0;
246 // can we start a kernel thread here...
247 static int start_svm_guest(struct guest_info *info) {
248 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
249 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
251 PrintDebug("Launching SVM VM (vmcb=%x)\n", info->vmm_data);
252 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
260 PrintDebug("SVM Entry to rip=%x...\n", info->rip);
262 rdtscll(info->time_state.cached_host_tsc);
263 guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
265 safe_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
268 //PrintDebug("SVM Returned\n");
271 v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
276 if (handle_svm_exit(info) != 0) {
279 addr_t linear_addr = 0;
281 PrintDebug("SVM ERROR!!\n");
283 PrintDebug("RIP: %x\n", guest_state->rip);
286 linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
289 PrintDebug("RIP Linear: %x\n", linear_addr);
292 if (info->mem_mode == PHYSICAL_MEM) {
293 guest_pa_to_host_pa(info, linear_addr, &host_addr);
294 } else if (info->mem_mode == VIRTUAL_MEM) {
295 guest_va_to_host_pa(info, linear_addr, &host_addr);
299 PrintDebug("Host Address of rip = 0x%x\n", host_addr);
301 PrintDebug("Instr (15 bytes) at %x:\n", host_addr);
302 PrintTraceMemDump((char*)host_addr, 15);
313 /* Checks machine SVM capability */
314 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
315 int is_svm_capable() {
316 uint_t ret = cpuid_ecx(CPUID_FEATURE_IDS);
317 uint_t vm_cr_low = 0, vm_cr_high = 0;
320 if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
321 PrintDebug("SVM Not Available\n");
325 Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
327 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
328 PrintDebug("Nested Paging not supported\n");
331 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
335 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
337 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
338 PrintDebug("SVM BIOS Disabled, not unlockable\n");
340 PrintDebug("SVM is locked with a key\n");
348 void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
353 // Enable SVM on the CPU
354 Get_MSR(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
355 msr.e_reg.low |= EFER_MSR_svm_enable;
356 Set_MSR(EFER_MSR, 0, msr.e_reg.low);
358 PrintDebug("SVM Enabled\n");
361 // Setup the host state save area
362 host_state = os_hooks->allocate_pages(4);
365 msr.e_reg.low = (uint_t)host_state;
368 PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
369 Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
373 // Setup the SVM specific vmm operations
374 vmm_ops->init_guest = &init_svm_guest;
375 vmm_ops->start_guest = &start_svm_guest;
432 /*static void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
433 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
434 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
438 guest_state->rsp = vm_info.vm_regs.rsp;
439 guest_state->rip = vm_info.rip;
442 //ctrl_area->instrs.instrs.CR0 = 1;
443 ctrl_area->cr_reads.cr0 = 1;
444 ctrl_area->cr_writes.cr0 = 1;
446 guest_state->efer |= EFER_MSR_svm_enable;
447 guest_state->rflags = 0x00000002; // The reserved bit is always 1
448 ctrl_area->svm_instrs.VMRUN = 1;
449 // guest_state->cr0 = 0x00000001; // PE
450 ctrl_area->guest_ASID = 1;
453 ctrl_area->exceptions.de = 1;
454 ctrl_area->exceptions.df = 1;
455 ctrl_area->exceptions.pf = 1;
456 ctrl_area->exceptions.ts = 1;
457 ctrl_area->exceptions.ss = 1;
458 ctrl_area->exceptions.ac = 1;
459 ctrl_area->exceptions.mc = 1;
460 ctrl_area->exceptions.gp = 1;
461 ctrl_area->exceptions.ud = 1;
462 ctrl_area->exceptions.np = 1;
463 ctrl_area->exceptions.of = 1;
464 ctrl_area->exceptions.nmi = 1;
466 guest_state->cs.selector = 0x0000;
467 guest_state->cs.limit=~0u;
468 guest_state->cs.base = guest_state->cs.selector<<4;
469 guest_state->cs.attrib.raw = 0xf3;
472 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
473 for ( i = 0; segregs[i] != NULL; i++) {
474 struct vmcb_selector * seg = segregs[i];
476 seg->selector = 0x0000;
477 seg->base = seg->selector << 4;
478 seg->attrib.raw = 0xf3;
482 if (vm_info.io_map.num_ports > 0) {
483 vmm_io_hook_t * iter;
484 addr_t io_port_bitmap;
486 io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
487 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
489 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
491 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
493 FOREACH_IO_HOOK(vm_info.io_map, iter) {
494 ushort_t port = iter->port;
495 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
497 bitmap += (port / 8);
498 PrintDebug("Setting Bit in block %x\n", bitmap);
499 *bitmap |= 1 << (port % 8);
503 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
505 ctrl_area->instrs.IOIO_PROT = 1;
508 ctrl_area->instrs.INTR = 1;
512 if (vm_info.page_mode == SHADOW_PAGING) {
513 PrintDebug("Creating initial shadow page table\n");
514 vm_info.shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
515 PrintDebug("Created\n");
517 guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3;
519 ctrl_area->cr_reads.cr3 = 1;
520 ctrl_area->cr_writes.cr3 = 1;
523 ctrl_area->instrs.INVLPG = 1;
524 ctrl_area->instrs.INVLPGA = 1;
526 guest_state->g_pat = 0x7040600070406ULL;
528 guest_state->cr0 |= 0x80000000;
529 } else if (vm_info.page_mode == NESTED_PAGING) {
530 // Flush the TLB on entries/exits
531 //ctrl_area->TLB_CONTROL = 1;
533 // Enable Nested Paging
534 //ctrl_area->NP_ENABLE = 1;
536 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
538 // Set the Nested Page Table pointer
539 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
540 // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
542 // ctrl_area->N_CR3 = Get_CR3();
543 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
545 // guest_state->g_pat = 0x7040600070406ULL;
560 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
561 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
562 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
566 guest_state->rsp = vm_info.vm_regs.rsp;
567 guest_state->rip = vm_info.rip;
570 /* I pretty much just gutted this from TVMM */
571 /* Note: That means its probably wrong */
573 // set the segment registers to mirror ours
574 guest_state->cs.selector = 1<<3;
575 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
576 guest_state->cs.attrib.fields.S = 1;
577 guest_state->cs.attrib.fields.P = 1;
578 guest_state->cs.attrib.fields.db = 1;
579 guest_state->cs.attrib.fields.G = 1;
580 guest_state->cs.limit = 0xfffff;
581 guest_state->cs.base = 0;
583 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
584 for ( i = 0; segregs[i] != NULL; i++) {
585 struct vmcb_selector * seg = segregs[i];
587 seg->selector = 2<<3;
588 seg->attrib.fields.type = 0x2; // Data Segment+read/write
589 seg->attrib.fields.S = 1;
590 seg->attrib.fields.P = 1;
591 seg->attrib.fields.db = 1;
592 seg->attrib.fields.G = 1;
593 seg->limit = 0xfffff;
599 /* JRL THIS HAS TO GO */
601 // guest_state->tr.selector = GetTR_Selector();
602 guest_state->tr.attrib.fields.type = 0x9;
603 guest_state->tr.attrib.fields.P = 1;
604 // guest_state->tr.limit = GetTR_Limit();
605 //guest_state->tr.base = GetTR_Base();// - 0x2000;
613 guest_state->efer |= EFER_MSR_svm_enable;
614 guest_state->rflags = 0x00000002; // The reserved bit is always 1
615 ctrl_area->svm_instrs.VMRUN = 1;
616 guest_state->cr0 = 0x00000001; // PE
617 ctrl_area->guest_ASID = 1;
620 // guest_state->cpl = 0;
626 ctrl_area->cr_writes.cr4 = 1;
628 ctrl_area->exceptions.de = 1;
629 ctrl_area->exceptions.df = 1;
630 ctrl_area->exceptions.pf = 1;
631 ctrl_area->exceptions.ts = 1;
632 ctrl_area->exceptions.ss = 1;
633 ctrl_area->exceptions.ac = 1;
634 ctrl_area->exceptions.mc = 1;
635 ctrl_area->exceptions.gp = 1;
636 ctrl_area->exceptions.ud = 1;
637 ctrl_area->exceptions.np = 1;
638 ctrl_area->exceptions.of = 1;
639 ctrl_area->exceptions.nmi = 1;
643 ctrl_area->instrs.IOIO_PROT = 1;
644 ctrl_area->IOPM_BASE_PA = (uint_t)os_hooks->allocate_pages(3);
648 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
649 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
652 ctrl_area->instrs.INTR = 1;
659 memset(gdt_buf, 0, 6);
660 memset(idt_buf, 0, 6);
663 uint_t gdt_base, idt_base;
664 ushort_t gdt_limit, idt_limit;
667 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
668 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
669 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
672 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
673 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
674 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
677 // gdt_base -= 0x2000;
678 //idt_base -= 0x2000;
680 guest_state->gdtr.base = gdt_base;
681 guest_state->gdtr.limit = gdt_limit;
682 guest_state->idtr.base = idt_base;
683 guest_state->idtr.limit = idt_limit;
689 // also determine if CPU supports nested paging
691 if (vm_info.page_tables) {
693 // Flush the TLB on entries/exits
694 ctrl_area->TLB_CONTROL = 1;
696 // Enable Nested Paging
697 ctrl_area->NP_ENABLE = 1;
699 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
701 // Set the Nested Page Table pointer
702 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
705 // ctrl_area->N_CR3 = Get_CR3();
706 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
708 guest_state->g_pat = 0x7040600070406ULL;
710 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
711 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
713 // guest_state->cr0 |= 0x80000000;