2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #include <palacios/svm.h>
22 #include <palacios/vmm.h>
24 #include <palacios/vmcb.h>
25 #include <palacios/vmm_mem.h>
26 #include <palacios/vmm_paging.h>
27 #include <palacios/svm_handler.h>
29 #include <palacios/vmm_debug.h>
30 #include <palacios/vm_guest_mem.h>
32 #include <palacios/vmm_decoder.h>
33 #include <palacios/vmm_string.h>
34 #include <palacios/vmm_lowlevel.h>
35 #include <palacios/svm_msr.h>
37 #include <palacios/vmm_rbtree.h>
39 #include <palacios/vmm_direct_paging.h>
41 #include <palacios/vmm_ctrl_regs.h>
42 #include <palacios/vmm_config.h>
43 #include <palacios/svm_io.h>
45 #include <palacios/vmm_sprintf.h>
48 // This is a global pointer to the host's VMCB
49 static addr_t host_vmcbs[CONFIG_MAX_CPUS] = {0};
53 extern void v3_stgi();
54 extern void v3_clgi();
55 //extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
56 extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
59 static vmcb_t * Allocate_VMCB() {
60 vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1));
62 memset(vmcb_page, 0, 4096);
69 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info *vm_info) {
70 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
71 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
76 guest_state->rsp = 0x00;
77 guest_state->rip = 0xfff0;
82 guest_state->efer |= EFER_MSR_svm_enable;
85 guest_state->rflags = 0x00000002; // The reserved bit is always 1
86 ctrl_area->svm_instrs.VMRUN = 1;
87 ctrl_area->svm_instrs.VMMCALL = 1;
88 ctrl_area->svm_instrs.VMLOAD = 1;
89 ctrl_area->svm_instrs.VMSAVE = 1;
90 ctrl_area->svm_instrs.STGI = 1;
91 ctrl_area->svm_instrs.CLGI = 1;
92 ctrl_area->svm_instrs.SKINIT = 1;
93 ctrl_area->svm_instrs.RDTSCP = 1;
94 ctrl_area->svm_instrs.ICEBP = 1;
95 ctrl_area->svm_instrs.WBINVD = 1;
96 ctrl_area->svm_instrs.MONITOR = 1;
97 ctrl_area->svm_instrs.MWAIT_always = 1;
98 ctrl_area->svm_instrs.MWAIT_if_armed = 1;
99 ctrl_area->instrs.INVLPGA = 1;
100 ctrl_area->instrs.CPUID = 1;
102 ctrl_area->instrs.HLT = 1;
103 // guest_state->cr0 = 0x00000001; // PE
106 ctrl_area->exceptions.de = 1;
107 ctrl_area->exceptions.df = 1;
109 ctrl_area->exceptions.ts = 1;
110 ctrl_area->exceptions.ss = 1;
111 ctrl_area->exceptions.ac = 1;
112 ctrl_area->exceptions.mc = 1;
113 ctrl_area->exceptions.gp = 1;
114 ctrl_area->exceptions.ud = 1;
115 ctrl_area->exceptions.np = 1;
116 ctrl_area->exceptions.of = 1;
118 ctrl_area->exceptions.nmi = 1;
122 ctrl_area->instrs.NMI = 1;
123 ctrl_area->instrs.SMI = 1;
124 ctrl_area->instrs.INIT = 1;
125 ctrl_area->instrs.PAUSE = 1;
126 ctrl_area->instrs.shutdown_evts = 1;
128 vm_info->vm_regs.rdx = 0x00000f00;
131 guest_state->cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode
134 guest_state->cs.selector = 0xf000;
135 guest_state->cs.limit = 0xffff;
136 guest_state->cs.base = 0x0000000f0000LL;
137 guest_state->cs.attrib.raw = 0xf3;
140 /* DEBUG FOR RETURN CODE */
141 ctrl_area->exit_code = 1;
144 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds),
145 &(guest_state->es), &(guest_state->fs),
146 &(guest_state->gs), NULL};
148 for ( i = 0; segregs[i] != NULL; i++) {
149 struct vmcb_selector * seg = segregs[i];
151 seg->selector = 0x0000;
152 // seg->base = seg->selector << 4;
153 seg->base = 0x00000000;
154 seg->attrib.raw = 0xf3;
158 guest_state->gdtr.limit = 0x0000ffff;
159 guest_state->gdtr.base = 0x0000000000000000LL;
160 guest_state->idtr.limit = 0x0000ffff;
161 guest_state->idtr.base = 0x0000000000000000LL;
163 guest_state->ldtr.selector = 0x0000;
164 guest_state->ldtr.limit = 0x0000ffff;
165 guest_state->ldtr.base = 0x0000000000000000LL;
166 guest_state->tr.selector = 0x0000;
167 guest_state->tr.limit = 0x0000ffff;
168 guest_state->tr.base = 0x0000000000000000LL;
171 guest_state->dr6 = 0x00000000ffff0ff0LL;
172 guest_state->dr7 = 0x0000000000000400LL;
175 v3_init_svm_io_map(vm_info);
176 ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(vm_info->io_map.arch_data);
177 ctrl_area->instrs.IOIO_PROT = 1;
180 v3_init_svm_msr_map(vm_info);
181 ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(vm_info->msr_map.arch_data);
182 ctrl_area->instrs.MSR_PROT = 1;
185 PrintDebug("Exiting on interrupts\n");
186 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
187 ctrl_area->instrs.INTR = 1;
190 if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
191 PrintDebug("Creating initial shadow page table\n");
193 /* JRL: This is a performance killer, and a simplistic solution */
194 /* We need to fix this */
195 ctrl_area->TLB_CONTROL = 1;
196 ctrl_area->guest_ASID = 1;
199 if (v3_init_passthrough_pts(vm_info) == -1) {
200 PrintError("Could not initialize passthrough page tables\n");
205 vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
206 PrintDebug("Created\n");
208 guest_state->cr3 = vm_info->direct_map_pt;
210 ctrl_area->cr_reads.cr0 = 1;
211 ctrl_area->cr_writes.cr0 = 1;
212 //ctrl_area->cr_reads.cr4 = 1;
213 ctrl_area->cr_writes.cr4 = 1;
214 ctrl_area->cr_reads.cr3 = 1;
215 ctrl_area->cr_writes.cr3 = 1;
217 v3_hook_msr(vm_info, EFER_MSR,
218 &v3_handle_efer_read,
219 &v3_handle_efer_write,
222 ctrl_area->instrs.INVLPG = 1;
224 ctrl_area->exceptions.pf = 1;
226 guest_state->g_pat = 0x7040600070406ULL;
228 guest_state->cr0 |= 0x80000000;
230 } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
231 // Flush the TLB on entries/exits
232 ctrl_area->TLB_CONTROL = 1;
233 ctrl_area->guest_ASID = 1;
235 // Enable Nested Paging
236 ctrl_area->NP_ENABLE = 1;
238 PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
240 // Set the Nested Page Table pointer
241 if (v3_init_passthrough_pts(vm_info) == -1) {
242 PrintError("Could not initialize Nested page tables\n");
246 ctrl_area->N_CR3 = vm_info->direct_map_pt;
248 guest_state->g_pat = 0x7040600070406ULL;
253 static int init_svm_guest(struct guest_info * info, struct v3_vm_config * config_ptr) {
256 v3_pre_config_guest(info, config_ptr);
258 PrintDebug("Allocating VMCB\n");
259 info->vmm_data = (void*)Allocate_VMCB();
261 PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data);
262 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
264 v3_post_config_guest(info, config_ptr);
269 static int start_svm_guest(struct guest_info *info) {
270 // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
271 // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
272 uint_t num_exits = 0;
276 PrintDebug("Launching SVM VM (vmcb=%p)\n", (void *)info->vmm_data);
277 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
279 info->run_state = VM_RUNNING;
280 rdtscll(info->yield_start_cycle);
286 // Conditionally yield the CPU if the timeslice has expired
290 PrintDebug("SVM Entry to CS=%p rip=%p...\n",
291 (void *)(addr_t)info->segments.cs.base,
292 (void *)(addr_t)info->rip);
295 // disable global interrupts for vm state transition
300 rdtscll(info->time_state.cached_host_tsc);
301 // guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
303 v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[info->cpu_id]);
308 //PrintDebug("SVM Returned\n");
310 // reenable global interrupts after vm exit
314 // Conditionally yield the CPU if the timeslice has expired
318 v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
321 if ((num_exits % 5000) == 0) {
322 PrintDebug("SVM Exit number %d\n", num_exits);
325 if (v3_handle_svm_exit(info) != 0) {
326 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
328 addr_t linear_addr = 0;
330 info->run_state = VM_ERROR;
332 PrintDebug("SVM ERROR!!\n");
334 v3_print_guest_state(info);
336 PrintDebug("SVM Exit Code: %p\n", (void *)(addr_t)guest_ctrl->exit_code);
338 PrintDebug("exit_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1));
339 PrintDebug("exit_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
341 PrintDebug("exit_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
342 PrintDebug("exit_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
344 linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
346 if (info->mem_mode == PHYSICAL_MEM) {
347 guest_pa_to_host_va(info, linear_addr, &host_addr);
348 } else if (info->mem_mode == VIRTUAL_MEM) {
349 guest_va_to_host_va(info, linear_addr, &host_addr);
352 PrintDebug("Host Address of rip = 0x%p\n", (void *)host_addr);
354 PrintDebug("Instr (15 bytes) at %p:\n", (void *)host_addr);
355 v3_dump_mem((uint8_t *)host_addr, 15);
358 v3_print_stack(info);
371 /* Checks machine SVM capability */
372 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
373 int v3_is_svm_capable() {
374 uint_t vm_cr_low = 0, vm_cr_high = 0;
375 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
377 v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
379 PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx);
381 if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
382 PrintDebug("SVM Not Available\n");
385 v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
387 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
389 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
390 PrintDebug("SVM is available but is disabled.\n");
392 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
394 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
396 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
397 PrintDebug("SVM BIOS Disabled, not unlockable\n");
399 PrintDebug("SVM is locked with a key\n");
404 PrintDebug("SVM is available and enabled.\n");
406 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
407 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax);
408 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx);
409 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx);
410 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
413 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
414 PrintDebug("SVM Nested Paging not supported\n");
416 PrintDebug("SVM Nested Paging supported\n");
424 static int has_svm_nested_paging() {
425 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
427 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
429 //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
431 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
432 PrintDebug("SVM Nested Paging not supported\n");
435 PrintDebug("SVM Nested Paging supported\n");
441 void v3_init_svm_cpu(int cpu_id) {
443 extern v3_cpu_arch_t v3_cpu_types[];
445 // Enable SVM on the CPU
446 v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
447 msr.e_reg.low |= EFER_MSR_svm_enable;
448 v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
450 PrintDebug("SVM Enabled\n");
452 // Setup the host state save area
453 host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4);
456 // msr.e_reg.high = 0;
457 //msr.e_reg.low = (uint_t)host_vmcb;
458 msr.r_reg = host_vmcbs[cpu_id];
460 PrintDebug("Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]);
461 v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
464 if (has_svm_nested_paging() == 1) {
465 v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU;
467 v3_cpu_types[cpu_id] = V3_SVM_CPU;
472 void v3_init_svm_hooks(struct v3_ctrl_ops * vmm_ops) {
474 // Setup the SVM specific vmm operations
475 vmm_ops->init_guest = &init_svm_guest;
476 vmm_ops->start_guest = &start_svm_guest;
477 vmm_ops->has_nested_paging = &has_svm_nested_paging;
535 * Test VMSAVE/VMLOAD Latency
537 #define vmsave ".byte 0x0F,0x01,0xDB ; "
538 #define vmload ".byte 0x0F,0x01,0xDA ; "
540 uint32_t start_lo, start_hi;
541 uint32_t end_lo, end_hi;
544 __asm__ __volatile__ (
546 "movl %%eax, %%esi ; "
547 "movl %%edx, %%edi ; "
548 "movq %%rcx, %%rax ; "
551 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
552 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
563 PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
565 __asm__ __volatile__ (
567 "movl %%eax, %%esi ; "
568 "movl %%edx, %%edi ; "
569 "movq %%rcx, %%rax ; "
572 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
573 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
585 PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
587 /* End Latency Test */
598 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
599 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
600 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
604 guest_state->rsp = vm_info.vm_regs.rsp;
605 guest_state->rip = vm_info.rip;
608 /* I pretty much just gutted this from TVMM */
609 /* Note: That means its probably wrong */
611 // set the segment registers to mirror ours
612 guest_state->cs.selector = 1<<3;
613 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
614 guest_state->cs.attrib.fields.S = 1;
615 guest_state->cs.attrib.fields.P = 1;
616 guest_state->cs.attrib.fields.db = 1;
617 guest_state->cs.attrib.fields.G = 1;
618 guest_state->cs.limit = 0xfffff;
619 guest_state->cs.base = 0;
621 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
622 for ( i = 0; segregs[i] != NULL; i++) {
623 struct vmcb_selector * seg = segregs[i];
625 seg->selector = 2<<3;
626 seg->attrib.fields.type = 0x2; // Data Segment+read/write
627 seg->attrib.fields.S = 1;
628 seg->attrib.fields.P = 1;
629 seg->attrib.fields.db = 1;
630 seg->attrib.fields.G = 1;
631 seg->limit = 0xfffff;
637 /* JRL THIS HAS TO GO */
639 // guest_state->tr.selector = GetTR_Selector();
640 guest_state->tr.attrib.fields.type = 0x9;
641 guest_state->tr.attrib.fields.P = 1;
642 // guest_state->tr.limit = GetTR_Limit();
643 //guest_state->tr.base = GetTR_Base();// - 0x2000;
651 guest_state->efer |= EFER_MSR_svm_enable;
652 guest_state->rflags = 0x00000002; // The reserved bit is always 1
653 ctrl_area->svm_instrs.VMRUN = 1;
654 guest_state->cr0 = 0x00000001; // PE
655 ctrl_area->guest_ASID = 1;
658 // guest_state->cpl = 0;
664 ctrl_area->cr_writes.cr4 = 1;
666 ctrl_area->exceptions.de = 1;
667 ctrl_area->exceptions.df = 1;
668 ctrl_area->exceptions.pf = 1;
669 ctrl_area->exceptions.ts = 1;
670 ctrl_area->exceptions.ss = 1;
671 ctrl_area->exceptions.ac = 1;
672 ctrl_area->exceptions.mc = 1;
673 ctrl_area->exceptions.gp = 1;
674 ctrl_area->exceptions.ud = 1;
675 ctrl_area->exceptions.np = 1;
676 ctrl_area->exceptions.of = 1;
677 ctrl_area->exceptions.nmi = 1;
681 ctrl_area->instrs.IOIO_PROT = 1;
682 ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
686 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
687 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
690 ctrl_area->instrs.INTR = 1;
697 memset(gdt_buf, 0, 6);
698 memset(idt_buf, 0, 6);
701 uint_t gdt_base, idt_base;
702 ushort_t gdt_limit, idt_limit;
705 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
706 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
707 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
710 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
711 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
712 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
715 // gdt_base -= 0x2000;
716 //idt_base -= 0x2000;
718 guest_state->gdtr.base = gdt_base;
719 guest_state->gdtr.limit = gdt_limit;
720 guest_state->idtr.base = idt_base;
721 guest_state->idtr.limit = idt_limit;
727 // also determine if CPU supports nested paging
729 if (vm_info.page_tables) {
731 // Flush the TLB on entries/exits
732 ctrl_area->TLB_CONTROL = 1;
734 // Enable Nested Paging
735 ctrl_area->NP_ENABLE = 1;
737 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
739 // Set the Nested Page Table pointer
740 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
743 // ctrl_area->N_CR3 = Get_CR3();
744 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
746 guest_state->g_pat = 0x7040600070406ULL;
748 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
749 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
751 // guest_state->cr0 |= 0x80000000;