1 #include <palacios/svm.h>
2 #include <palacios/vmm.h>
4 #include <palacios/vmcb.h>
5 #include <palacios/vmm_mem.h>
6 #include <palacios/vmm_paging.h>
7 #include <palacios/svm_handler.h>
9 #include <palacios/vmm_debug.h>
10 #include <palacios/vm_guest_mem.h>
12 #include <palacios/vmm_decoder.h>
15 extern struct vmm_os_hooks * os_hooks;
17 extern uint_t cpuid_ecx(uint_t op);
18 extern uint_t cpuid_edx(uint_t op);
19 extern void Get_MSR(uint_t MSR, uint_t * high_byte, uint_t * low_byte);
20 extern void Set_MSR(uint_t MSR, uint_t high_byte, uint_t low_byte);
21 extern uint_t launch_svm(vmcb_t * vmcb_addr);
22 extern void safe_svm_launch(vmcb_t * vmcb_addr, struct v3_gprs * gprs);
27 extern uint_t Get_CR3();
30 extern void DisableInts();
31 extern void EnableInts();
39 static vmcb_t * Allocate_VMCB() {
40 vmcb_t * vmcb_page = (vmcb_t*)os_hooks->allocate_pages(1);
43 memset(vmcb_page, 0, 4096);
52 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info *vm_info) {
53 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
54 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
58 guest_state->rsp = vm_info->vm_regs.rsp;
59 // guest_state->rip = vm_info->rip;
60 guest_state->rip = 0xfff0;
64 //ctrl_area->instrs.instrs.CR0 = 1;
65 ctrl_area->cr_reads.cr0 = 1;
66 ctrl_area->cr_writes.cr0 = 1;
68 guest_state->efer |= EFER_MSR_svm_enable;
69 guest_state->rflags = 0x00000002; // The reserved bit is always 1
70 ctrl_area->svm_instrs.VMRUN = 1;
71 ctrl_area->instrs.HLT = 1;
72 // guest_state->cr0 = 0x00000001; // PE
73 ctrl_area->guest_ASID = 1;
75 ctrl_area->exceptions.de = 1;
76 ctrl_area->exceptions.df = 1;
77 ctrl_area->exceptions.pf = 1;
78 ctrl_area->exceptions.ts = 1;
79 ctrl_area->exceptions.ss = 1;
80 ctrl_area->exceptions.ac = 1;
81 ctrl_area->exceptions.mc = 1;
82 ctrl_area->exceptions.gp = 1;
83 ctrl_area->exceptions.ud = 1;
84 ctrl_area->exceptions.np = 1;
85 ctrl_area->exceptions.of = 1;
86 ctrl_area->exceptions.nmi = 1;
88 // Debug of boot on physical machines - 7/14/08
89 ctrl_area->instrs.NMI=1;
90 ctrl_area->instrs.SMI=1;
91 ctrl_area->instrs.INIT=1;
92 ctrl_area->instrs.PAUSE=1;
93 ctrl_area->instrs.shutdown_evts=1;
97 vm_info->vm_regs.rdx = 0x00000f00;
99 guest_state->cr0 = 0x60000010;
101 guest_state->cs.selector = 0xf000;
102 guest_state->cs.limit=0xffff;
103 guest_state->cs.base = 0x0000000f0000LL;
104 guest_state->cs.attrib.raw = 0xf3;
107 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
108 for ( i = 0; segregs[i] != NULL; i++) {
109 struct vmcb_selector * seg = segregs[i];
111 seg->selector = 0x0000;
112 // seg->base = seg->selector << 4;
113 seg->base = 0x00000000;
114 seg->attrib.raw = 0xf3;
118 guest_state->gdtr.limit = 0x0000ffff;
119 guest_state->gdtr.base = 0x0000000000000000LL;
120 guest_state->idtr.limit = 0x0000ffff;
121 guest_state->idtr.base = 0x0000000000000000LL;
123 guest_state->ldtr.selector = 0x0000;
124 guest_state->ldtr.limit = 0x0000ffff;
125 guest_state->ldtr.base = 0x0000000000000000LL;
126 guest_state->tr.selector = 0x0000;
127 guest_state->tr.limit = 0x0000ffff;
128 guest_state->tr.base = 0x0000000000000000LL;
131 guest_state->dr6 = 0x00000000ffff0ff0LL;
132 guest_state->dr7 = 0x0000000000000400LL;
134 if (vm_info->io_map.num_ports > 0) {
135 vmm_io_hook_t * iter;
136 addr_t io_port_bitmap;
138 io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
139 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
141 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
143 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
145 FOREACH_IO_HOOK(vm_info->io_map, iter) {
146 ushort_t port = iter->port;
147 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
149 bitmap += (port / 8);
150 PrintDebug("Setting Bit for port 0x%x\n", port);
151 *bitmap |= 1 << (port % 8);
155 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
157 ctrl_area->instrs.IOIO_PROT = 1;
162 PrintDebug("Exiting on interrupts\n");
163 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
164 ctrl_area->instrs.INTR = 1;
167 if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
168 PrintDebug("Creating initial shadow page table\n");
169 vm_info->direct_map_pt = (addr_t)create_passthrough_pde32_pts(vm_info);
170 vm_info->shdw_pg_state.shadow_cr3 |= (vm_info->direct_map_pt & ~0xfff);
171 vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
172 PrintDebug("Created\n");
174 guest_state->cr3 = vm_info->shdw_pg_state.shadow_cr3;
176 //PrintDebugPageTables((pde32_t*)(vm_info->shdw_pg_state.shadow_cr3.e_reg.low));
178 ctrl_area->cr_reads.cr3 = 1;
179 ctrl_area->cr_writes.cr3 = 1;
182 ctrl_area->instrs.INVLPG = 1;
183 ctrl_area->instrs.INVLPGA = 1;
185 /* JRL: This is a performance killer, and a simplistic solution */
186 /* We need to fix this */
187 ctrl_area->TLB_CONTROL = 1;
191 guest_state->g_pat = 0x7040600070406ULL;
193 guest_state->cr0 |= 0x80000000;
195 } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
196 // Flush the TLB on entries/exits
197 ctrl_area->TLB_CONTROL = 1;
199 // Enable Nested Paging
200 ctrl_area->NP_ENABLE = 1;
202 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
204 // Set the Nested Page Table pointer
205 vm_info->direct_map_pt = ((addr_t)create_passthrough_pde32_pts(vm_info) & ~0xfff);
206 ctrl_area->N_CR3 = vm_info->direct_map_pt;
208 // ctrl_area->N_CR3 = Get_CR3();
209 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
211 guest_state->g_pat = 0x7040600070406ULL;
226 static int init_svm_guest(struct guest_info *info) {
228 PrintDebug("Allocating VMCB\n");
229 info->vmm_data = (void*)Allocate_VMCB();
232 //PrintDebug("Generating Guest nested page tables\n");
233 // info->page_tables = NULL;
234 //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
235 //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
236 // PrintDebugPageTables(info->page_tables);
239 PrintDebug("Initializing VMCB (addr=%x)\n", info->vmm_data);
240 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
245 info->vm_regs.rdi = 0;
246 info->vm_regs.rsi = 0;
247 info->vm_regs.rbp = 0;
248 info->vm_regs.rsp = 0;
249 info->vm_regs.rbx = 0;
250 info->vm_regs.rdx = 0;
251 info->vm_regs.rcx = 0;
252 info->vm_regs.rax = 0;
258 // can we start a kernel thread here...
259 static int start_svm_guest(struct guest_info *info) {
260 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
261 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
263 PrintDebug("Launching SVM VM (vmcb=%x)\n", info->vmm_data);
264 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
273 PrintDebug("SVM Entry to rip=%x...\n", info->rip);
275 rdtscll(info->time_state.cached_host_tsc);
276 guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
278 PrintDebug("Launching\n");
279 safe_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
282 //PrintDebug("SVM Returned\n");
285 v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
290 if (handle_svm_exit(info) != 0) {
293 addr_t linear_addr = 0;
295 PrintDebug("SVM ERROR!!\n");
297 PrintDebug("RIP: %x\n", guest_state->rip);
300 linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
303 PrintDebug("RIP Linear: %x\n", linear_addr);
304 PrintV3Segments(&(info->segments));
305 PrintV3CtrlRegs(&(info->ctrl_regs));
308 if (info->mem_mode == PHYSICAL_MEM) {
309 guest_pa_to_host_pa(info, linear_addr, &host_addr);
310 } else if (info->mem_mode == VIRTUAL_MEM) {
311 guest_va_to_host_pa(info, linear_addr, &host_addr);
315 PrintDebug("Host Address of rip = 0x%x\n", host_addr);
317 PrintDebug("Instr (15 bytes) at %x:\n", host_addr);
318 PrintTraceMemDump((char*)host_addr, 15);
329 /* Checks machine SVM capability */
330 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
331 int is_svm_capable() {
337 uint_t vm_cr_low = 0, vm_cr_high = 0;
340 ret = cpuid_ecx(CPUID_FEATURE_IDS);
342 PrintDebug("CPUID_FEATURE_IDS_ecx=0x%x\n",ret);
344 if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
345 PrintDebug("SVM Not Available\n");
348 Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
350 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n",vm_cr_high,vm_cr_low);
352 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
353 PrintDebug("SVM is available but is disabled.\n");
355 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
357 PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
359 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
360 PrintDebug("SVM BIOS Disabled, not unlockable\n");
362 PrintDebug("SVM is locked with a key\n");
367 PrintDebug("SVM is available and enabled.\n");
369 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
371 PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
373 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
374 PrintDebug("SVM Nested Paging not supported\n");
376 PrintDebug("SVM Nested Paging supported\n");
386 uint_t ret = cpuid_ecx(CPUID_FEATURE_IDS);
387 uint_t vm_cr_low = 0, vm_cr_high = 0;
390 if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
391 PrintDebug("SVM Not Available\n");
395 Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
397 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n",vm_cr_high,vm_cr_low);
400 // this part is clearly wrong, since the np bit is in
402 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
403 PrintDebug("Nested Paging not supported\n");
405 PrintDebug("Nested Paging supported\n");
408 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
409 PrintDebug("SVM is disabled.\n");
413 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
415 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
416 PrintDebug("SVM BIOS Disabled, not unlockable\n");
418 PrintDebug("SVM is locked with a key\n");
427 int has_svm_nested_paging() {
430 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
432 //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
434 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
435 PrintDebug("SVM Nested Paging not supported\n");
438 PrintDebug("SVM Nested Paging supported\n");
446 void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
451 // Enable SVM on the CPU
452 Get_MSR(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
453 msr.e_reg.low |= EFER_MSR_svm_enable;
454 Set_MSR(EFER_MSR, 0, msr.e_reg.low);
456 PrintDebug("SVM Enabled\n");
459 // Setup the host state save area
460 host_state = os_hooks->allocate_pages(4);
463 msr.e_reg.low = (uint_t)host_state;
466 PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
467 Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
471 // Setup the SVM specific vmm operations
472 vmm_ops->init_guest = &init_svm_guest;
473 vmm_ops->start_guest = &start_svm_guest;
474 vmm_ops->has_nested_paging = &has_svm_nested_paging;
530 /*static void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
531 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
532 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
536 guest_state->rsp = vm_info.vm_regs.rsp;
537 guest_state->rip = vm_info.rip;
540 //ctrl_area->instrs.instrs.CR0 = 1;
541 ctrl_area->cr_reads.cr0 = 1;
542 ctrl_area->cr_writes.cr0 = 1;
544 guest_state->efer |= EFER_MSR_svm_enable;
545 guest_state->rflags = 0x00000002; // The reserved bit is always 1
546 ctrl_area->svm_instrs.VMRUN = 1;
547 // guest_state->cr0 = 0x00000001; // PE
548 ctrl_area->guest_ASID = 1;
551 ctrl_area->exceptions.de = 1;
552 ctrl_area->exceptions.df = 1;
553 ctrl_area->exceptions.pf = 1;
554 ctrl_area->exceptions.ts = 1;
555 ctrl_area->exceptions.ss = 1;
556 ctrl_area->exceptions.ac = 1;
557 ctrl_area->exceptions.mc = 1;
558 ctrl_area->exceptions.gp = 1;
559 ctrl_area->exceptions.ud = 1;
560 ctrl_area->exceptions.np = 1;
561 ctrl_area->exceptions.of = 1;
562 ctrl_area->exceptions.nmi = 1;
564 guest_state->cs.selector = 0x0000;
565 guest_state->cs.limit=~0u;
566 guest_state->cs.base = guest_state->cs.selector<<4;
567 guest_state->cs.attrib.raw = 0xf3;
570 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
571 for ( i = 0; segregs[i] != NULL; i++) {
572 struct vmcb_selector * seg = segregs[i];
574 seg->selector = 0x0000;
575 seg->base = seg->selector << 4;
576 seg->attrib.raw = 0xf3;
580 if (vm_info.io_map.num_ports > 0) {
581 vmm_io_hook_t * iter;
582 addr_t io_port_bitmap;
584 io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
585 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
587 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
589 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
591 FOREACH_IO_HOOK(vm_info.io_map, iter) {
592 ushort_t port = iter->port;
593 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
595 bitmap += (port / 8);
596 PrintDebug("Setting Bit in block %x\n", bitmap);
597 *bitmap |= 1 << (port % 8);
601 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
603 ctrl_area->instrs.IOIO_PROT = 1;
606 ctrl_area->instrs.INTR = 1;
610 if (vm_info.page_mode == SHADOW_PAGING) {
611 PrintDebug("Creating initial shadow page table\n");
612 vm_info.shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
613 PrintDebug("Created\n");
615 guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3;
617 ctrl_area->cr_reads.cr3 = 1;
618 ctrl_area->cr_writes.cr3 = 1;
621 ctrl_area->instrs.INVLPG = 1;
622 ctrl_area->instrs.INVLPGA = 1;
624 guest_state->g_pat = 0x7040600070406ULL;
626 guest_state->cr0 |= 0x80000000;
627 } else if (vm_info.page_mode == NESTED_PAGING) {
628 // Flush the TLB on entries/exits
629 //ctrl_area->TLB_CONTROL = 1;
631 // Enable Nested Paging
632 //ctrl_area->NP_ENABLE = 1;
634 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
636 // Set the Nested Page Table pointer
637 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
638 // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
640 // ctrl_area->N_CR3 = Get_CR3();
641 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
643 // guest_state->g_pat = 0x7040600070406ULL;
658 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
659 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
660 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
664 guest_state->rsp = vm_info.vm_regs.rsp;
665 guest_state->rip = vm_info.rip;
668 /* I pretty much just gutted this from TVMM */
669 /* Note: That means its probably wrong */
671 // set the segment registers to mirror ours
672 guest_state->cs.selector = 1<<3;
673 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
674 guest_state->cs.attrib.fields.S = 1;
675 guest_state->cs.attrib.fields.P = 1;
676 guest_state->cs.attrib.fields.db = 1;
677 guest_state->cs.attrib.fields.G = 1;
678 guest_state->cs.limit = 0xfffff;
679 guest_state->cs.base = 0;
681 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
682 for ( i = 0; segregs[i] != NULL; i++) {
683 struct vmcb_selector * seg = segregs[i];
685 seg->selector = 2<<3;
686 seg->attrib.fields.type = 0x2; // Data Segment+read/write
687 seg->attrib.fields.S = 1;
688 seg->attrib.fields.P = 1;
689 seg->attrib.fields.db = 1;
690 seg->attrib.fields.G = 1;
691 seg->limit = 0xfffff;
697 /* JRL THIS HAS TO GO */
699 // guest_state->tr.selector = GetTR_Selector();
700 guest_state->tr.attrib.fields.type = 0x9;
701 guest_state->tr.attrib.fields.P = 1;
702 // guest_state->tr.limit = GetTR_Limit();
703 //guest_state->tr.base = GetTR_Base();// - 0x2000;
711 guest_state->efer |= EFER_MSR_svm_enable;
712 guest_state->rflags = 0x00000002; // The reserved bit is always 1
713 ctrl_area->svm_instrs.VMRUN = 1;
714 guest_state->cr0 = 0x00000001; // PE
715 ctrl_area->guest_ASID = 1;
718 // guest_state->cpl = 0;
724 ctrl_area->cr_writes.cr4 = 1;
726 ctrl_area->exceptions.de = 1;
727 ctrl_area->exceptions.df = 1;
728 ctrl_area->exceptions.pf = 1;
729 ctrl_area->exceptions.ts = 1;
730 ctrl_area->exceptions.ss = 1;
731 ctrl_area->exceptions.ac = 1;
732 ctrl_area->exceptions.mc = 1;
733 ctrl_area->exceptions.gp = 1;
734 ctrl_area->exceptions.ud = 1;
735 ctrl_area->exceptions.np = 1;
736 ctrl_area->exceptions.of = 1;
737 ctrl_area->exceptions.nmi = 1;
741 ctrl_area->instrs.IOIO_PROT = 1;
742 ctrl_area->IOPM_BASE_PA = (uint_t)os_hooks->allocate_pages(3);
746 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
747 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
750 ctrl_area->instrs.INTR = 1;
757 memset(gdt_buf, 0, 6);
758 memset(idt_buf, 0, 6);
761 uint_t gdt_base, idt_base;
762 ushort_t gdt_limit, idt_limit;
765 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
766 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
767 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
770 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
771 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
772 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
775 // gdt_base -= 0x2000;
776 //idt_base -= 0x2000;
778 guest_state->gdtr.base = gdt_base;
779 guest_state->gdtr.limit = gdt_limit;
780 guest_state->idtr.base = idt_base;
781 guest_state->idtr.limit = idt_limit;
787 // also determine if CPU supports nested paging
789 if (vm_info.page_tables) {
791 // Flush the TLB on entries/exits
792 ctrl_area->TLB_CONTROL = 1;
794 // Enable Nested Paging
795 ctrl_area->NP_ENABLE = 1;
797 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
799 // Set the Nested Page Table pointer
800 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
803 // ctrl_area->N_CR3 = Get_CR3();
804 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
806 guest_state->g_pat = 0x7040600070406ULL;
808 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
809 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
811 // guest_state->cr0 |= 0x80000000;