1 #include <palacios/svm.h>
2 #include <palacios/vmm.h>
4 #include <palacios/vmcb.h>
5 #include <palacios/vmm_mem.h>
6 #include <palacios/vmm_paging.h>
7 #include <palacios/svm_handler.h>
9 #include <palacios/vmm_debug.h>
10 #include <palacios/vm_guest_mem.h>
12 #include <palacios/vmm_decoder.h>
17 extern uint_t cpuid_ecx(uint_t op);
18 extern uint_t cpuid_edx(uint_t op);
19 extern void Get_MSR(uint_t MSR, uint_t * high_byte, uint_t * low_byte);
20 extern void Set_MSR(uint_t MSR, uint_t high_byte, uint_t low_byte);
21 extern uint_t launch_svm(vmcb_t * vmcb_addr);
22 extern void safe_svm_launch(vmcb_t * vmcb_addr, struct v3_gprs * gprs);
27 extern uint_t Get_CR3();
30 extern void DisableInts();
31 extern void EnableInts();
39 static vmcb_t * Allocate_VMCB() {
40 vmcb_t * vmcb_page = (vmcb_t *)V3_AllocPages(1);
43 memset(vmcb_page, 0, 4096);
52 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info *vm_info) {
53 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
54 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
58 guest_state->rsp = vm_info->vm_regs.rsp;
59 // guest_state->rip = vm_info->rip;
60 guest_state->rip = 0xfff0;
64 //ctrl_area->instrs.instrs.CR0 = 1;
65 ctrl_area->cr_reads.cr0 = 1;
66 ctrl_area->cr_writes.cr0 = 1;
68 guest_state->efer |= EFER_MSR_svm_enable;
69 guest_state->rflags = 0x00000002; // The reserved bit is always 1
70 ctrl_area->svm_instrs.VMRUN = 1;
71 ctrl_area->instrs.HLT = 1;
72 // guest_state->cr0 = 0x00000001; // PE
73 ctrl_area->guest_ASID = 1;
77 ctrl_area->exceptions.de = 1;
78 ctrl_area->exceptions.df = 1;
80 ctrl_area->exceptions.ts = 1;
81 ctrl_area->exceptions.ss = 1;
82 ctrl_area->exceptions.ac = 1;
83 ctrl_area->exceptions.mc = 1;
84 ctrl_area->exceptions.gp = 1;
85 ctrl_area->exceptions.ud = 1;
86 ctrl_area->exceptions.np = 1;
87 ctrl_area->exceptions.of = 1;
89 ctrl_area->exceptions.nmi = 1;
91 // Debug of boot on physical machines - 7/14/08
92 ctrl_area->instrs.NMI=1;
93 ctrl_area->instrs.SMI=1;
94 ctrl_area->instrs.INIT=1;
95 ctrl_area->instrs.PAUSE=1;
96 ctrl_area->instrs.shutdown_evts=1;
100 vm_info->vm_regs.rdx = 0x00000f00;
102 guest_state->cr0 = 0x60000010;
104 guest_state->cs.selector = 0xf000;
105 guest_state->cs.limit=0xffff;
106 guest_state->cs.base = 0x0000000f0000LL;
107 guest_state->cs.attrib.raw = 0xf3;
110 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
111 for ( i = 0; segregs[i] != NULL; i++) {
112 struct vmcb_selector * seg = segregs[i];
114 seg->selector = 0x0000;
115 // seg->base = seg->selector << 4;
116 seg->base = 0x00000000;
117 seg->attrib.raw = 0xf3;
121 guest_state->gdtr.limit = 0x0000ffff;
122 guest_state->gdtr.base = 0x0000000000000000LL;
123 guest_state->idtr.limit = 0x0000ffff;
124 guest_state->idtr.base = 0x0000000000000000LL;
126 guest_state->ldtr.selector = 0x0000;
127 guest_state->ldtr.limit = 0x0000ffff;
128 guest_state->ldtr.base = 0x0000000000000000LL;
129 guest_state->tr.selector = 0x0000;
130 guest_state->tr.limit = 0x0000ffff;
131 guest_state->tr.base = 0x0000000000000000LL;
134 guest_state->dr6 = 0x00000000ffff0ff0LL;
135 guest_state->dr7 = 0x0000000000000400LL;
137 if (vm_info->io_map.num_ports > 0) {
138 struct vmm_io_hook * iter;
139 addr_t io_port_bitmap;
141 io_port_bitmap = (addr_t)V3_AllocPages(3);
142 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
144 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
146 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
148 FOREACH_IO_HOOK(vm_info->io_map, iter) {
149 ushort_t port = iter->port;
150 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
152 bitmap += (port / 8);
153 PrintDebug("Setting Bit for port 0x%x\n", port);
154 *bitmap |= 1 << (port % 8);
158 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
160 ctrl_area->instrs.IOIO_PROT = 1;
165 PrintDebug("Exiting on interrupts\n");
166 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
167 ctrl_area->instrs.INTR = 1;
170 if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
171 PrintDebug("Creating initial shadow page table\n");
172 vm_info->direct_map_pt = (addr_t)create_passthrough_pde32_pts(vm_info);
173 vm_info->shdw_pg_state.shadow_cr3 |= (vm_info->direct_map_pt & ~0xfff);
174 vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
175 PrintDebug("Created\n");
177 guest_state->cr3 = vm_info->shdw_pg_state.shadow_cr3;
179 //PrintDebugPageTables((pde32_t*)(vm_info->shdw_pg_state.shadow_cr3.e_reg.low));
181 ctrl_area->cr_reads.cr3 = 1;
182 ctrl_area->cr_writes.cr3 = 1;
185 ctrl_area->instrs.INVLPG = 1;
186 ctrl_area->instrs.INVLPGA = 1;
188 ctrl_area->exceptions.pf = 1;
190 /* JRL: This is a performance killer, and a simplistic solution */
191 /* We need to fix this */
192 ctrl_area->TLB_CONTROL = 1;
196 guest_state->g_pat = 0x7040600070406ULL;
198 guest_state->cr0 |= 0x80000000;
200 } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
201 // Flush the TLB on entries/exits
202 ctrl_area->TLB_CONTROL = 1;
204 // Enable Nested Paging
205 ctrl_area->NP_ENABLE = 1;
207 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
209 // Set the Nested Page Table pointer
210 vm_info->direct_map_pt = ((addr_t)create_passthrough_pde32_pts(vm_info) & ~0xfff);
211 ctrl_area->N_CR3 = vm_info->direct_map_pt;
213 // ctrl_area->N_CR3 = Get_CR3();
214 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
216 guest_state->g_pat = 0x7040600070406ULL;
224 static int init_svm_guest(struct guest_info *info) {
226 PrintDebug("Allocating VMCB\n");
227 info->vmm_data = (void*)Allocate_VMCB();
230 //PrintDebug("Generating Guest nested page tables\n");
231 // info->page_tables = NULL;
232 //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
233 //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
234 // PrintDebugPageTables(info->page_tables);
237 PrintDebug("Initializing VMCB (addr=%x)\n", info->vmm_data);
238 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
241 info->run_state = VM_STOPPED;
245 info->vm_regs.rdi = 0;
246 info->vm_regs.rsi = 0;
247 info->vm_regs.rbp = 0;
248 info->vm_regs.rsp = 0;
249 info->vm_regs.rbx = 0;
250 info->vm_regs.rdx = 0;
251 info->vm_regs.rcx = 0;
252 info->vm_regs.rax = 0;
258 // can we start a kernel thread here...
259 static int start_svm_guest(struct guest_info *info) {
260 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
261 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
262 uint_t num_exits = 0;
266 PrintDebug("Launching SVM VM (vmcb=%x)\n", info->vmm_data);
267 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
269 info->run_state = VM_RUNNING;
278 // PrintDebug("SVM Entry to rip=%x...\n", info->rip);
280 rdtscll(info->time_state.cached_host_tsc);
281 guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
283 safe_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
286 //PrintDebug("SVM Returned\n");
289 v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
294 if ((num_exits % 25) == 0) {
295 PrintDebug("SVM Exit number %d\n", num_exits);
299 if (handle_svm_exit(info) != 0) {
302 addr_t linear_addr = 0;
304 info->run_state = VM_ERROR;
306 PrintDebug("SVM ERROR!!\n");
308 PrintDebug("RIP: %x\n", guest_state->rip);
311 linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
314 PrintDebug("RIP Linear: %x\n", linear_addr);
315 PrintV3Segments(info);
316 PrintV3CtrlRegs(info);
319 if (info->mem_mode == PHYSICAL_MEM) {
320 guest_pa_to_host_pa(info, linear_addr, &host_addr);
321 } else if (info->mem_mode == VIRTUAL_MEM) {
322 guest_va_to_host_pa(info, linear_addr, &host_addr);
326 PrintDebug("Host Address of rip = 0x%x\n", host_addr);
328 PrintDebug("Instr (15 bytes) at %x:\n", host_addr);
329 PrintTraceMemDump((char*)host_addr, 15);
340 /* Checks machine SVM capability */
341 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
342 int is_svm_capable() {
348 uint_t vm_cr_low = 0, vm_cr_high = 0;
351 ret = cpuid_ecx(CPUID_FEATURE_IDS);
353 PrintDebug("CPUID_FEATURE_IDS_ecx=0x%x\n",ret);
355 if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
356 PrintDebug("SVM Not Available\n");
359 Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
361 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n",vm_cr_high,vm_cr_low);
363 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
364 PrintDebug("SVM is available but is disabled.\n");
366 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
368 PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
370 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
371 PrintDebug("SVM BIOS Disabled, not unlockable\n");
373 PrintDebug("SVM is locked with a key\n");
378 PrintDebug("SVM is available and enabled.\n");
380 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
382 PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
384 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
385 PrintDebug("SVM Nested Paging not supported\n");
387 PrintDebug("SVM Nested Paging supported\n");
397 uint_t ret = cpuid_ecx(CPUID_FEATURE_IDS);
398 uint_t vm_cr_low = 0, vm_cr_high = 0;
401 if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
402 PrintDebug("SVM Not Available\n");
406 Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
408 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n",vm_cr_high,vm_cr_low);
411 // this part is clearly wrong, since the np bit is in
413 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
414 PrintDebug("Nested Paging not supported\n");
416 PrintDebug("Nested Paging supported\n");
419 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
420 PrintDebug("SVM is disabled.\n");
424 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
426 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
427 PrintDebug("SVM BIOS Disabled, not unlockable\n");
429 PrintDebug("SVM is locked with a key\n");
438 int has_svm_nested_paging() {
441 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
443 //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
445 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
446 PrintDebug("SVM Nested Paging not supported\n");
449 PrintDebug("SVM Nested Paging supported\n");
457 void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
462 // Enable SVM on the CPU
463 Get_MSR(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
464 msr.e_reg.low |= EFER_MSR_svm_enable;
465 Set_MSR(EFER_MSR, 0, msr.e_reg.low);
467 PrintDebug("SVM Enabled\n");
470 // Setup the host state save area
471 host_state = V3_AllocPages(4);
474 msr.e_reg.low = (uint_t)host_state;
477 PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
478 Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
482 // Setup the SVM specific vmm operations
483 vmm_ops->init_guest = &init_svm_guest;
484 vmm_ops->start_guest = &start_svm_guest;
485 vmm_ops->has_nested_paging = &has_svm_nested_paging;
541 /*static void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
542 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
543 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
547 guest_state->rsp = vm_info.vm_regs.rsp;
548 guest_state->rip = vm_info.rip;
551 //ctrl_area->instrs.instrs.CR0 = 1;
552 ctrl_area->cr_reads.cr0 = 1;
553 ctrl_area->cr_writes.cr0 = 1;
555 guest_state->efer |= EFER_MSR_svm_enable;
556 guest_state->rflags = 0x00000002; // The reserved bit is always 1
557 ctrl_area->svm_instrs.VMRUN = 1;
558 // guest_state->cr0 = 0x00000001; // PE
559 ctrl_area->guest_ASID = 1;
562 ctrl_area->exceptions.de = 1;
563 ctrl_area->exceptions.df = 1;
564 ctrl_area->exceptions.pf = 1;
565 ctrl_area->exceptions.ts = 1;
566 ctrl_area->exceptions.ss = 1;
567 ctrl_area->exceptions.ac = 1;
568 ctrl_area->exceptions.mc = 1;
569 ctrl_area->exceptions.gp = 1;
570 ctrl_area->exceptions.ud = 1;
571 ctrl_area->exceptions.np = 1;
572 ctrl_area->exceptions.of = 1;
573 ctrl_area->exceptions.nmi = 1;
575 guest_state->cs.selector = 0x0000;
576 guest_state->cs.limit=~0u;
577 guest_state->cs.base = guest_state->cs.selector<<4;
578 guest_state->cs.attrib.raw = 0xf3;
581 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
582 for ( i = 0; segregs[i] != NULL; i++) {
583 struct vmcb_selector * seg = segregs[i];
585 seg->selector = 0x0000;
586 seg->base = seg->selector << 4;
587 seg->attrib.raw = 0xf3;
591 if (vm_info.io_map.num_ports > 0) {
592 struct vmm_io_hook * iter;
593 addr_t io_port_bitmap;
595 io_port_bitmap = (addr_t)V3_AllocPages(3);
596 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
598 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
600 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
602 FOREACH_IO_HOOK(vm_info.io_map, iter) {
603 ushort_t port = iter->port;
604 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
606 bitmap += (port / 8);
607 PrintDebug("Setting Bit in block %x\n", bitmap);
608 *bitmap |= 1 << (port % 8);
612 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
614 ctrl_area->instrs.IOIO_PROT = 1;
617 ctrl_area->instrs.INTR = 1;
621 if (vm_info.page_mode == SHADOW_PAGING) {
622 PrintDebug("Creating initial shadow page table\n");
623 vm_info.shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
624 PrintDebug("Created\n");
626 guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3;
628 ctrl_area->cr_reads.cr3 = 1;
629 ctrl_area->cr_writes.cr3 = 1;
632 ctrl_area->instrs.INVLPG = 1;
633 ctrl_area->instrs.INVLPGA = 1;
635 guest_state->g_pat = 0x7040600070406ULL;
637 guest_state->cr0 |= 0x80000000;
638 } else if (vm_info.page_mode == NESTED_PAGING) {
639 // Flush the TLB on entries/exits
640 //ctrl_area->TLB_CONTROL = 1;
642 // Enable Nested Paging
643 //ctrl_area->NP_ENABLE = 1;
645 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
647 // Set the Nested Page Table pointer
648 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
649 // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
651 // ctrl_area->N_CR3 = Get_CR3();
652 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
654 // guest_state->g_pat = 0x7040600070406ULL;
669 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
670 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
671 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
675 guest_state->rsp = vm_info.vm_regs.rsp;
676 guest_state->rip = vm_info.rip;
679 /* I pretty much just gutted this from TVMM */
680 /* Note: That means its probably wrong */
682 // set the segment registers to mirror ours
683 guest_state->cs.selector = 1<<3;
684 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
685 guest_state->cs.attrib.fields.S = 1;
686 guest_state->cs.attrib.fields.P = 1;
687 guest_state->cs.attrib.fields.db = 1;
688 guest_state->cs.attrib.fields.G = 1;
689 guest_state->cs.limit = 0xfffff;
690 guest_state->cs.base = 0;
692 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
693 for ( i = 0; segregs[i] != NULL; i++) {
694 struct vmcb_selector * seg = segregs[i];
696 seg->selector = 2<<3;
697 seg->attrib.fields.type = 0x2; // Data Segment+read/write
698 seg->attrib.fields.S = 1;
699 seg->attrib.fields.P = 1;
700 seg->attrib.fields.db = 1;
701 seg->attrib.fields.G = 1;
702 seg->limit = 0xfffff;
708 /* JRL THIS HAS TO GO */
710 // guest_state->tr.selector = GetTR_Selector();
711 guest_state->tr.attrib.fields.type = 0x9;
712 guest_state->tr.attrib.fields.P = 1;
713 // guest_state->tr.limit = GetTR_Limit();
714 //guest_state->tr.base = GetTR_Base();// - 0x2000;
722 guest_state->efer |= EFER_MSR_svm_enable;
723 guest_state->rflags = 0x00000002; // The reserved bit is always 1
724 ctrl_area->svm_instrs.VMRUN = 1;
725 guest_state->cr0 = 0x00000001; // PE
726 ctrl_area->guest_ASID = 1;
729 // guest_state->cpl = 0;
735 ctrl_area->cr_writes.cr4 = 1;
737 ctrl_area->exceptions.de = 1;
738 ctrl_area->exceptions.df = 1;
739 ctrl_area->exceptions.pf = 1;
740 ctrl_area->exceptions.ts = 1;
741 ctrl_area->exceptions.ss = 1;
742 ctrl_area->exceptions.ac = 1;
743 ctrl_area->exceptions.mc = 1;
744 ctrl_area->exceptions.gp = 1;
745 ctrl_area->exceptions.ud = 1;
746 ctrl_area->exceptions.np = 1;
747 ctrl_area->exceptions.of = 1;
748 ctrl_area->exceptions.nmi = 1;
752 ctrl_area->instrs.IOIO_PROT = 1;
753 ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
757 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
758 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
761 ctrl_area->instrs.INTR = 1;
768 memset(gdt_buf, 0, 6);
769 memset(idt_buf, 0, 6);
772 uint_t gdt_base, idt_base;
773 ushort_t gdt_limit, idt_limit;
776 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
777 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
778 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
781 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
782 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
783 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
786 // gdt_base -= 0x2000;
787 //idt_base -= 0x2000;
789 guest_state->gdtr.base = gdt_base;
790 guest_state->gdtr.limit = gdt_limit;
791 guest_state->idtr.base = idt_base;
792 guest_state->idtr.limit = idt_limit;
798 // also determine if CPU supports nested paging
800 if (vm_info.page_tables) {
802 // Flush the TLB on entries/exits
803 ctrl_area->TLB_CONTROL = 1;
805 // Enable Nested Paging
806 ctrl_area->NP_ENABLE = 1;
808 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
810 // Set the Nested Page Table pointer
811 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
814 // ctrl_area->N_CR3 = Get_CR3();
815 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
817 guest_state->g_pat = 0x7040600070406ULL;
819 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
820 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
822 // guest_state->cr0 |= 0x80000000;