1 #include <geekos/svm.h>
2 #include <geekos/vmm.h>
4 #include <geekos/vmcb.h>
5 #include <geekos/vmm_mem.h>
6 #include <geekos/vmm_paging.h>
7 #include <geekos/svm_handler.h>
9 #include <geekos/vmm_debug.h>
12 /* TEMPORARY BECAUSE SVM IS WEIRD */
13 #include <geekos/tss.h>
16 extern struct vmm_os_hooks * os_hooks;
18 extern uint_t cpuid_ecx(uint_t op);
19 extern uint_t cpuid_edx(uint_t op);
20 extern void Get_MSR(uint_t MSR, uint_t * high_byte, uint_t * low_byte);
21 extern void Set_MSR(uint_t MSR, uint_t high_byte, uint_t low_byte);
22 extern uint_t launch_svm(vmcb_t * vmcb_addr);
23 extern void safe_svm_launch(vmcb_t * vmcb_addr, struct guest_gprs * gprs);
25 extern uint_t Get_CR3();
27 extern void GetGDTR(void * gdt);
28 extern void GetIDTR(void * idt);
30 extern void DisableInts();
32 /* Checks machine SVM capability */
33 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
34 int is_svm_capable() {
35 uint_t ret = cpuid_ecx(CPUID_FEATURE_IDS);
36 uint_t vm_cr_low = 0, vm_cr_high = 0;
39 if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
40 PrintDebug("SVM Not Available\n");
44 Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
46 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
50 ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
53 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
54 PrintDebug("Nested Paging not supported\n");
57 if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
58 PrintDebug("SVM BIOS Disabled, not unlockable\n");
60 PrintDebug("SVM is locked with a key\n");
68 void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
73 // Enable SVM on the CPU
74 Get_MSR(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
75 msr.e_reg.low |= EFER_MSR_svm_enable;
76 Set_MSR(EFER_MSR, 0, msr.e_reg.low);
78 PrintDebug("SVM Enabled\n");
81 // Setup the host state save area
82 host_state = os_hooks->allocate_pages(4);
85 msr.e_reg.low = (uint_t)host_state;
88 PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
89 Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
93 // Setup the SVM specific vmm operations
94 vmm_ops->init_guest = &init_svm_guest;
95 vmm_ops->start_guest = &start_svm_guest;
102 int init_svm_guest(struct guest_info *info) {
104 PrintDebug("Allocating VMCB\n");
105 info->vmm_data = (void*)Allocate_VMCB();
108 PrintDebug("Generating Guest nested page tables\n");
109 // print_mem_list(&(info->mem_list));
110 //print_mem_layout(&(info->mem_layout));
111 info->page_tables = NULL;
112 //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
113 //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
114 //PrintDebugPageTables(info->page_tables);
118 PrintDebug("Initializing VMCB (addr=%x)\n", info->vmm_data);
119 Init_VMCB((vmcb_t*)(info->vmm_data), *info);
122 info->vm_regs.rbx = 0;
123 info->vm_regs.rcx = 0;
124 info->vm_regs.rdx = 0;
125 info->vm_regs.rsi = 0;
126 info->vm_regs.rdi = 0;
127 info->vm_regs.rbp = 0;
133 // can we start a kernel thread here...
134 int start_svm_guest(struct guest_info *info) {
138 PrintDebug("Launching SVM VM (vmcb=%x)\n", info->vmm_data);
139 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
143 safe_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
144 //launch_svm((vmcb_t*)(info->vmm_data));
145 PrintDebug("SVM Returned\n");
147 if (handle_svm_exit(info) != 0) {
156 vmcb_t * Allocate_VMCB() {
157 vmcb_t * vmcb_page = (vmcb_t*)os_hooks->allocate_pages(1);
160 memset(vmcb_page, 0, 4096);
166 void Init_VMCB_Real(vmcb_t * vmcb, guest_info_t vm_info) {
167 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
168 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
172 guest_state->rsp = vm_info.rsp;
173 guest_state->rip = vm_info.rip;
179 guest_state->efer |= EFER_MSR_svm_enable;
180 guest_state->rflags = 0x00000002; // The reserved bit is always 1
181 ctrl_area->svm_instrs.instrs.VMRUN = 1;
182 // guest_state->cr0 = 0x00000001; // PE
183 ctrl_area->guest_ASID = 1;
184 guest_state->cr0 = 0x60000010;
187 ctrl_area->exceptions.ex_names.de = 1;
188 ctrl_area->exceptions.ex_names.df = 1;
189 ctrl_area->exceptions.ex_names.pf = 1;
190 ctrl_area->exceptions.ex_names.ts = 1;
191 ctrl_area->exceptions.ex_names.ss = 1;
192 ctrl_area->exceptions.ex_names.ac = 1;
193 ctrl_area->exceptions.ex_names.mc = 1;
194 ctrl_area->exceptions.ex_names.gp = 1;
195 ctrl_area->exceptions.ex_names.ud = 1;
196 ctrl_area->exceptions.ex_names.np = 1;
197 ctrl_area->exceptions.ex_names.of = 1;
198 ctrl_area->exceptions.ex_names.nmi = 1;
200 guest_state->cs.selector = 0xf000;
201 guest_state->cs.limit=0xffff;
202 guest_state->cs.base = 0xffff0000;
203 guest_state->cs.attrib.raw = 0x9a;
206 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
207 for ( i = 0; segregs[i] != NULL; i++) {
208 struct vmcb_selector * seg = segregs[i];
210 seg->selector = 0x0000;
211 seg->base = 0xffff0000;
212 seg->attrib.raw = 0x9b;
219 EAX, EBX, ECX, ESI, EDI, EBP, ESP == 0x0
222 guest_state->gdtr.base = 0;
223 guest_state->gdtr.limit = 0xffff;
224 guest_state->gdtr.attrib.raw = 0x0;
226 guest_state->idtr.base = 0;
227 guest_state->idtr.limit = 0xffff;
228 guest_state->idtr.attrib.raw = 0x0;
230 guest_state->ldtr.base = 0;
231 guest_state->ldtr.limit = 0xffff;
232 guest_state->ldtr.attrib.raw = 0x82;
234 guest_state->tr.base = 0;
235 guest_state->tr.limit = 0xffff;
236 guest_state->tr.attrib.raw = 0x83;
241 if (vm_info.io_map.num_ports > 0) {
242 vmm_io_hook_t * iter;
243 addr_t io_port_bitmap;
245 io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
246 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
248 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
250 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
252 FOREACH_IO_HOOK(vm_info.io_map, iter) {
253 ushort_t port = iter->port;
254 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
256 bitmap += (port / 8);
257 PrintDebug("Setting Bit in block %x\n", bitmap);
258 *bitmap |= 1 << (port % 8);
261 memset((uchar_t*)io_port_bitmap, 0xff, PAGE_SIZE * 2);
262 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
264 ctrl_area->instrs.instrs.IOIO_PROT = 1;
267 ctrl_area->instrs.instrs.INTR = 1;
269 // also determine if CPU supports nested paging
270 if (vm_info.page_tables) {
272 // Flush the TLB on entries/exits
273 //ctrl_area->TLB_CONTROL = 1;
275 // Enable Nested Paging
276 //ctrl_area->NP_ENABLE = 1;
278 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
280 // Set the Nested Page Table pointer
281 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
282 ctrl_area->N_CR3 = 0;
283 guest_state->cr3 = (addr_t)(vm_info.page_tables);
285 // ctrl_area->N_CR3 = Get_CR3();
286 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
288 guest_state->g_pat = 0x7040600070406ULL;
290 //PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
291 guest_state->cr0 |= 0x80000000;
296 void Init_VMCB(vmcb_t * vmcb, guest_info_t vm_info) {
297 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
298 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
302 guest_state->rsp = vm_info.rsp;
303 guest_state->rip = vm_info.rip;
307 ctrl_area->cr_writes.crs.cr0 = 1;
309 guest_state->efer |= EFER_MSR_svm_enable;
310 guest_state->rflags = 0x00000002; // The reserved bit is always 1
311 ctrl_area->svm_instrs.instrs.VMRUN = 1;
312 // guest_state->cr0 = 0x00000001; // PE
313 ctrl_area->guest_ASID = 1;
316 ctrl_area->exceptions.ex_names.de = 1;
317 ctrl_area->exceptions.ex_names.df = 1;
318 ctrl_area->exceptions.ex_names.pf = 1;
319 ctrl_area->exceptions.ex_names.ts = 1;
320 ctrl_area->exceptions.ex_names.ss = 1;
321 ctrl_area->exceptions.ex_names.ac = 1;
322 ctrl_area->exceptions.ex_names.mc = 1;
323 ctrl_area->exceptions.ex_names.gp = 1;
324 ctrl_area->exceptions.ex_names.ud = 1;
325 ctrl_area->exceptions.ex_names.np = 1;
326 ctrl_area->exceptions.ex_names.of = 1;
327 ctrl_area->exceptions.ex_names.nmi = 1;
329 guest_state->cs.selector = 0x0000;
330 guest_state->cs.limit=~0u;
331 guest_state->cs.base = guest_state->cs.selector<<4;
332 guest_state->cs.attrib.raw = 0xf3;
335 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
336 for ( i = 0; segregs[i] != NULL; i++) {
337 struct vmcb_selector * seg = segregs[i];
339 seg->selector = 0x0000;
340 seg->base = seg->selector << 4;
341 seg->attrib.raw = 0xf3;
345 if (vm_info.io_map.num_ports > 0) {
346 vmm_io_hook_t * iter;
347 addr_t io_port_bitmap;
349 io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
350 memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
352 ctrl_area->IOPM_BASE_PA = io_port_bitmap;
354 //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
356 FOREACH_IO_HOOK(vm_info.io_map, iter) {
357 ushort_t port = iter->port;
358 uchar_t * bitmap = (uchar_t *)io_port_bitmap;
360 bitmap += (port / 8);
361 PrintDebug("Setting Bit in block %x\n", bitmap);
362 *bitmap |= 1 << (port % 8);
366 //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
368 ctrl_area->instrs.instrs.IOIO_PROT = 1;
371 ctrl_area->instrs.instrs.INTR = 1;
373 // also determine if CPU supports nested paging
374 if (vm_info.page_tables) {
376 // Flush the TLB on entries/exits
377 //ctrl_area->TLB_CONTROL = 1;
379 // Enable Nested Paging
380 //ctrl_area->NP_ENABLE = 1;
382 //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
384 // Set the Nested Page Table pointer
385 // ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
386 ctrl_area->N_CR3 = 0;
387 guest_state->cr3 = (addr_t)(vm_info.page_tables);
389 // ctrl_area->N_CR3 = Get_CR3();
390 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
392 guest_state->g_pat = 0x7040600070406ULL;
394 //PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
395 guest_state->cr0 |= 0x80000000;
402 void Init_VMCB_pe(vmcb_t *vmcb, guest_info_t vm_info) {
403 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
404 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
408 guest_state->rsp = vm_info.rsp;
409 guest_state->rip = vm_info.rip;
412 /* I pretty much just gutted this from TVMM */
413 /* Note: That means its probably wrong */
415 // set the segment registers to mirror ours
416 guest_state->cs.selector = 1<<3;
417 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
418 guest_state->cs.attrib.fields.S = 1;
419 guest_state->cs.attrib.fields.P = 1;
420 guest_state->cs.attrib.fields.db = 1;
421 guest_state->cs.attrib.fields.G = 1;
422 guest_state->cs.limit = 0xfffff;
423 guest_state->cs.base = 0;
425 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
426 for ( i = 0; segregs[i] != NULL; i++) {
427 struct vmcb_selector * seg = segregs[i];
429 seg->selector = 2<<3;
430 seg->attrib.fields.type = 0x2; // Data Segment+read/write
431 seg->attrib.fields.S = 1;
432 seg->attrib.fields.P = 1;
433 seg->attrib.fields.db = 1;
434 seg->attrib.fields.G = 1;
435 seg->limit = 0xfffff;
441 /* JRL THIS HAS TO GO */
443 guest_state->tr.selector = GetTR_Selector();
444 guest_state->tr.attrib.fields.type = 0x9;
445 guest_state->tr.attrib.fields.P = 1;
446 guest_state->tr.limit = GetTR_Limit();
447 guest_state->tr.base = GetTR_Base();// - 0x2000;
455 guest_state->efer |= EFER_MSR_svm_enable;
456 guest_state->rflags = 0x00000002; // The reserved bit is always 1
457 ctrl_area->svm_instrs.instrs.VMRUN = 1;
458 guest_state->cr0 = 0x00000001; // PE
459 ctrl_area->guest_ASID = 1;
462 // guest_state->cpl = 0;
468 ctrl_area->cr_writes.crs.cr4 = 1;
470 ctrl_area->exceptions.ex_names.de = 1;
471 ctrl_area->exceptions.ex_names.df = 1;
472 ctrl_area->exceptions.ex_names.pf = 1;
473 ctrl_area->exceptions.ex_names.ts = 1;
474 ctrl_area->exceptions.ex_names.ss = 1;
475 ctrl_area->exceptions.ex_names.ac = 1;
476 ctrl_area->exceptions.ex_names.mc = 1;
477 ctrl_area->exceptions.ex_names.gp = 1;
478 ctrl_area->exceptions.ex_names.ud = 1;
479 ctrl_area->exceptions.ex_names.np = 1;
480 ctrl_area->exceptions.ex_names.of = 1;
481 ctrl_area->exceptions.ex_names.nmi = 1;
485 ctrl_area->instrs.instrs.IOIO_PROT = 1;
486 ctrl_area->IOPM_BASE_PA = (uint_t)os_hooks->allocate_pages(3);
490 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
491 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
494 ctrl_area->instrs.instrs.INTR = 1;
501 memset(gdt_buf, 0, 6);
502 memset(idt_buf, 0, 6);
505 uint_t gdt_base, idt_base;
506 ushort_t gdt_limit, idt_limit;
509 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
510 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
511 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
514 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
515 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
516 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
519 // gdt_base -= 0x2000;
520 //idt_base -= 0x2000;
522 guest_state->gdtr.base = gdt_base;
523 guest_state->gdtr.limit = gdt_limit;
524 guest_state->idtr.base = idt_base;
525 guest_state->idtr.limit = idt_limit;
531 // also determine if CPU supports nested paging
532 if (vm_info.page_tables) {
534 // Flush the TLB on entries/exits
535 ctrl_area->TLB_CONTROL = 1;
537 // Enable Nested Paging
538 ctrl_area->NP_ENABLE = 1;
540 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
542 // Set the Nested Page Table pointer
543 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
546 // ctrl_area->N_CR3 = Get_CR3();
547 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
549 guest_state->g_pat = 0x7040600070406ULL;
551 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
552 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
554 // guest_state->cr0 |= 0x80000000;