2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
11 * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
12 * Copyright (c) 2009, Jack Lange <jarusl@cs.northwestern.edu>
13 * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
14 * All rights reserved.
16 * Author: Lei Xia <lxia@northwestern.edu>
17 * Chang Seok Bae <jhuell@gmail.com>
18 * Jack Lange <jarusl@cs.northwestern.edu>
20 * This is free software. You are permitted to use,
21 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
26 #include <palacios/vmm.h>
27 #include <palacios/vmm_types.h>
28 #include <palacios/vmm_io.h>
29 #include <palacios/vmm_intr.h>
30 #include <palacios/vmm_rbtree.h>
32 #include <devices/pci.h>
33 #include <devices/pci_types.h>
37 #define PrintDebug(fmt, args...)
41 #define CONFIG_ADDR_PORT 0x0cf8
42 #define CONFIG_DATA_PORT 0x0cfc
45 #define PCI_BUS_COUNT 1
47 // This must always be a multiple of 8
48 #define MAX_BUS_DEVICES 32
61 } __attribute__((packed));
62 } __attribute__((packed));
63 } __attribute__((packed));
72 // Red Black tree containing all attached devices
73 struct rb_root devices;
75 // Bitmap of the allocated device numbers
76 uint8_t dev_map[MAX_BUS_DEVICES / 8];
82 // Configuration address register
83 struct pci_addr_reg addr_reg;
86 struct pci_bus bus_list[PCI_BUS_COUNT];
92 static void pci_dump_state(struct pci_internal * pci_state);
95 // Scan the dev_map bitmap for the first '0' bit
96 static int get_free_dev_num(struct pci_bus * bus) {
99 for (i = 0; i < sizeof(bus->dev_map); i++) {
100 if (bus->dev_map[i] != 0xff) {
102 for (j = 0; j < 8; j++) {
103 if (!(bus->dev_map[i] & (0x1 << j))) {
113 static void allocate_dev_num(struct pci_bus * bus, int dev_num) {
114 int major = dev_num / 8;
115 int minor = dev_num % 8;
117 bus->dev_map[major] |= (0x1 << minor);
123 struct pci_device * __add_device_to_bus(struct pci_bus * bus, struct pci_device * dev) {
125 struct rb_node ** p = &(bus->devices.rb_node);
126 struct rb_node * parent = NULL;
127 struct pci_device * tmp_dev = NULL;
131 tmp_dev = rb_entry(parent, struct pci_device, dev_tree_node);
133 if (dev->dev_num < tmp_dev->dev_num) {
135 } else if (dev->dev_num > tmp_dev->dev_num) {
142 rb_link_node(&(dev->dev_tree_node), parent, p);
149 struct pci_device * add_device_to_bus(struct pci_bus * bus, struct pci_device * dev) {
151 struct pci_device * ret = NULL;
153 if ((ret = __add_device_to_bus(bus, dev))) {
157 v3_rb_insert_color(&(dev->dev_tree_node), &(bus->devices));
159 allocate_dev_num(bus, dev->dev_num);
165 static struct pci_device * get_device(struct pci_bus * bus, int dev_num) {
166 struct rb_node * n = bus->devices.rb_node;
167 struct pci_device * dev = NULL;
170 dev = rb_entry(n, struct pci_device, dev_tree_node);
172 if (dev_num < dev->dev_num) {
174 } else if (dev_num > dev->dev_num) {
186 static int read_pci_header(struct pci_device * pci_dev, int reg_num, void * dst, int length) {
189 *(uint32_t *)dst = *(uint32_t *)(pci_dev->header_space + reg_num);
190 } else if (length == 2) {
191 *(uint16_t *)dst = *(uint16_t *)(pci_dev->header_space + reg_num);
192 } else if (length == 1) {
193 *(uint8_t *)dst = pci_dev->header_space[reg_num];
195 PrintError("Invalid Read length (%d) for PCI configration header\n", length);
203 static int write_pci_header(struct pci_device * pci_dev, int reg_num, void * src, int length) {
206 *(uint32_t *)(pci_dev->header_space + reg_num) = *(uint32_t *)src;
207 } else if (length == 2) {
208 *(uint16_t *)(pci_dev->header_space + reg_num) = *(uint16_t *)src;
209 } else if (length == 1) {
210 pci_dev->header_space[reg_num] = *(uint8_t *)src;
212 PrintError("Invalid Read length (%d) for PCI configration header\n", length);
216 // This is kind of ugly...
217 if ((reg_num >= 0x10) && (reg_num < 0x27)) {
218 int bar_num = (reg_num & ~0x3) - 0x10;
219 uint32_t val = *(uint32_t *)(pci_dev->header_space + (reg_num & ~0x3));
221 pci_dev->bar_update(pci_dev, bar_num, val);
228 static int addr_port_read(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
229 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;
232 PrintError("Invalid read length (%d) for PCI address register\n", length);
236 PrintDebug("Reading PCI Address Port: %x\n", pci_state->addr_reg.val);
237 *(uint32_t *)dst = pci_state->addr_reg.val;
243 static int addr_port_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
244 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;
247 PrintError("Invalid write length (%d) for PCI address register\n", length);
251 pci_state->addr_reg.val = *(uint32_t *)src;
252 PrintDebug("Writing PCI Address Port: %x\n", pci_state->addr_reg.val);
258 static int data_port_read(ushort_t port, void * dst, uint_t length, struct vm_device * vmdev) {
259 struct pci_internal * pci_state = (struct pci_internal *)vmdev->private_data;;
260 struct pci_device * pci_dev = NULL;
261 uint_t reg_num = pci_state->addr_reg.reg_num;
264 PrintDebug("Reading PCI Data register. bus = %d, dev = %d, reg = %d (%x)\n",
265 pci_state->addr_reg.bus_num,
266 pci_state->addr_reg.dev_num,
270 pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num);
272 if (pci_dev == NULL) {
273 //*(uint32_t *)dst = 0xffffffff;
275 PrintError("Reading configuration space for non-present device (dev_num=%d)\n",
276 pci_state->addr_reg.dev_num);
282 if (reg_num < 0x40) {
283 return read_pci_header(pci_dev, reg_num, dst, length);
286 if (pci_dev->config_read) {
287 return pci_dev->config_read(pci_dev, reg_num, dst, length);
292 *(uint32_t *)dst = *(uint32_t *)(pci_dev->config_space + reg_num - 0x40);
293 } else if (length == 2) {
294 *(uint16_t *)dst = *(uint16_t *)(pci_dev->config_space + reg_num - 0x40);
295 } else if (length == 1) {
296 *(uint8_t *)dst = pci_dev->config_space[reg_num - 0x40];
298 PrintError("Invalid Read length (%d) for PCI data register", length);
306 static int data_port_write(ushort_t port, void * src, uint_t length, struct vm_device * vmdev) {
307 struct pci_internal * pci_state = (struct pci_internal *)vmdev->private_data;;
308 struct pci_device * pci_dev = NULL;
309 uint_t reg_num = pci_state->addr_reg.reg_num;
312 PrintDebug("Writing PCI Data register. bus = %d, dev = %d, reg = %d (%x)\n",
313 pci_state->addr_reg.bus_num,
314 pci_state->addr_reg.dev_num,
317 pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num);
319 if (pci_dev == NULL) {
320 PrintError("Writing configuration space for non-present device (dev_num=%d)\n",
321 pci_state->addr_reg.dev_num);
326 if (reg_num < 0x40) {
327 return write_pci_header(pci_dev, reg_num, src, length);
331 if (pci_dev->config_write) {
332 return pci_dev->config_write(pci_dev, reg_num, src, length);
337 *(uint32_t *)(pci_dev->config_space + reg_num - 0x40) = *(uint32_t *)src;
338 } else if (length == 2) {
339 *(uint16_t *)(pci_dev->config_space + reg_num - 0x40) = *(uint16_t *)src;
340 } else if (length == 1) {
341 pci_dev->config_space[reg_num - 0x40] = *(uint8_t *)src;
343 PrintError("Invalid Write length (%d) for PCI data register", length);
352 static int pci_reset_device(struct vm_device * dev) {
353 PrintDebug("pci: reset device\n");
358 static int pci_start_device(struct vm_device * dev) {
359 PrintDebug("pci: start device\n");
364 static int pci_stop_device(struct vm_device * dev) {
365 PrintDebug("pci: stop device\n");
371 static int pci_deinit_device(struct vm_device * dev) {
374 for (i = 0; i < 4; i++){
375 v3_dev_unhook_io(dev, CONFIG_ADDR_PORT + i);
376 v3_dev_unhook_io(dev, CONFIG_DATA_PORT + i);
385 static int init_i440fx(struct pci_internal * pci_state) {
387 struct pci_device * dev = v3_pci_register_device(NULL, 0, "i440FX", 0,
388 NULL, NULL, NULL, NULL);
394 dev->header.vendor_id = 0x8086;
395 dev->header.device_id = 0x1237;
396 dev->header.revision = 0x0002;
397 dev->header.subclass = 0x00; // SubClass: host2pci
398 dev->header.class = 0x06; // Class: PCI bridge
399 dev->header.header_type = 0x00;
408 static void init_pci_busses(struct pci_internal * pci_state) {
411 for (i = 0; i < PCI_BUS_COUNT; i++) {
412 pci_state->bus_list[i].bus_num = i;
413 pci_state->bus_list[i].devices.rb_node = NULL;
414 memset(pci_state->bus_list[i].dev_map, 0, sizeof(pci_state->bus_list[i].dev_map));
420 static int pci_init_device(struct vm_device * dev) {
421 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;;
424 PrintDebug("pci: init_device\n");
427 // dev->vm->pci = dev; //should be in vmm_config.c
429 pci_state->addr_reg.val = 0;
431 init_pci_busses(pci_state);
433 if (init_i440fx(pci_state) == -1) {
434 PrintError("Could not intialize i440fx\n");
438 for (i = 0; i < 4; i++) {
439 v3_dev_hook_io(dev, CONFIG_ADDR_PORT + i, &addr_port_read, &addr_port_write);
440 v3_dev_hook_io(dev, CONFIG_DATA_PORT + i, &data_port_read, &data_port_write);
447 static struct vm_device_ops dev_ops = {
448 .init = pci_init_device,
449 .deinit = pci_deinit_device,
450 .reset = pci_reset_device,
451 .start = pci_start_device,
452 .stop = pci_stop_device,
456 struct vm_device * v3_create_pci() {
457 struct pci_internal * pci_state = V3_Malloc(sizeof(struct pci_internal));
459 PrintDebug("PCI internal at %p\n",(void *)pci_state);
461 struct vm_device * device = v3_create_device("PCI", &dev_ops, pci_state);
470 /* JRL: TODO This needs to be completely rethought... */
471 struct pci_bus * v3_get_pcibus(struct guest_info * vm, int bus_no) {
472 // struct pci_internal * pci_state = NULL;
475 if (vm->pci == NULL) {
476 PrintError("There is no PCI bus in guest %p\n", vm);
480 pci_state = (struct pci_internal *)vm->pci->private_data;
482 if ((bus_no >= 0) && (bus_no < PCI_BUS_COUNT)) {
483 return &(pci_state->bus_list[bus_no]);
492 // if dev_num == -1, auto assign
493 struct pci_device * v3_pci_register_device(struct vm_device * dev,
497 int (*config_read)(struct pci_device * pci_dev, uint_t reg_num, void * dst, int len),
498 int (*config_write)(struct pci_device * pci_dev, uint_t reg_num, void * src, int len),
499 int (*bar_update)(struct pci_device * pci_dev, uint_t bar_reg, uint32_t val),
500 void * private_data) {
502 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;
503 struct pci_bus * bus = &(pci_state->bus_list[bus_num]);
504 struct pci_device * pci_dev = NULL;
506 if (dev_num > MAX_BUS_DEVICES) {
507 PrintError("Requested Invalid device number (%d)\n", dev_num);
512 if ((dev_num = get_free_dev_num(bus)) == -1) {
513 PrintError("No more available PCI slots on bus %d\n", bus->bus_num);
518 if (get_device(bus, dev_num) != NULL) {
519 PrintError("PCI Device already registered at slot %d on bus %d\n",
520 dev_num, bus->bus_num);
525 pci_dev = (struct pci_device *)V3_Malloc(sizeof(struct pci_device));
527 if (pci_dev == NULL) {
531 memset(pci_dev, 0, sizeof(struct pci_device));
534 pci_dev->bus_num = bus_num;
535 pci_dev->dev_num = dev_num;
537 strncpy(pci_dev->name, name, sizeof(pci_dev->name));
538 pci_dev->vm_dev = dev;
540 pci_dev->config_read = config_read;
541 pci_dev->config_write = config_write;
542 pci_dev->bar_update = bar_update;
544 pci_dev->priv_data = private_data;
547 add_device_to_bus(bus, pci_dev);
550 pci_dump_state(pci_state);
560 static void pci_dump_state(struct pci_internal * pci_state) {
561 struct rb_node * node = v3_rb_first(&(pci_state->bus_list[0].devices));
562 struct pci_device * tmp_dev = NULL;
564 PrintDebug("===PCI: Dumping state Begin ==========\n");
567 tmp_dev = rb_entry(node, struct pci_device, dev_tree_node);
569 PrintDebug("PCI Device Number: %d (%s):\n", tmp_dev->dev_num, tmp_dev->name);
570 PrintDebug("irq = %d\n", tmp_dev->header.irq_line);
571 PrintDebug("Vend ID: 0x%x\n", tmp_dev->header.vendor_id);
572 PrintDebug("Device ID: 0x%x\n", tnp_dev->header.device_id);
574 } while ((node = v3_rb_next(node)));
576 PrintDebug("====PCI: Dumping state End==========\n");