2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Peter Dinda <pdinda@northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Peter Dinda <pdinda@northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #include <palacios/vmm_dev_mgr.h>
22 #include <palacios/vmm.h>
23 #include <palacios/vmm_types.h>
25 #include <palacios/vmm_lock.h>
27 #include <devices/ide.h>
28 #include <palacios/vmm_intr.h>
29 #include <palacios/vmm_host_events.h>
30 #include <palacios/vm_guest.h>
33 #ifndef V3_CONFIG_DEBUG_NVRAM
35 #define PrintDebug(fmt, args...)
39 #define NVRAM_REG_PORT 0x70
40 #define NVRAM_DATA_PORT 0x71
42 #define NVRAM_RTC_IRQ 0x8
45 typedef enum {NVRAM_READY, NVRAM_REG_POSTED} nvram_state_t;
48 #define NVRAM_REG_MAX 256
51 // These are borrowed from Bochs, which borrowed from
52 // Ralf Brown's interupt list, and extended
53 #define NVRAM_REG_SEC 0x00
54 #define NVRAM_REG_SEC_ALARM 0x01
55 #define NVRAM_REG_MIN 0x02
56 #define NVRAM_REG_MIN_ALARM 0x03
57 #define NVRAM_REG_HOUR 0x04
58 #define NVRAM_REG_HOUR_ALARM 0x05
59 #define NVRAM_REG_WEEK_DAY 0x06
60 #define NVRAM_REG_MONTH_DAY 0x07
61 #define NVRAM_REG_MONTH 0x08
62 #define NVRAM_REG_YEAR 0x09
63 #define NVRAM_REG_STAT_A 0x0a
64 #define NVRAM_REG_STAT_B 0x0b
65 #define NVRAM_REG_STAT_C 0x0c
66 #define NVRAM_REG_STAT_D 0x0d
67 #define NVRAM_REG_DIAGNOSTIC_STATUS 0x0e
68 #define NVRAM_REG_SHUTDOWN_STATUS 0x0f
70 #define NVRAM_IBM_HD_DATA 0x12
71 #define NVRAM_IDE_TRANSLATION 0x39
73 #define NVRAM_REG_FLOPPY_TYPE 0x10
74 #define NVRAM_REG_EQUIPMENT_BYTE 0x14
76 #define NVRAM_REG_BASE_MEMORY_HIGH 0x16
77 #define NVRAM_REG_BASE_MEMORY_LOW 0x15
79 #define NVRAM_REG_EXT_MEMORY_HIGH 0x18
80 #define NVRAM_REG_EXT_MEMORY_LOW 0x17
82 #define NVRAM_REG_EXT_MEMORY_2ND_HIGH 0x31
83 #define NVRAM_REG_EXT_MEMORY_2ND_LOW 0x30
85 #define NVRAM_REG_BOOTSEQ_OLD 0x2d
87 #define NVRAM_REG_AMI_BIG_MEMORY_HIGH 0x35
88 #define NVRAM_REG_AMI_BIG_MEMORY_LOW 0x34
90 #define NVRAM_REG_CSUM_HIGH 0x2e
91 #define NVRAM_REG_CSUM_LOW 0x2f
92 #define NVRAM_REG_IBM_CENTURY_BYTE 0x32
93 #define NVRAM_REG_IBM_PS2_CENTURY_BYTE 0x37
95 #define NVRAM_REG_BOOTSEQ_NEW_FIRST 0x3D
96 #define NVRAM_REG_BOOTSEQ_NEW_SECOND 0x38
98 #define CHECKSUM_REGION_FIRST_BYTE 0x10
99 #define CHECKSUM_REGION_LAST_BYTE 0x2d
101 // Following fields are used by SEABIOS
102 #define NVRAM_REG_HIGHMEM_LOW 0x5b
103 #define NVRAM_REG_HIGHMEM_MID 0x5c
104 #define NVRAM_REG_HIGHMEM_HIGH 0x5d
105 #define NVRAM_REG_SMPCPUS 0x5f
107 #define DEFAULT_BOOTSEQ "cd,hd"
109 struct nvram_internal {
110 nvram_state_t dev_state;
112 uint8_t mem_state[NVRAM_REG_MAX];
113 uint8_t reg_map[NVRAM_REG_MAX / 8];
115 struct vm_device * ide;
117 struct v3_vm_info * vm;
119 struct v3_timer *timer;
121 v3_lock_t nvram_lock;
123 uint64_t us; //microseconds - for clock update - zeroed every second
124 uint64_t pus; //microseconds - for periodic interrupt - cleared every period
129 uint8_t rate : 4; // clock rate = 65536Hz / 2 rate (0110=1024 Hz)
130 uint8_t basis : 3; // time base, 010 = 32,768 Hz
131 uint8_t uip : 1; // 1=update in progress
132 } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
135 uint8_t sum : 1; // 1=summer (daylight savings)
136 uint8_t h24 : 1; // 1=24h clock
137 uint8_t dm : 1; // 0=date/time is in bcd, 1=binary
138 uint8_t rec : 1; // 1=rectangular signal
139 uint8_t ui : 1; // 1=update interrupt
140 uint8_t ai : 1; // 1=alarm interrupt
141 uint8_t pi : 1; // 1=periodic interrupt
142 uint8_t set : 1; // 1=blocked update
143 } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
146 uint8_t res : 4; // reserved
147 uint8_t uf : 1; // 1=source of interrupt is update
148 uint8_t af : 1; // 1=source of interrupt is alarm interrupt
149 uint8_t pf : 1; // 1=source of interrupt is periodic interrupt
150 uint8_t irq : 1; // 1=interrupt requested
151 } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
154 uint8_t res : 7; // reserved
155 uint8_t val : 1; // 1=cmos ram data is OK
156 } __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
164 } __attribute__((packed));;
168 static void set_reg_num(struct nvram_internal * nvram, uint8_t reg_num) {
169 int major = (reg_num / 8);
170 int minor = reg_num % 8;
172 nvram->reg_map[major] |= (0x1 << minor);
175 static int is_reg_set(struct nvram_internal * nvram, uint8_t reg_num) {
176 int major = (reg_num / 8);
177 int minor = reg_num % 8;
179 return (nvram->reg_map[major] & (0x1 << minor)) ? 1 : 0;
183 static void set_memory(struct nvram_internal * nvram, uint8_t reg, uint8_t val) {
184 set_reg_num(nvram, reg);
185 nvram->mem_state[reg] = val;
188 static int get_memory(struct nvram_internal * nvram, uint8_t reg, uint8_t * val) {
190 if (!is_reg_set(nvram, reg)) {
195 *val = nvram->mem_state[reg];
200 static uint8_t add_to(uint8_t * left, uint8_t * right, uint8_t bcd) {
204 struct bcd_num * bl = (struct bcd_num *)left;
205 struct bcd_num * br = (struct bcd_num *)right;
209 carry = bl->bot / 0xa;
212 bl->top += carry + br->top;
213 carry = bl->top / 0xa;
230 static uint8_t days_in_month(uint8_t month, uint8_t bcd) {
231 // This completely ignores Julian / Gregorian stuff right now
288 static void update_time(struct nvram_internal * data, uint64_t period_us) {
289 struct rtc_stata * stata = (struct rtc_stata *)&((data->mem_state[NVRAM_REG_STAT_A]));
290 struct rtc_statb * statb = (struct rtc_statb *)&((data->mem_state[NVRAM_REG_STAT_B]));
291 struct rtc_statc * statc = (struct rtc_statc *)&((data->mem_state[NVRAM_REG_STAT_C]));
292 //struct rtc_statd *statd = (struct rtc_statd *) &((data->mem_state[NVRAM_REG_STAT_D]));
293 uint8_t * sec = (uint8_t *)&(data->mem_state[NVRAM_REG_SEC]);
294 uint8_t * min = (uint8_t *)&(data->mem_state[NVRAM_REG_MIN]);
295 uint8_t * hour = (uint8_t *)&(data->mem_state[NVRAM_REG_HOUR]);
296 uint8_t * weekday = (uint8_t *)&(data->mem_state[NVRAM_REG_WEEK_DAY]);
297 uint8_t * monthday = (uint8_t *)&(data->mem_state[NVRAM_REG_MONTH_DAY]);
298 uint8_t * month = (uint8_t *)&(data->mem_state[NVRAM_REG_MONTH]);
299 uint8_t * year = (uint8_t *)&(data->mem_state[NVRAM_REG_YEAR]);
300 uint8_t * cent = (uint8_t *)&(data->mem_state[NVRAM_REG_IBM_CENTURY_BYTE]);
301 uint8_t * cent_ps2 = (uint8_t *)&(data->mem_state[NVRAM_REG_IBM_PS2_CENTURY_BYTE]);
302 uint8_t * seca = (uint8_t *)&(data->mem_state[NVRAM_REG_SEC_ALARM]);
303 uint8_t * mina = (uint8_t *)&(data->mem_state[NVRAM_REG_MIN_ALARM]);
304 uint8_t * houra = (uint8_t *)&(data->mem_state[NVRAM_REG_HOUR_ALARM]);
307 uint8_t bcd = (statb->dm == 0);
310 uint32_t periodic_period;
312 PrintDebug(VM_NONE, VCORE_NONE, "nvram: update_time by %llu microseocnds\n",period_us);
314 // We will set these flags on exit
320 // We will reset us after one second
321 data->us += period_us;
322 // We will reset pus after one periodic_period
323 data->pus += period_us;
325 if (data->us > 1000000) {
327 carry = add_to(sec, &carry, bcd);
330 PrintError(VM_NONE, VCORE_NONE, "nvram: somehow managed to get a carry in second update\n");
333 if ( (bcd && (*sec == 0x60)) ||
334 ((!bcd) && (*sec == 60))) {
339 carry = add_to(min, &carry, bcd);
341 PrintError(VM_NONE, VCORE_NONE, "nvram: somehow managed to get a carry in minute update\n");
344 if ( (bcd && (*min == 0x60)) ||
345 ((!bcd) && (*min == 60))) {
354 uint8_t temp = ((bcd) ? 0x12 : 12);
355 add_to(&hour24, &temp, bcd);
360 carry = add_to(&hour24, &carry, bcd);
362 PrintError(VM_NONE, VCORE_NONE, "nvram: somehow managed to get a carry in hour update\n");
365 if ( (bcd && (hour24 == 0x24)) ||
366 ((!bcd) && (hour24 == 24))) {
378 if ( (bcd && (hour24 < 0x12)) ||
379 ((!bcd) && (hour24 < 12))) {
385 *hour = (hour24 - 12) | 0x80;
388 struct bcd_num * n = (struct bcd_num *)hour;
401 // now see if we need to carry into the days and further
404 add_to(weekday, &carry, bcd);
406 *weekday %= 0x7; // same regardless of bcd
408 if ((*monthday) != days_in_month(*month, bcd)) {
409 add_to(monthday, &carry, bcd);
414 add_to(month, &carry, bcd);
416 if ( (bcd && (*month == 0x13)) ||
417 ((!bcd) && (*month == 13))) {
418 *month = 1; // same for both
421 carry = add_to(year, &carry, bcd);
423 if ( (bcd && carry) ||
424 ((!bcd) && (*year == 100))) {
427 add_to(cent, &carry, bcd);
438 // OK, now check for the alarm, if it is set to interrupt
440 if ((*sec == *seca) && (*min == *mina) && (*hour == *houra)) {
442 PrintDebug(VM_NONE, VCORE_NONE, "nvram: interrupt on alarm\n");
448 periodic_period = 1000000 / (65536 / (0x1 << stata->rate));
449 if (data->pus >= periodic_period) {
451 data->pus -= periodic_period;
452 PrintDebug(VM_NONE, VCORE_NONE, "nvram: interrupt on periodic\n");
458 PrintDebug(VM_NONE, VCORE_NONE, "nvram: interrupt on update\n");
461 statc->irq = (statc->pf || statc->af || statc->uf);
463 PrintDebug(VM_NONE, VCORE_NONE, "nvram: time is now: YMDHMS: 0x%x:0x%x:0x%x:0x%x:0x%x,0x%x bcd=%d\n", *year, *month, *monthday, *hour, *min, *sec,bcd);
465 // Interrupt associated VM, if needed
467 PrintDebug(VM_NONE, VCORE_NONE, "nvram: injecting interrupt\n");
468 v3_raise_irq(data->vm, NVRAM_RTC_IRQ);
473 static void nvram_update_timer(struct guest_info *vm,
478 struct nvram_internal *nvram_state = (struct nvram_internal *)priv_data;
483 period_us = (1000*cpu_cycles/cpu_freq);
485 update_time(nvram_state,period_us);
490 static void set_memory_size(struct nvram_internal * nvram, addr_t bytes) {
491 // 1. Conventional Mem: 0-640k in K
492 // 2. Extended Mem: 0-16MB in K
493 // 3. Big Mem: 0-4G in 64K
494 // 4. High Mem: 4G-... in 64K
496 // at most 640K of conventional memory
500 if (bytes > (640 * 1024)) {
506 set_memory(nvram, NVRAM_REG_BASE_MEMORY_HIGH, (memk >> 8) & 0x00ff);
507 set_memory(nvram, NVRAM_REG_BASE_MEMORY_LOW, memk & 0x00ff);
510 // set extended memory - first 1 MB is lost to 640K chunk
511 // extended memory is min(0MB, bytes - 1MB)
515 if (bytes >= (1024 * 1024)) {
516 memk = (bytes - (1024 * 1024)) / 1024;
519 set_memory(nvram, NVRAM_REG_EXT_MEMORY_HIGH, (memk >> 8) & 0x00ff);
520 set_memory(nvram, NVRAM_REG_EXT_MEMORY_LOW, memk & 0x00ff);
521 set_memory(nvram, NVRAM_REG_EXT_MEMORY_2ND_HIGH, (memk >> 8) & 0x00ff);
522 set_memory(nvram, NVRAM_REG_EXT_MEMORY_2ND_LOW, memk & 0x00ff);
525 // Set the extended memory beyond 16 MB in 64k chunks
526 // this is min(0, bytes - 16MB)
528 uint16_t mem_chunks = 0;
530 if (bytes >= (1024 * 1024 * 16)) {
531 mem_chunks = (bytes - (1024 * 1024 * 16)) / (1024 * 64);
534 set_memory(nvram, NVRAM_REG_AMI_BIG_MEMORY_HIGH, (mem_chunks >> 8) & 0x00ff);
535 set_memory(nvram, NVRAM_REG_AMI_BIG_MEMORY_LOW, mem_chunks & 0x00ff);
538 // Set high (>4GB) memory size
541 uint32_t high_mem_chunks = 0;
543 if (bytes >= (1024LL * 1024LL * 1024LL * 4LL)) {
544 high_mem_chunks = (bytes - (1024LL * 1024LL * 1024LL * 4LL)) / (1024 * 64);
547 set_memory(nvram, NVRAM_REG_HIGHMEM_LOW, high_mem_chunks & 0xff);
548 set_memory(nvram, NVRAM_REG_HIGHMEM_MID, (high_mem_chunks >> 8) & 0xff);
549 set_memory(nvram, NVRAM_REG_HIGHMEM_HIGH, (high_mem_chunks >> 16) & 0xff);
557 static void init_harddrives(struct nvram_internal * nvram) {
563 int info_base_reg = 0x1b;
566 // 0x19 == first drive type
567 // 0x1a == second drive type
569 // 0x1b == first drive geometry base
570 // 0x24 == second drive geometry base
572 // It looks like the BIOS only tracks the disks on the first channel at 0x12?
573 for (i = 0; i < 2; i++) {
574 if (v3_ide_get_geometry(nvram->ide->private_data, 0, i, &cyls, &heads, §s) == 0) {
576 int info_reg = info_base_reg + (i * 9);
578 set_memory(nvram, type_reg + i, 0x2f);
580 set_memory(nvram, info_reg, cyls & 0xff);
581 set_memory(nvram, info_reg + 1, (cyls >> 8) & 0xff);
582 set_memory(nvram, info_reg + 2, heads & 0xff);
584 // Write precomp cylinder (1 and 2)
585 set_memory(nvram, info_reg + 3, 0xff);
586 set_memory(nvram, info_reg + 4, 0xff);
588 // harddrive control byte
589 set_memory(nvram, info_reg + 5, 0xc0 | ((heads > 8) << 3));
591 set_memory(nvram, info_reg + 6, cyls & 0xff);
592 set_memory(nvram, info_reg + 7, (cyls >> 8) & 0xff);
594 set_memory(nvram, info_reg + 8, sects & 0xff);
596 hd_data |= (0xf0 >> (i * 4));
600 set_memory(nvram, NVRAM_IBM_HD_DATA, hd_data);
603 #define TRANSLATE_NONE 0x0
604 #define TRANSLATE_LBA 0x1
605 #define TRANSLATE_LARGE 0x2
606 #define TRANSLATE_RECHS 0x3
607 // We're going to do LBA translation for everything...
610 for (i = 0; i < 4; i++) {
611 int chan_num = i / 2;
612 int drive_num = i % 2;
615 if (v3_ide_get_geometry(nvram->ide->private_data, chan_num, drive_num, &tmp[0], &tmp[1], &tmp[2]) == 0) {
616 trans |= TRANSLATE_LBA << (i * 2);
620 set_memory(nvram, NVRAM_IDE_TRANSLATION, trans);
624 static uint16_t compute_checksum(struct nvram_internal * nvram) {
625 uint16_t checksum = 0;
629 /* add all fields between the RTC and the checksum fields */
630 for (reg = CHECKSUM_REGION_FIRST_BYTE; reg < CHECKSUM_REGION_LAST_BYTE; reg++) {
631 /* unset fields are considered zero so get_memory can be ignored */
632 get_memory(nvram, reg, &val);
639 static int init_nvram_state(struct v3_vm_info * vm, struct nvram_internal * nvram, char *bootseq) {
640 uint16_t checksum = 0;
642 memset(nvram->mem_state, 0, NVRAM_REG_MAX);
643 memset(nvram->reg_map, 0, NVRAM_REG_MAX / 8);
645 v3_lock_init(&(nvram->nvram_lock));
648 // There are no floppy drives
650 set_memory(nvram, NVRAM_REG_FLOPPY_TYPE, 0x00);
653 // For old boot sequence style, do non-floppy devices first
655 set_memory(nvram, NVRAM_REG_BOOTSEQ_OLD, 0x00);
657 if (!strcasecmp(bootseq,"cd")) {
659 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x03);
660 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00);
661 } else if (!strcasecmp(bootseq,"cd,hd")) {
663 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x23);
664 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00);
665 } else if (!strcasecmp(bootseq,"hd")) {
667 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x02);
668 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00);
669 } else if (!strcasecmp(bootseq,"hd,cd")) {
671 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x32);
672 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00);
674 PrintError(vm,VCORE_NONE,"nvram: unknown boot sequence '%s', setting 'cd,hd'\n",bootseq);
676 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_FIRST, 0x23);
677 set_memory(nvram, NVRAM_REG_BOOTSEQ_NEW_SECOND, 0x00);
681 // Set equipment byte to note no floppies, vga display, keyboard, math
682 set_memory(nvram, NVRAM_REG_EQUIPMENT_BYTE, 0x2e);
685 // Set the shutdown status gently
687 set_memory(nvram, NVRAM_REG_SHUTDOWN_STATUS, 0x0);
691 // 00100110 = no update in progress, base=32768 Hz, rate = 1024 Hz
692 set_memory(nvram, NVRAM_REG_STAT_A, 0x26);
695 // 00000010 = not setting, no interrupts, blocked rect signal, bcd mode (bit 3 = 0), 24 hour, normal time
696 set_memory(nvram, NVRAM_REG_STAT_B, 0x02);
700 // No IRQ requested, result not do to any source
701 set_memory(nvram, NVRAM_REG_STAT_C, 0x00);
705 set_memory(nvram, NVRAM_REG_STAT_D, 0x80);
708 // january 1, 2008, 00:00:00
709 set_memory(nvram, NVRAM_REG_SEC, 0x00);
710 set_memory(nvram, NVRAM_REG_SEC_ALARM, 0x00);
711 set_memory(nvram, NVRAM_REG_MIN, 0x00);
712 set_memory(nvram, NVRAM_REG_MIN_ALARM, 0x00);
713 set_memory(nvram, NVRAM_REG_HOUR, 0x00);
714 set_memory(nvram, NVRAM_REG_HOUR_ALARM, 0x00);
716 set_memory(nvram, NVRAM_REG_MONTH, 0x01);
717 set_memory(nvram, NVRAM_REG_MONTH_DAY, 0x1);
718 set_memory(nvram, NVRAM_REG_WEEK_DAY, 0x1);
719 set_memory(nvram, NVRAM_REG_YEAR, 0x08);
720 set_memory(nvram, NVRAM_REG_IBM_CENTURY_BYTE, 0x20);
721 set_memory(nvram, NVRAM_REG_IBM_PS2_CENTURY_BYTE, 0x20);
723 set_memory(nvram, NVRAM_REG_DIAGNOSTIC_STATUS, 0x00);
728 set_memory_size(nvram, vm->mem_size);
729 init_harddrives(nvram);
731 set_memory(nvram, NVRAM_REG_SMPCPUS, vm->num_cores - 1);
733 /* compute checksum (must follow all assignments here) */
734 checksum = compute_checksum(nvram);
735 set_memory(nvram, NVRAM_REG_CSUM_HIGH, (checksum >> 8) & 0xff);
736 set_memory(nvram, NVRAM_REG_CSUM_LOW, checksum & 0xff);
740 nvram->dev_state = NVRAM_READY;
751 static int nvram_write_reg_port(struct guest_info * core, uint16_t port,
752 void * src, uint_t length, void * priv_data) {
754 struct nvram_internal * data = priv_data;
758 data->thereg = reg & 0x7f; //discard NMI bit if it's there
760 PrintDebug(core->vm_info, core, "nvram: Writing To NVRAM reg: 0x%x (NMI_disable=%d)\n", data->thereg,reg>>7);
765 static int nvram_read_data_port(struct guest_info * core, uint16_t port,
766 void * dst, uint_t length, void * priv_data) {
768 struct nvram_internal * data = priv_data;
770 addr_t irq_state = v3_lock_irqsave(data->nvram_lock);
772 if (get_memory(data, data->thereg, (uint8_t *)dst) == -1) {
773 PrintError(core->vm_info, core, "nvram: Register %d (0x%x) Not set - POSSIBLE BUG IN MACHINE INIT - CONTINUING\n", data->thereg, data->thereg);
777 PrintDebug(core->vm_info, core, "nvram: nvram_read_data_port(0x%x) = 0x%x\n", data->thereg, *(uint8_t *)dst);
780 if (data->thereg == NVRAM_REG_STAT_A) {
781 data->mem_state[data->thereg] ^= 0x80; // toggle Update in progess
784 v3_unlock_irqrestore(data->nvram_lock, irq_state);
790 static int nvram_write_data_port(struct guest_info * core, uint16_t port,
791 void * src, uint_t length, void * priv_data) {
793 struct nvram_internal * data = priv_data;
795 addr_t irq_state = v3_lock_irqsave(data->nvram_lock);
797 set_memory(data, data->thereg, *(uint8_t *)src);
799 v3_unlock_irqrestore(data->nvram_lock, irq_state);
801 PrintDebug(core->vm_info, core, "nvram: nvram_write_data_port(0x%x) = 0x%x\n",
802 data->thereg, data->mem_state[data->thereg]);
810 static int nvram_free(struct nvram_internal * nvram_state) {
812 // unregister host events
813 struct guest_info *info = &(nvram_state->vm->cores[0]);
815 if (nvram_state->timer) {
816 v3_remove_timer(info,nvram_state->timer);
819 v3_lock_deinit(&(nvram_state->nvram_lock));
821 V3_Free(nvram_state);
827 static struct v3_timer_ops timer_ops = {
828 .update_timer = nvram_update_timer,
832 static struct v3_device_ops dev_ops = {
833 .free = (int (*)(void *))nvram_free,
839 <device class="NVRAM" id="nvram">
840 <storage>STORAGE</storage>
841 <bootseq>BOOTSEQ</bootseq>
844 STORAGE = the id of the storage controller that will be used to populate
845 the legacy storage device info (e.g., cd, hd the bios knows about)
847 BOOTSEQ = the boot sequence desired - note lack of spaces:
851 cd,hd - first cd, then first hd
852 hd,cd - first hd, then first cd
857 static int nvram_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
858 struct nvram_internal * nvram_state = NULL;
859 struct vm_device * ide = v3_find_dev(vm, v3_cfg_val(cfg, "storage"));
860 char * dev_id = v3_cfg_val(cfg, "ID");
861 char * bootseq = v3_cfg_val(cfg,"bootseq");
866 PrintError(vm, VCORE_NONE, "nvram: Could not find IDE device\n");
871 bootseq=DEFAULT_BOOTSEQ;
872 PrintDebug(vm, VCORE_NONE, "nvram: using default boot sequence %s\n",bootseq);
875 PrintDebug(vm, VCORE_NONE, "nvram: init_device\n");
876 nvram_state = (struct nvram_internal *)V3_Malloc(sizeof(struct nvram_internal) + 1000);
879 PrintError(vm, VCORE_NONE, "Cannot allocate in init\n");
883 PrintDebug(vm, VCORE_NONE, "nvram: internal at %p\n", (void *)nvram_state);
885 nvram_state->ide = ide;
886 nvram_state->vm = vm;
888 struct vm_device * dev = v3_add_device(vm, dev_id, &dev_ops, nvram_state);
891 PrintError(vm, VCORE_NONE, "nvram: Could not attach device %s\n", dev_id);
892 V3_Free(nvram_state);
896 init_nvram_state(vm, nvram_state, bootseq);
899 ret |= v3_dev_hook_io(dev, NVRAM_REG_PORT, NULL, &nvram_write_reg_port);
900 ret |= v3_dev_hook_io(dev, NVRAM_DATA_PORT, &nvram_read_data_port, &nvram_write_data_port);
903 PrintError(vm, VCORE_NONE, "nvram: Error hooking NVRAM IO ports\n");
904 v3_remove_device(dev);
908 nvram_state->timer = v3_add_timer(&(vm->cores[0]),&timer_ops,nvram_state);
910 if (nvram_state->timer == NULL ) {
911 v3_remove_device(dev);
918 device_register("NVRAM", nvram_init)