2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm.h>
21 #include <palacios/vmm_dev_mgr.h>
22 #include <devices/lnx_virtio_pci.h>
23 #include <palacios/vm_guest_mem.h>
25 #include <devices/pci.h>
28 #define BLN_REQUESTED_PORT 20
29 #define BLN_ALLOCATED_PORT 28
32 #define PAGE_SIZE 4096
35 struct balloon_config {
36 uint32_t requested_pages;
37 uint32_t allocated_pages;
38 } __attribute__((packed));
43 * A ballooning request is made by specifying the new memory size of the guest. The guest
44 * will then shrink the amount of of memory it uses to target. The target size is stored in the
45 * Virtio PCI configuration space in the requested pages field.
46 * The device raises its irq, to notify the guest
48 * The guest might not be able to shrink to target, so it stores the size it was able to shrink to
49 * into the allocate_pages field of the pci configuration space.
51 * When the guest frees pages it writes the addresses to the deflation queue (the 2nd one),
53 * When pages are given back to the host they are fed in via the inflation queue (the 1st one),
58 #define QUEUE_SIZE 128
60 /* Host Feature flags */
61 #define VIRTIO_NOTIFY_HOST 0x01
64 struct virtio_balloon_state {
65 struct balloon_config balloon_cfg;
66 struct virtio_config virtio_cfg;
68 struct vm_device * pci_bus;
69 struct pci_device * pci_dev;
71 struct virtio_queue queue[2];
74 struct virtio_queue * cur_queue;
82 static int virtio_reset(struct virtio_balloon_state * virtio) {
84 memset(virtio->queue, 0, sizeof(struct virtio_queue) * 2);
86 virtio->cur_queue = &(virtio->queue[0]);
89 virtio->virtio_cfg.status = 0;
90 virtio->virtio_cfg.pci_isr = 0;
93 /* Balloon configuration */
94 virtio->virtio_cfg.host_features = VIRTIO_NOTIFY_HOST;
96 // Virtio Balloon uses two queues
97 virtio->queue[0].queue_size = QUEUE_SIZE;
98 virtio->queue[1].queue_size = QUEUE_SIZE;
101 memset(&(virtio->balloon_cfg), 0, sizeof(struct balloon_config));
106 static int get_desc_count(struct virtio_queue * q, int index) {
107 struct vring_desc * tmp_desc = &(q->desc[index]);
110 while (tmp_desc->flags & VIRTIO_NEXT_FLAG) {
111 tmp_desc = &(q->desc[tmp_desc->next]);
119 static int handle_kick(struct guest_info * core, struct virtio_balloon_state * virtio) {
120 struct virtio_queue * q = virtio->cur_queue;
122 PrintDebug("VIRTIO BALLOON KICK: cur_index=%d (mod=%d), avail_index=%d\n",
123 q->cur_avail_idx, q->cur_avail_idx % QUEUE_SIZE, q->avail->index);
125 while (q->cur_avail_idx < q->avail->index) {
126 struct vring_desc * tmp_desc = NULL;
127 uint16_t desc_idx = q->avail->ring[q->cur_avail_idx % QUEUE_SIZE];
128 int desc_cnt = get_desc_count(q, desc_idx);
130 uint32_t req_len = 0;
133 PrintDebug("Descriptor Count=%d, index=%d\n", desc_cnt, q->cur_avail_idx % QUEUE_SIZE);
135 for (i = 0; i < desc_cnt; i++) {
137 tmp_desc = &(q->desc[desc_idx]);
139 PrintDebug("Header Descriptor (ptr=%p) gpa=%p, len=%d, flags=%x, next=%d\n",
141 (void *)(addr_t)(tmp_desc->addr_gpa), tmp_desc->length,
142 tmp_desc->flags, tmp_desc->next);
145 if (v3_gpa_to_hva(core, tmp_desc->addr_gpa, (addr_t *)&(page_addr)) == -1) {
146 PrintError("Could not translate block header address\n");
151 if (handle_balloon_op(virtio, tmp_desc, buf_desc, status_desc) == -1) {
152 PrintError("Error handling balloon operation\n");
157 PrintDebug("Guest Balloon Currently Ignored\n");
158 PrintDebug("\t Requested=%d, Allocated=%d\n",
159 virtio->balloon_cfg.requested_pages,
160 virtio->balloon_cfg.allocated_pages);
162 req_len += tmp_desc->length;
163 desc_idx = tmp_desc->next;
166 q->used->ring[q->used->index % QUEUE_SIZE].id = q->avail->ring[q->cur_avail_idx % QUEUE_SIZE];
167 q->used->ring[q->used->index % QUEUE_SIZE].length = req_len; // What do we set this to????
173 if (!(q->avail->flags & VIRTIO_NO_IRQ_FLAG)) {
174 PrintDebug("Raising IRQ %d\n", virtio->pci_dev->config_header.intr_line);
175 v3_pci_raise_irq(virtio->pci_bus, 0, virtio->pci_dev);
176 virtio->virtio_cfg.pci_isr = VIRTIO_ISR_ACTIVE;
182 static int virtio_io_write(struct guest_info * core, uint16_t port, void * src, uint_t length, void * private_data) {
183 struct virtio_balloon_state * virtio = (struct virtio_balloon_state *)private_data;
184 int port_idx = port % virtio->io_range_size;
187 PrintDebug("VIRTIO BALLOON Write for port %d (index=%d) len=%d, value=%x\n",
188 port, port_idx, length, *(uint32_t *)src);
193 case GUEST_FEATURES_PORT:
195 PrintError("Illegal write length for guest features\n");
199 virtio->virtio_cfg.guest_features = *(uint32_t *)src;
202 case VRING_PG_NUM_PORT:
204 addr_t pfn = *(uint32_t *)src;
205 addr_t page_addr = (pfn << VIRTIO_PAGE_SHIFT);
208 virtio->cur_queue->pfn = pfn;
210 virtio->cur_queue->ring_desc_addr = page_addr ;
211 virtio->cur_queue->ring_avail_addr = page_addr + (QUEUE_SIZE * sizeof(struct vring_desc));
212 virtio->cur_queue->ring_used_addr = ( virtio->cur_queue->ring_avail_addr + \
213 sizeof(struct vring_avail) + \
214 (QUEUE_SIZE * sizeof(uint16_t)));
216 // round up to next page boundary.
217 virtio->cur_queue->ring_used_addr = (virtio->cur_queue->ring_used_addr + 0xfff) & ~0xfff;
219 if (v3_gpa_to_hva(core, virtio->cur_queue->ring_desc_addr, (addr_t *)&(virtio->cur_queue->desc)) == -1) {
220 PrintError("Could not translate ring descriptor address\n");
225 if (v3_gpa_to_hva(core, virtio->cur_queue->ring_avail_addr, (addr_t *)&(virtio->cur_queue->avail)) == -1) {
226 PrintError("Could not translate ring available address\n");
231 if (v3_gpa_to_hva(core, virtio->cur_queue->ring_used_addr, (addr_t *)&(virtio->cur_queue->used)) == -1) {
232 PrintError("Could not translate ring used address\n");
236 PrintDebug("RingDesc_addr=%p, Avail_addr=%p, Used_addr=%p\n",
237 (void *)(virtio->cur_queue->ring_desc_addr),
238 (void *)(virtio->cur_queue->ring_avail_addr),
239 (void *)(virtio->cur_queue->ring_used_addr));
241 PrintDebug("RingDesc=%p, Avail=%p, Used=%p\n",
242 virtio->cur_queue->desc, virtio->cur_queue->avail, virtio->cur_queue->used);
245 PrintError("Illegal write length for page frame number\n");
249 case VRING_Q_SEL_PORT:
250 virtio->virtio_cfg.vring_queue_selector = *(uint16_t *)src;
252 if (virtio->virtio_cfg.vring_queue_selector > 1) {
253 PrintError("Virtio Balloon device only uses 2 queue, selected %d\n",
254 virtio->virtio_cfg.vring_queue_selector);
258 virtio->cur_queue = &(virtio->queue[virtio->virtio_cfg.vring_queue_selector]);
261 case VRING_Q_NOTIFY_PORT:
262 PrintDebug("Handling Kick\n");
263 if (handle_kick(core, virtio) == -1) {
264 PrintError("Could not handle Balloon Notification\n");
268 case VIRTIO_STATUS_PORT:
269 virtio->virtio_cfg.status = *(uint8_t *)src;
271 if (virtio->virtio_cfg.status == 0) {
272 PrintDebug("Resetting device\n");
273 virtio_reset(virtio);
278 case VIRTIO_ISR_PORT:
279 virtio->virtio_cfg.pci_isr = *(uint8_t *)src;
290 static int virtio_io_read(struct guest_info * core, uint16_t port, void * dst, uint_t length, void * private_data) {
291 struct virtio_balloon_state * virtio = (struct virtio_balloon_state *)private_data;
292 int port_idx = port % virtio->io_range_size;
295 PrintDebug("VIRTIO BALLOON Read for port %d (index =%d), length=%d\n",
296 port, port_idx, length);
299 case HOST_FEATURES_PORT:
301 PrintError("Illegal read length for host features\n");
305 *(uint32_t *)dst = virtio->virtio_cfg.host_features;
308 case VRING_PG_NUM_PORT:
310 PrintError("Illegal read length for page frame number\n");
314 *(uint32_t *)dst = virtio->cur_queue->pfn;
317 case VRING_SIZE_PORT:
319 PrintError("Illegal read length for vring size\n");
323 *(uint16_t *)dst = virtio->cur_queue->queue_size;
327 case VIRTIO_STATUS_PORT:
329 PrintError("Illegal read length for status\n");
333 *(uint8_t *)dst = virtio->virtio_cfg.status;
336 case VIRTIO_ISR_PORT:
337 *(uint8_t *)dst = virtio->virtio_cfg.pci_isr;
338 virtio->virtio_cfg.pci_isr = 0;
339 v3_pci_lower_irq(virtio->pci_bus, 0, virtio->pci_dev);
343 if ( (port_idx >= sizeof(struct virtio_config)) &&
344 (port_idx < (sizeof(struct virtio_config) + sizeof(struct balloon_config))) ) {
345 int cfg_offset = port_idx - sizeof(struct virtio_config);
346 uint8_t * cfg_ptr = (uint8_t *)&(virtio->balloon_cfg);
348 memcpy(dst, cfg_ptr + cfg_offset, length);
351 PrintError("Read of Unhandled Virtio Read\n");
362 static int virtio_free(struct virtio_balloon_state * virtio) {
364 // unregister from PCI
371 static struct v3_device_ops dev_ops = {
372 .free = (int (*)(void *))virtio_free,
377 static int set_size(struct virtio_balloon_state * virtio, addr_t size) {
378 virtio->balloon_cfg.requested_pages = size / PAGE_SIZE; // number of pages
380 PrintDebug("Requesting %d pages\n", virtio->balloon_cfg.requested_pages);
382 v3_pci_raise_irq(virtio->pci_bus, 0, virtio->pci_dev);
383 virtio->virtio_cfg.pci_isr = VIRTIO_ISR_ACTIVE | VIRTIO_ISR_CFG_CHANGED;
389 static int handle_hcall(struct guest_info * info, uint_t hcall_id, void * priv_data) {
390 struct virtio_balloon_state * virtio = (struct virtio_balloon_state *)priv_data;
391 int tgt_size = info->vm_regs.rcx;
394 return set_size(virtio, tgt_size);
399 static int handle_query_hcall(struct guest_info * info, uint_t hcall_id, void * priv_data) {
400 struct virtio_balloon_state * virtio = (struct virtio_balloon_state *)priv_data;
402 info->vm_regs.rcx = virtio->balloon_cfg.requested_pages;
403 info->vm_regs.rdx = virtio->balloon_cfg.allocated_pages;
413 static int virtio_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
414 struct vm_device * pci_bus = v3_find_dev(vm, v3_cfg_val(cfg, "bus"));
415 struct virtio_balloon_state * virtio_state = NULL;
416 struct pci_device * pci_dev = NULL;
417 char * dev_id = v3_cfg_val(cfg, "ID");
419 PrintDebug("Initializing VIRTIO Balloon device\n");
421 if (pci_bus == NULL) {
422 PrintError("VirtIO devices require a PCI Bus");
427 virtio_state = (struct virtio_balloon_state *)V3_Malloc(sizeof(struct virtio_balloon_state));
428 memset(virtio_state, 0, sizeof(struct virtio_balloon_state));
431 struct vm_device * dev = v3_add_device(vm, dev_id, &dev_ops, virtio_state);
434 PrintError("Could not attach device %s\n", dev_id);
435 V3_Free(virtio_state);
439 // PCI initialization
441 struct v3_pci_bar bars[6];
442 int num_ports = sizeof(struct virtio_config) + sizeof(struct balloon_config);
443 int tmp_ports = num_ports;
448 // This gets the number of ports, rounded up to a power of 2
449 virtio_state->io_range_size = 1; // must be a power of 2
451 while (tmp_ports > 0) {
453 virtio_state->io_range_size <<= 1;
456 // this is to account for any low order bits being set in num_ports
457 // if there are none, then num_ports was already a power of 2 so we shift right to reset it
458 if ((num_ports & ((virtio_state->io_range_size >> 1) - 1)) == 0) {
459 virtio_state->io_range_size >>= 1;
463 for (i = 0; i < 6; i++) {
464 bars[i].type = PCI_BAR_NONE;
467 bars[0].type = PCI_BAR_IO;
468 bars[0].default_base_port = -1;
469 bars[0].num_ports = virtio_state->io_range_size;
471 bars[0].io_read = virtio_io_read;
472 bars[0].io_write = virtio_io_write;
473 bars[0].private_data = virtio_state;
476 pci_dev = v3_pci_register_device(pci_bus, PCI_STD_DEVICE,
477 0, PCI_AUTO_DEV_NUM, 0,
478 "LNX_VIRTIO_BALLOON", bars,
479 NULL, NULL, NULL, virtio_state);
482 PrintError("Could not register PCI Device\n");
483 v3_remove_device(dev);
487 pci_dev->config_header.vendor_id = VIRTIO_VENDOR_ID;
488 pci_dev->config_header.subsystem_vendor_id = VIRTIO_SUBVENDOR_ID;
491 pci_dev->config_header.device_id = VIRTIO_BALLOON_DEV_ID;
492 pci_dev->config_header.class = PCI_CLASS_MEMORY;
493 pci_dev->config_header.subclass = PCI_MEM_SUBCLASS_RAM;
495 pci_dev->config_header.subsystem_id = VIRTIO_BALLOON_SUBDEVICE_ID;
498 pci_dev->config_header.intr_pin = 1;
500 pci_dev->config_header.max_latency = 1; // ?? (qemu does it...)
503 virtio_state->pci_dev = pci_dev;
504 virtio_state->pci_bus = pci_bus;
507 virtio_reset(virtio_state);
509 v3_register_hypercall(vm, BALLOON_START_HCALL, handle_hcall, virtio_state);
510 v3_register_hypercall(vm, BALLOON_QUERY_HCALL, handle_query_hcall, virtio_state);
516 device_register("LNX_VIRTIO_BALLOON", virtio_init)