2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm.h>
21 #include <devices/ide.h>
22 #include "ide-types.h"
26 #define PRI_DATA_PORT 0x1f0
27 #define PRI_FEATURES_PORT 0x1f1
28 #define PRI_SECT_CNT_PORT 0x1f2
29 #define PRI_SECT_NUM_PORT 0x1f3
30 #define PRI_CYL_LOW_PORT 0x1f4
31 #define PRI_CYL_HIGH_PORT 0x1f5
32 #define PRI_DRV_SEL_PORT 0x1f6
33 #define PRI_CMD_PORT 0x1f7
34 #define PRI_CTRL_PORT 0x3f6
35 #define PRI_ADDR_REG_PORT 0x3f7
37 #define SEC_DATA_PORT 0x170
38 #define SEC_FEATURES_PORT 0x171
39 #define SEC_SECT_CNT_PORT 0x172
40 #define SEC_SECT_NUM_PORT 0x173
41 #define SEC_CYL_LOW_PORT 0x174
42 #define SEC_CYL_HIGH_PORT 0x175
43 #define SEC_DRV_SEL_PORT 0x176
44 #define SEC_CMD_PORT 0x177
45 #define SEC_CTRL_PORT 0x376
46 #define SEC_ADDR_REG_PORT 0x377
49 typedef enum {IDE_DISK, IDE_CDROM, IDE_NONE} ide_dev_type_t;
50 static const char * ide_dev_type_strs[] = {"HARDDISK", "CDROM", "NONE"};
53 static inline const char * device_type_to_str(ide_dev_type_t type) {
58 return ide_dev_type_strs[type];
68 ide_dev_type_t drive_type;
71 uint8_t sector_count; // 0x1f2,0x172
72 uint8_t sector_num; // 0x1f3,0x173
76 uint8_t cylinder_low; // 0x1f4,0x174
77 uint8_t cylinder_high; // 0x1f5,0x175
78 } __attribute__((packed));
79 } __attribute__((packed));
87 struct ide_drive drives[2];
90 struct ide_error_reg error_reg; // [read] 0x1f1,0x171
92 struct ide_features_reg features;
94 struct ide_drive_head_reg drive_head; // 0x1f6,0x176
96 struct ide_status_reg status; // [read] 0x1f7,0x177
97 uint8_t command_reg; // [write] 0x1f7,0x177
100 struct ide_ctrl_reg ctrl_reg; // [write] 0x3f6,0x376
105 struct ide_internal {
106 struct ide_channel channels[2];
112 static inline int get_channel_index(ushort_t port) {
113 if (((port & 0xfff8) == 0x1f0) ||
114 ((port & 0xfffe) == 0x3f6)) {
116 } else if (((port & 0xfff8) == 0x170) ||
117 ((port & 0xfffe) == 0x376)) {
124 static inline struct ide_channel * get_selected_channel(struct ide_internal * ide, ushort_t port) {
125 int channel_idx = get_channel_index(port);
126 return &(ide->channels[channel_idx]);
129 static inline struct ide_drive * get_selected_drive(struct ide_channel * channel) {
130 return &(channel->drives[channel->drive_head.drive_sel]);
134 static inline int is_lba_enabled(struct ide_channel * channel) {
135 return channel->drive_head.lba_mode;
139 static void drive_reset(struct ide_drive * drive) {
140 drive->sector_count = 0x01;
141 drive->sector_num = 0x01;
143 if (drive->drive_type == IDE_CDROM) {
144 drive->cylinder = 0xeb14;
146 drive->cylinder = 0x0000;
149 // Send the reset signal to the connected device callbacks
150 // channel->drives[0].reset();
151 // channel->drives[1].reset();
154 static void channel_reset(struct ide_channel * channel) {
156 // set busy and seek complete flags
157 channel->status.val = 0x90;
160 channel->error_reg.val = 0x01;
163 channel->command_reg = 0x00;
165 channel->ctrl_reg.irq_enable = 0;
168 static void channel_reset_complete(struct ide_channel * channel) {
169 channel->status.busy = 0;
170 channel->status.ready = 1;
172 channel->drive_head.head_num = 0;
174 drive_reset(&(channel->drives[0]));
175 drive_reset(&(channel->drives[1]));
180 static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
181 PrintDebug("IDE: Writing Command Port %x (val=%x)\n", port, *(uint8_t *)src);
186 static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
187 PrintDebug("IDE: Writing Data Port %x (val=%x)\n", port, *(uint8_t *)src);
192 static int read_data_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
193 PrintDebug("IDE: Reading Data Port %x\n", port);
197 static int write_port_std(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
198 struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
199 struct ide_channel * channel = get_selected_channel(ide, port);
200 struct ide_drive * drive = get_selected_drive(channel);
203 PrintError("Invalid Write length on IDE port %x\n", port);
207 PrintDebug("IDE: Writing Standard Port %x (val=%x)\n", port, *(uint8_t *)src);
211 // reset and interrupt enable
213 case SEC_CTRL_PORT: {
214 struct ide_ctrl_reg * tmp_ctrl = (struct ide_ctrl_reg *)src;
216 // only reset channel on a 0->1 reset bit transition
217 if ((!channel->ctrl_reg.soft_reset) && (tmp_ctrl->soft_reset)) {
218 channel_reset(channel);
219 } else if ((channel->ctrl_reg.soft_reset) && (!tmp_ctrl->soft_reset)) {
220 channel_reset_complete(channel);
223 channel->ctrl_reg.val = tmp_ctrl->val;
226 case PRI_FEATURES_PORT:
227 case SEC_FEATURES_PORT:
228 channel->features.val = *(uint8_t *)src;
231 case PRI_SECT_CNT_PORT:
232 case SEC_SECT_CNT_PORT:
233 drive->sector_count = *(uint8_t *)src;
236 case PRI_SECT_NUM_PORT:
237 case SEC_SECT_NUM_PORT:
238 drive->sector_num = *(uint8_t *)src;
240 case PRI_CYL_LOW_PORT:
241 case SEC_CYL_LOW_PORT:
242 drive->cylinder_low = *(uint8_t *)src;
245 case PRI_CYL_HIGH_PORT:
246 case SEC_CYL_HIGH_PORT:
247 drive->cylinder_high = *(uint8_t *)src;
250 case PRI_DRV_SEL_PORT:
251 case SEC_DRV_SEL_PORT: {
252 channel->drive_head.val = *(uint8_t *)src;
254 // make sure the reserved bits are ok..
255 // JRL TODO: check with new ramdisk to make sure this is right...
256 channel->drive_head.val |= 0xa0;
258 drive = get_selected_drive(channel);
260 // Selecting a non-present device is a no-no
261 if (drive->drive_type == IDE_NONE) {
262 PrintDebug("Attempting to select a non-present drive\n");
263 channel->error_reg.abort = 1;
264 channel->status.error = 1;
270 PrintError("IDE: Write to unknown Port %x\n", port);
277 static int read_port_std(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
278 struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
279 struct ide_channel * channel = get_selected_channel(ide, port);
280 struct ide_drive * drive = get_selected_drive(channel);
283 PrintError("Invalid Read length on IDE port %x\n", port);
287 PrintDebug("IDE: Reading Standard Port %x\n", port);
290 if ((port == PRI_ADDR_REG_PORT) ||
291 (port == SEC_ADDR_REG_PORT)) {
292 // unused, return 0xff
293 *(uint8_t *)dst = 0xff;
298 // if no drive is present just return 0 + reserved bits
299 if (drive->drive_type == IDE_NONE) {
300 if ((port == PRI_DRV_SEL_PORT) ||
301 (port == SEC_DRV_SEL_PORT)) {
302 *(uint8_t *)dst = 0xa0;
312 // This is really the error register.
313 case PRI_FEATURES_PORT:
314 case SEC_FEATURES_PORT:
315 *(uint8_t *)dst = channel->error_reg.val;
318 case PRI_SECT_CNT_PORT:
319 case SEC_SECT_CNT_PORT:
320 *(uint8_t *)dst = drive->sector_count;
323 case PRI_SECT_NUM_PORT:
324 case SEC_SECT_NUM_PORT:
325 *(uint8_t *)dst = drive->sector_num;
328 case PRI_CYL_LOW_PORT:
329 case SEC_CYL_LOW_PORT:
330 *(uint8_t *)dst = drive->cylinder_low;
334 case PRI_CYL_HIGH_PORT:
335 case SEC_CYL_HIGH_PORT:
336 *(uint8_t *)dst = drive->cylinder_high;
339 case PRI_DRV_SEL_PORT:
340 case SEC_DRV_SEL_PORT: // hard disk drive and head register 0x1f6
341 *(uint8_t *)dst = channel->drive_head.val;
348 // Something about lowering interrupts here....
349 *(uint8_t *)dst = channel->status.val;
353 PrintError("Invalid Port: %x\n", port);
362 static void init_drive(struct ide_drive * drive) {
364 drive->sector_count = 0x01;
365 drive->sector_num = 0x01;
366 drive->cylinder = 0x0000;
369 drive->drive_type = IDE_NONE;
373 static void init_channel(struct ide_channel * channel) {
376 channel->error_reg.val = 0x01;
377 channel->drive_head.val = 0x00;
378 channel->status.val = 0x00;
379 channel->command_reg = 0x00;
380 channel->ctrl_reg.val = 0x08;
382 for (i = 0; i < 2; i++) {
383 init_drive(&(channel->drives[i]));
388 static void init_ide_state(struct ide_internal * ide) {
391 for (i = 0; i < 2; i++) {
392 init_channel(&(ide->channels[i]));
398 static int init_ide(struct vm_device * dev) {
399 struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
401 PrintDebug("IDE: Initializing IDE\n");
406 v3_dev_hook_io(dev, PRI_CTRL_PORT,
407 &read_port_std, &write_port_std);
409 v3_dev_hook_io(dev, PRI_DATA_PORT,
410 &read_data_port, &write_data_port);
411 v3_dev_hook_io(dev, PRI_FEATURES_PORT,
412 &read_port_std, &write_port_std);
413 v3_dev_hook_io(dev, PRI_SECT_CNT_PORT,
414 &read_port_std, &write_port_std);
415 v3_dev_hook_io(dev, PRI_SECT_NUM_PORT,
416 &read_port_std, &write_port_std);
417 v3_dev_hook_io(dev, PRI_CYL_LOW_PORT,
418 &read_port_std, &write_port_std);
419 v3_dev_hook_io(dev, PRI_CYL_HIGH_PORT,
420 &read_port_std, &write_port_std);
421 v3_dev_hook_io(dev, PRI_DRV_SEL_PORT,
422 &read_port_std, &write_port_std);
423 v3_dev_hook_io(dev, PRI_CMD_PORT,
424 &read_port_std, &write_cmd_port);
427 v3_dev_hook_io(dev, SEC_CTRL_PORT,
428 &read_port_std, &write_port_std);
430 v3_dev_hook_io(dev, SEC_DATA_PORT,
431 &read_data_port, &write_data_port);
432 v3_dev_hook_io(dev, SEC_FEATURES_PORT,
433 &read_port_std, &write_port_std);
434 v3_dev_hook_io(dev, SEC_SECT_CNT_PORT,
435 &read_port_std, &write_port_std);
436 v3_dev_hook_io(dev, SEC_SECT_NUM_PORT,
437 &read_port_std, &write_port_std);
438 v3_dev_hook_io(dev, SEC_CYL_LOW_PORT,
439 &read_port_std, &write_port_std);
440 v3_dev_hook_io(dev, SEC_CYL_HIGH_PORT,
441 &read_port_std, &write_port_std);
442 v3_dev_hook_io(dev, SEC_DRV_SEL_PORT,
443 &read_port_std, &write_port_std);
444 v3_dev_hook_io(dev, SEC_CMD_PORT,
445 &read_port_std, &write_cmd_port);
449 v3_dev_hook_io(dev, SEC_ADDR_REG_PORT,
450 &read_port_std, &write_port_std);
452 v3_dev_hook_io(dev, PRI_ADDR_REG_PORT,
453 &read_port_std, &write_port_std);
459 static int deinit_ide(struct vm_device * dev) {
460 // unhook io ports....
461 // deregister from PCI?
466 static struct vm_device_ops dev_ops = {
468 .deinit = deinit_ide,
475 struct vm_device * v3_create_ide() {
476 struct ide_internal * ide = (struct ide_internal *)V3_Malloc(sizeof(struct ide_internal));
477 struct vm_device * device = v3_create_device("IDE", &dev_ops, ide);
481 PrintDebug("IDE: Creating IDE bus x 2\n");