2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Peter Dinda <pdinda@northwestern.edu>
11 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
12 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
13 * All rights reserved.
15 * Author: Peter Dinda <pdinda@northwestern.edu>
16 * Author: Jack Lange <jarusl@cs.northwestern.edu>
18 * This is free software. You are permitted to use,
19 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
28 #include <palacios/vmm_types.h>
29 #include <palacios/vmcs.h>
30 #include <palacios/vmm.h>
31 #include <palacios/vm_guest.h>
33 // Intel VMX Specific MSRs
34 #define VMX_FEATURE_CONTROL_MSR 0x0000003a
35 #define VMX_BASIC_MSR 0x00000480
36 #define VMX_PINBASED_CTLS_MSR 0x00000481
37 #define VMX_PROCBASED_CTLS_MSR 0x00000482
38 #define VMX_EXIT_CTLS_MSR 0x00000483
39 #define VMX_ENTRY_CTLS_MSR 0x00000484
40 #define VMX_MISC_MSR 0x00000485
41 #define VMX_CR0_FIXED0_MSR 0x00000486
42 #define VMX_CR0_FIXED1_MSR 0x00000487
43 #define VMX_CR4_FIXED0_MSR 0x00000488
44 #define VMX_CR4_FIXED1_MSR 0x00000489
45 #define VMX_VMCS_ENUM_MSR 0x0000048A
48 #define VMX_FAIL_INVALID 1
49 #define VMX_FAIL_VALID 2
52 #define FEATURE_CONTROL_LOCK 0x00000001
53 #define FEATURE_CONTROL_VMXON 0x00000004
54 #define FEATURE_CONTROL_VALID ( FEATURE_CONTROL_LOCK | FEATURE_CONTROL_VMXON )
57 #define CPUID_1_ECX_VTXFLAG 0x00000020
60 struct vmx_pin_ctrls {
64 uint_t ext_int_exit : 1;
69 uint_t active_preempt_timer : 1;
71 } __attribute__((packed));
72 } __attribute__((packed));
73 } __attribute__((packed));
76 struct vmx_pri_proc_ctrls {
81 uint_t int_wndw_exit : 1;
82 uint_t tsc_offset : 1;
86 uint_t invlpg_exit : 1;
87 uint_t mwait_exit : 1;
88 uint_t rdpmc_exit : 1;
89 uint_t rdtsc_exit : 1;
91 uint_t cr3_ld_exit : 1;
92 uint_t cr3_str_exit : 1;
94 uint_t cr8_ld_exit : 1;
95 uint_t cr8_str_exit : 1;
97 uint_t nmi_wndw_exit : 1;
98 uint_t mov_dr_exit : 1;
99 uint_t uncon_io_exit : 1;
100 uint_t use_io_bitmap : 1;
102 uint_t monitor_trap : 1;
103 uint_t use_msr_bitmap : 1;
104 uint_t monitor_exit : 1;
105 uint_t pause_exit : 1;
106 uint_t sec_ctrls : 1;
107 } __attribute__((packed));
108 } __attribute__((packed));
109 } __attribute__((packed));
111 struct vmx_sec_proc_ctrls {
115 uint_t virt_apic_acc : 1;
116 uint_t enable_ept : 1;
117 uint_t desc_table_exit : 1;
118 uint_t enable_rdtscp : 1;
119 uint_t virt_x2apic : 1;
120 uint_t enable_vpid : 1;
121 uint_t unrstrct_guest : 1;
123 uint_t pause_loop_exit : 1;
125 } __attribute__((packed));
126 } __attribute__((packed));
127 } __attribute__((packed));
129 struct vmx_exit_ctrls {
134 uint_t save_dbg_ctrls : 1;
136 uint_t host_64_on : 1;
138 uint_t ld_perf_glbl_ctrl : 1;
140 uint_t ack_int_on_exit : 1;
144 uint_t save_efer : 1;
146 uint_t save_preempt_timer : 1;
148 } __attribute__((packed));
149 } __attribute__((packed));
150 } __attribute__((packed));
152 struct vmx_entry_ctrls {
157 uint_t ld_dbg_ctrls : 1;
159 uint_t guest_ia32e : 1;
160 uint_t smm_entry : 1;
161 uint_t no_dual_monitor : 1;
163 uint_t ld_perf_glbl_ctrl : 1;
167 } __attribute__((packed));
168 } __attribute__((packed));
169 } __attribute__((packed));
171 struct vmx_basic_msr {
173 uint_t regionSize : 13;
174 uint_t rsvd1 : 4; // Always 0
175 uint_t physWidth : 1;
176 uint_t smm : 1; // Always 1
178 uint_t rsvd2 : 10; // Always 0
179 } __attribute__((packed));
191 struct tss_descriptor {
195 /* In IA32, type follows the form 10B1b, where B is the busy flag */
201 uint_t available : 1;
204 uint_t granularity : 1;
212 }__attribute__((packed));
214 struct vmcs_host_state {
215 struct v3_segment gdtr;
216 struct v3_segment idtr;
217 struct v3_segment tr;
226 vmxassist_state_t assist_state;
227 struct vmcs_host_state host_state;
229 addr_t vmcs_ptr_phys;
233 v3_reg_t guest_cr4; /// corresponds to the CR4 Read shadow
236 /* VMX Control Fields */
237 struct vmx_pin_ctrls pin_ctrls;
238 struct vmx_pri_proc_ctrls pri_proc_ctrls;
239 struct vmx_sec_proc_ctrls sec_proc_ctrls;
240 struct vmx_exit_ctrls exit_ctrls;
241 struct vmx_entry_ctrls entry_ctrls;
244 int v3_is_vmx_capable();
246 void v3_init_vmx_cpu(int cpu_id);
247 void v3_deinit_vmx_cpu(int cpu_id);
249 int v3_start_vmx_guest(struct guest_info* info);
250 int v3_vmx_enter(struct guest_info * info);
252 int v3_init_vmx_vmcs(struct guest_info * info, v3_vm_class_t vm_class);
253 int v3_deinit_vmx_vmcs(struct guest_info * core);
255 #endif // ! __V3VEE__