2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #ifndef __VMM_PAGING_H__
22 #define __VMM_PAGING_H__
27 #include <palacios/vmm_types.h>
28 #include <palacios/vmm_util.h>
33 In the following, when we say "page table", we mean the whole 2 or 4 layer
34 page table (PDEs, PTEs), etc.
37 guest-visible paging state
38 This is the state that the guest thinks the machine is using
40 - guest physical memory
41 The physical memory addresses the guest is allowed to use
42 (see shadow page maps, below)
44 (we care about when the current one changes)
45 - guest paging registers (these are never written to hardware)
51 This the state that the machine will actually use when the guest
52 is running. It consists of:
53 - current shadow page table
54 This is the page table actually useed when the guest is running.
55 It is changed/regenerated when the guest page table changes
56 It mostly reflects the guest page table, except that it restricts
57 physical addresses to those the VMM allocates to the guest.
59 This is a mapping from guest physical memory addresses to
60 the current location of the guest physical memory content.
61 It maps from regions of physical memory addresses to regions
62 located in physical memory or elsewhere.
63 (8192,16384) -> MEM(8912,...)
64 (0,8191) -> DISK(65536,..)
65 - guest paging registers (these are written to guest state)
70 This is the state we expect to be operative when the VMM is running.
71 Typically, this is set up by the host os into which we have embedded
72 the VMM, but we include the description here for clarity.
74 This is the page table we use when we are executing in
75 the VMM (or the host os)
81 The reason why the shadow paging state and the host paging state are
82 distinct is to permit the guest to use any virtual address it wants,
83 irrespective of the addresses the VMM or the host os use. These guest
84 virtual addresses are reflected in the shadow paging state. When we
85 exit from the guest, we switch to the host paging state so that any
86 virtual addresses that overlap between the guest and VMM/host now map
87 to the physical addresses epxected by the VMM/host. On AMD SVM, this
88 switch is done by the hardware. On Intel VT, the switch is done
89 by the hardware as well, but we are responsible for manually updating
90 the host state in the vmcs before entering the guest.
96 #define MAX_PDE32_ENTRIES 1024
97 #define MAX_PTE32_ENTRIES 1024
99 #define MAX_PDPE32PAE_ENTRIES 4
100 #define MAX_PDE32PAE_ENTRIES 512
101 #define MAX_PTE32PAE_ENTRIES 512
103 #define MAX_PML4E64_ENTRIES 512
104 #define MAX_PDPE64_ENTRIES 512
105 #define MAX_PDE64_ENTRIES 512
106 #define MAX_PTE64_ENTRIES 512
109 typedef enum {PAGE_4KB, PAGE_2MB, PAGE_4MB, PAGE_1GB,
110 PAGE_PT32, PAGE_PD32,
111 PAGE_PDP32PAE, PAGE_PD32PAE, PAGE_PT32PAE,
112 PAGE_PML464, PAGE_PDP64, PAGE_PD64, PAGE_PT64} page_type_t;
115 /* Converts an address into a page table index */
116 #define PDE32_INDEX(x) ((((uint_t)x) >> 22) & 0x3ff)
117 #define PTE32_INDEX(x) ((((uint_t)x) >> 12) & 0x3ff)
120 #define PDPE32PAE_INDEX(x) ((((uint_t)x) >> 30) & 0x3)
121 #define PDE32PAE_INDEX(x) ((((uint_t)x) >> 21) & 0x1ff)
122 #define PTE32PAE_INDEX(x) ((((uint_t)x) >> 12) & 0x1ff)
124 #define PML4E64_INDEX(x) ((((ullong_t)x) >> 39) & 0x1ff)
125 #define PDPE64_INDEX(x) ((((ullong_t)x) >> 30) & 0x1ff)
126 #define PDE64_INDEX(x) ((((ullong_t)x) >> 21) & 0x1ff)
127 #define PTE64_INDEX(x) ((((ullong_t)x) >> 12) & 0x1ff)
130 /* Gets the base address needed for a Page Table entry */
131 /* Deprecate these :*/
133 #define PD32_BASE_ADDR(x) (((uint_t)x) >> 12)
134 #define PT32_BASE_ADDR(x) (((uint_t)x) >> 12)
135 #define PD32_4MB_BASE_ADDR(x) (((uint_t)x) >> 22)
137 #define PML4E64_BASE_ADDR(x) (((ullong_t)x) >> 12)
138 #define PDPE64_BASE_ADDR(x) (((ullong_t)x) >> 12)
139 #define PDE64_BASE_ADDR(x) (((ullong_t)x) >> 12)
140 #define PTE64_BASE_ADDR(x) (((ullong_t)x) >> 12)
142 // Accessor functions for the page table structures
143 #define PDE32_T_ADDR(x) (((x).pt_base_addr) << 12)
144 #define PTE32_T_ADDR(x) (((x).page_base_addr) << 12)
145 #define PDE32_4MB_T_ADDR(x) (((x).page_base_addr) << 22)
147 /* Replace The above with these... */
148 #define PAGE_BASE_ADDR(x) ((x) >> 12)
149 #define PAGE_BASE_ADDR_2MB(x) ((x) >> 21)
150 #define PAGE_BASE_ADDR_4MB(x) ((x) >> 22)
151 #define PAGE_BASE_ADDR_1GB(x) ((x) >> 30)
153 #define BASE_TO_PAGE_ADDR(x) (((addr_t)x) << 12)
154 #define BASE_TO_PAGE_ADDR_2MB(x) (((addr_t)x) << 21)
155 #define BASE_TO_PAGE_ADDR_4MB(x) (((addr_t)x) << 22)
156 #define BASE_TO_PAGE_ADDR_1GB(x) (((addr_t)x) << 30)
161 #define PT32_PAGE_OFFSET(x) (((uint_t)x) & 0xfff)
162 #define PD32_4MB_PAGE_OFFSET(x) (((uint_t)x) & 0x003fffff)
164 #define PT32_PAGE_ADDR(x) (((uint_t)x) & 0xfffff000)
165 #define PD32_4MB_PAGE_ADDR(x) (((uint_t)x) & 0xffc00000)
167 #define PT32_PAGE_POWER 12
168 #define PAGE_ALIGNED_ADDR(x) (((uint_t) (x)) >> 12)
169 //#define PAGE_ADDR(x) (PAGE_ALIGNED_ADDR(x) << 12)
170 #define PAGE_POWER 12
171 #define PAGE_SIZE 4096
173 /* use these instead */
174 #define PAGE_OFFSET(x) ((x) & 0xfff)
175 #define PAGE_OFFSET_2MB(x) ((x) & 0x1fffff)
176 #define PAGE_OFFSET_4MB(x) ((x) & 0x3fffff)
178 #define PAGE_POWER 12
179 #define PAGE_POWER_2MB 22
180 #define PAGE_POWER_4MB 21
182 // We shift instead of mask because we don't know the address size
183 #define PAGE_ADDR(x) (((x) >> PAGE_POWER) << PAGE_POWER)
184 #define PAGE_ADDR_2MB(x) (((x) >> PAGE_POWER_2MB) << PAGE_POWER_2MB)
185 #define PAGE_ADDR_4MB(x) (((x) >> PAGE_POWER_4MB) << PAGE_POWER_4MB)
187 #define PAGE_SIZE 4096
188 #define PAGE_SIZE_2MB (4096 * 512)
189 #define PAGE_SIZE_4MB (4096 * 1024)
198 #define CR3_TO_PDE32_PA(cr3) ((addr_t)(((uint_t)cr3) & 0xfffff000))
199 #define CR3_TO_PDPE32PAE_PA(cr3) ((addr_t)(((uint_t)cr3) & 0xffffffe0))
200 #define CR3_TO_PML4E64_PA(cr3) ((addr_t)(((ullong_t)cr3) & 0x000ffffffffff000LL))
202 #define CR3_TO_PDE32_VA(cr3) ((pde32_t *)V3_VAddr((void *)(addr_t)(((uint_t)cr3) & 0xfffff000)))
203 #define CR3_TO_PDPE32PAE_VA(cr3) ((pdpe32pae_t *)V3_VAddr((void *)(addr_t)(((uint_t)cr3) & 0xffffffe0)))
204 #define CR3_TO_PML4E64_VA(cr3) ((pml4e64_t *)V3_VAddr((void *)(addr_t)(((ullong_t)cr3) & 0x000ffffffffff000LL)))
211 /* Page Table Flag Values */
212 #define PT32_HOOK 0x1
213 #define PT32_GUEST_PT 0x2
217 /* We'll use the general form for now....
218 typedef enum {PDE32_ENTRY_NOT_PRESENT, PDE32_ENTRY_PTE32, PDE32_ENTRY_LARGE_PAGE} pde32_entry_type_t;
219 typedef enum {PTE32_ENTRY_NOT_PRESENT, PTE32_ENTRY_PAGE} pte32_entry_type_t;
221 typedef enum {PDPE32PAE_ENTRY_NOT_PRESENT, PDPE32PAE_ENTRY_PAGE} pdpe32pae_entry_type_t;
222 typedef enum {PDE32PAE_ENTRY_NOT_PRESENT, PDE32PAE_ENTRY_PTE32, PDE32PAE_ENTRY_LARGE_PAGE} pde32pae_entry_type_t;
223 typedef enum {PTE32PAE_ENTRY_NOT_PRESENT, PTE32PAE_ENTRY_PAGE} pte32pae_entry_type_t;
225 typedef enum {PML4E64_ENTRY_NOT_PRESENT, PML4E64_ENTRY_PAGE} pml4e64_entry_type_t;
226 typedef enum {PDPE64_ENTRY_NOT_PRESENT, PDPE64_ENTRY_PTE32, PDPE64_ENTRY_LARGE_PAGE} pdpe64_entry_type_t;
227 typedef enum {PDE64_ENTRY_NOT_PRESENT, PDE64_ENTRY_PTE32, PDE64_ENTRY_LARGE_PAGE} pde64_entry_type_t;
228 typedef enum {PTE64_ENTRY_NOT_PRESENT, PTE64_ENTRY_PAGE} pte64_entry_type_t;
232 typedef enum {PT_ENTRY_NOT_PRESENT, PT_ENTRY_LARGE_PAGE, PT_ENTRY_PAGE} pt_entry_type_t;
233 typedef enum {PT_ACCESS_OK, PT_ACCESS_NOT_PRESENT, PT_ACCESS_WRITE_ERROR, PT_ACCESS_USER_ERROR} pt_access_status_t;
236 typedef struct gen_pt {
239 uint_t user_page : 1;
240 } __attribute__((packed)) gen_pt_t;
242 typedef struct pde32 {
245 uint_t user_page : 1;
246 uint_t write_through : 1;
247 uint_t cache_disable : 1;
250 uint_t large_page : 1;
251 uint_t global_page : 1;
253 uint_t pt_base_addr : 20;
254 } __attribute__((packed)) pde32_t;
256 typedef struct pde32_4MB {
259 uint_t user_page : 1;
260 uint_t write_through : 1;
261 uint_t cache_disable : 1;
264 uint_t large_page : 1;
265 uint_t global_page : 1;
269 uint_t page_base_addr : 10;
271 } __attribute__((packed)) pde32_4MB_t;
273 typedef struct pte32 {
276 uint_t user_page : 1;
277 uint_t write_through : 1;
278 uint_t cache_disable : 1;
282 uint_t global_page : 1;
284 uint_t page_base_addr : 20;
285 } __attribute__((packed)) pte32_t;
288 /* 32 bit PAE PAGE STRUCTURES */
289 typedef struct pdpe32pae {
291 uint_t rsvd : 2; // MBZ
292 uint_t write_through : 1;
293 uint_t cache_disable : 1;
296 uint_t rsvd2 : 2; // MBZ
298 uint_t pd_base_addr : 24;
299 uint_t rsvd3 : 28; // MBZ
300 } __attribute__((packed)) pdpe32pae_t;
304 typedef struct pde32pae {
307 uint_t user_page : 1;
308 uint_t write_through : 1;
309 uint_t cache_disable : 1;
312 uint_t large_page : 1;
313 uint_t global_page : 1;
315 uint_t pt_base_addr : 24;
317 } __attribute__((packed)) pde32pae_t;
319 typedef struct pde32pae_2MB {
322 uint_t user_page : 1;
323 uint_t write_through : 1;
324 uint_t cache_disable : 1;
328 uint_t global_page : 1;
332 uint_t page_base_addr : 15;
335 } __attribute__((packed)) pde32pae_2MB_t;
337 typedef struct pte32pae {
340 uint_t user_page : 1;
341 uint_t write_through : 1;
342 uint_t cache_disable : 1;
346 uint_t global_page : 1;
348 uint_t page_base_addr : 24;
350 } __attribute__((packed)) pte32pae_t;
359 /* LONG MODE 64 bit PAGE STRUCTURES */
360 typedef struct pml4e64 {
363 uint_t user_page : 1;
364 uint_t write_through : 1;
365 uint_t cache_disable : 1;
370 ullong_t pdp_base_addr : 40;
371 uint_t available : 11;
372 uint_t no_execute : 1;
373 } __attribute__((packed)) pml4e64_t;
376 typedef struct pdpe64 {
379 uint_t user_page : 1;
380 uint_t write_through : 1;
381 uint_t cache_disable : 1;
384 uint_t large_page : 1;
387 ullong_t pd_base_addr : 40;
388 uint_t available : 11;
389 uint_t no_execute : 1;
390 } __attribute__((packed)) pdpe64_t;
393 // We Don't support this
394 typedef struct pdpe64_1GB {
397 uint_t user_page : 1;
398 uint_t write_through : 1;
399 uint_t cache_disable : 1;
402 uint_t large_page : 1;
403 uint_t global_page : 1;
407 ullong_t page_base_addr : 22;
408 uint_t available : 11;
409 uint_t no_execute : 1;
410 } __attribute__((packed)) pdpe64_1GB_t;
414 typedef struct pde64 {
417 uint_t user_page : 1;
418 uint_t write_through : 1;
419 uint_t cache_disable : 1;
422 uint_t large_page : 1;
423 uint_t global_page : 1;
425 ullong_t pt_base_addr : 40;
426 uint_t available : 11;
427 uint_t no_execute : 1;
428 } __attribute__((packed)) pde64_t;
430 typedef struct pde64_2MB {
433 uint_t user_page : 1;
434 uint_t write_through : 1;
435 uint_t cache_disable : 1;
438 uint_t large_page : 1;
439 uint_t global_page : 1;
443 ullong_t page_base_addr : 31;
444 uint_t available : 11;
445 uint_t no_execute : 1;
446 } __attribute__((packed)) pde64_2MB_t;
449 typedef struct pte64 {
452 uint_t user_page : 1;
453 uint_t write_through : 1;
454 uint_t cache_disable : 1;
458 uint_t global_page : 1;
460 ullong_t page_base_addr : 40;
461 uint_t available : 11;
462 uint_t no_execute : 1;
463 } __attribute__((packed)) pte64_t;
465 /* *************** */
467 typedef struct pf_error_code {
468 uint_t present : 1; // if 0, fault due to page not present
469 uint_t write : 1; // if 1, faulting access was a write
470 uint_t user : 1; // if 1, faulting access was in user mode
471 uint_t rsvd_access : 1; // if 1, fault from reading a 1 from a reserved field (?)
472 uint_t ifetch : 1; // if 1, faulting access was an instr fetch (only with NX)
474 } __attribute__((packed)) pf_error_t;
479 void delete_page_tables_32(pde32_t * pde);
480 void delete_page_tables_32PAE(pdpe32pae_t * pdpe);
481 void delete_page_tables_64(pml4e64_t * pml4);
485 int v3_translate_guest_pt_32(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr, addr_t * paddr);
486 int v3_translate_guest_pt_32pae(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr, addr_t * paddr);
487 int v3_translate_guest_pt_64(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr, addr_t * paddr);
489 int v3_translate_host_pt_32(v3_reg_t host_cr3, addr_t vaddr, addr_t * paddr);
490 int v3_translate_host_pt_32pae(v3_reg_t host_cr3, addr_t vaddr, addr_t * paddr);
491 int v3_translate_host_pt_64(v3_reg_t host_cr3, addr_t vaddr, addr_t * paddr);
494 /* Should these be static? */
495 pt_entry_type_t pde32_lookup(pde32_t * pd, addr_t addr, addr_t * entry);
496 pt_entry_type_t pte32_lookup(pte32_t * pt, addr_t addr, addr_t * entry);
498 pt_entry_type_t pdpe32pae_lookup(pdpe32pae_t * pdp, addr_t addr, addr_t * entry);
499 pt_entry_type_t pde32pae_lookup(pde32pae_t * pd, addr_t addr, addr_t * entry);
500 pt_entry_type_t pte32pae_lookup(pte32pae_t * pt, addr_t addr, addr_t * entry);
502 pt_entry_type_t pml4e64_lookup(pml4e64_t * pml, addr_t addr, addr_t * entry);
503 pt_entry_type_t pdpe64_lookup(pdpe64_t * pdp, addr_t addr, addr_t * entry);
504 pt_entry_type_t pde64_lookup(pde64_t * pd, addr_t addr, addr_t * entry);
505 pt_entry_type_t pte64_lookup(pte64_t * pt, addr_t addr, addr_t * entry);
512 pt_access_status_t inline v3_can_access_pde32(pde32_t * pde, addr_t addr, pf_error_t access_type);
513 pt_access_status_t inline v3_can_access_pte32(pte32_t * pte, addr_t addr, pf_error_t access_type);
515 pt_access_status_t inline v3_can_access_pdpe32pae(pdpe32pae_t * pdpe, addr_t addr, pf_error_t access_type);
516 pt_access_status_t inline v3_can_access_pde32pae(pde32pae_t * pde, addr_t addr, pf_error_t access_type);
517 pt_access_status_t inline v3_can_access_pte32pae(pte32pae_t * pte, addr_t addr, pf_error_t access_type);
519 pt_access_status_t inline v3_can_access_pml4e64(pml4e64_t * pmle, addr_t addr, pf_error_t access_type);
520 pt_access_status_t inline v3_can_access_pdpe64(pdpe64_t * pdpe, addr_t addr, pf_error_t access_type);
521 pt_access_status_t inline v3_can_access_pde64(pde64_t * pde, addr_t addr, pf_error_t access_type);
522 pt_access_status_t inline v3_can_access_pte64(pte64_t * pte, addr_t addr, pf_error_t access_type);
525 int v3_check_host_pt_32(v3_reg_t host_cr3, addr_t vaddr,
526 pf_error_t access_type, pt_access_status_t * access_status);
527 int v3_check_host_pt_32pae(v3_reg_t host_cr3, addr_t vaddr,
528 pf_error_t access_type, pt_access_status_t * access_status);
529 int v3_check_host_pt_64(v3_reg_t host_cr3, addr_t vaddr,
530 pf_error_t access_type, pt_access_status_t * access_status);
531 int v3_check_guest_pt_32(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
532 pf_error_t access_type, pt_access_status_t * access_status);
533 int v3_check_guest_pt_32pae(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
534 pf_error_t access_type, pt_access_status_t * access_status);
535 int v3_check_guest_pt_64(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
536 pf_error_t access_type, pt_access_status_t * access_status);
540 int v3_walk_host_pt_32(v3_reg_t host_cr3,
541 int (*callback)(int level, addr_t page_va, addr_t page_pa, void * private_data),
542 void * private_data);
544 int v3_walk_host_pt_32pae(v3_reg_t host_cr3,
545 void (*callback)(page_type_t type, addr_t page_va, addr_t page_pa, void * private_data),
546 void * private_data);
548 int v3_walk_host_pt_64(v3_reg_t host_cr3,
549 void (*callback)(page_type_t type, addr_t page_va, addr_t page_pa, void * private_data),
550 void * private_data);
554 pde32_t * create_passthrough_pts_32(struct guest_info * guest_info);
555 pdpe32pae_t * create_passthrough_pts_32PAE(struct guest_info * guest_info);
556 pml4e64_t * create_passthrough_pts_64(struct guest_info * info);
560 const uchar_t * v3_page_type_to_str(page_type_t type);
563 //#include <palacios/vm_guest.h>
565 void PrintDebugPageTables(pde32_t * pde);
568 void PrintPageTree(v3_vm_cpu_mode_t cpu_mode, addr_t virtual_addr, addr_t cr3);
569 void PrintPageTree_64(addr_t virtual_addr, pml4e64_t * pml);
572 void PrintPT32(addr_t starting_address, pte32_t * pte);
573 void PrintPD32(pde32_t * pde);
574 void PrintPTE32(addr_t virtual_address, pte32_t * pte);
575 void PrintPDE32(addr_t virtual_address, pde32_t * pde);
577 void PrintDebugPageTables32PAE(pdpe32pae_t * pde);
578 void PrintPTE32PAE(addr_t virtual_address, pte32pae_t * pte);
579 void PrintPDE32PAE(addr_t virtual_address, pde32pae_t * pde);
580 void PrintPTE64(addr_t virtual_address, pte64_t * pte);