2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm_types.h>
22 /* .... Giant fucking switch tables */
137 static int get_addr_width(struct guest_info * info, struct x86_instr * instr) {
139 switch (v3_get_vm_cpu_mode(info)) {
141 return (instr->prefixes.addr_size) ? 4 : 2;
147 if (info->segments.cs.db) {
148 return (instr->prefixes.addr_size) ? 2 : 4;
150 return (instr->prefixes.addr_size) ? 4 : 2;
153 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
158 static int get_operand_width(struct guest_info * info, struct x86_instr * instr,
258 switch (v3_get_vm_cpu_mode(info)) {
260 return (instr->prefixes.op_size) ? 4 : 2;
262 if (instr->prefixes.rex_op_size) {
270 if (info->segments.cs.db) {
272 return (instr->prefixes.op_size) ? 2 : 4;
274 return (instr->prefixes.op_size) ? 4 : 2;
277 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
282 switch (v3_get_vm_cpu_mode(info)) {
284 PrintError("Invalid instruction given operating mode (%d)\n", form);
293 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
299 switch (v3_get_vm_cpu_mode(info)) {
309 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
317 switch (v3_get_vm_cpu_mode(info)) {
327 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
334 PrintError("Unsupported instruction form %d\n", form);
344 typedef enum {INVALID_ADDR_TYPE, REG, DISP0, DISP8, DISP16, DISP32} modrm_mode_t;
345 typedef enum {INVALID_REG_SIZE, REG64, REG32, REG16, REG8} reg_size_t;
352 } __attribute__((packed));
359 } __attribute__((packed));
366 static inline int decode_gpr(struct guest_info * core,
368 struct x86_operand * reg) {
370 struct v3_gprs * gprs = &(core->vm_regs);
374 reg->operand = (addr_t)&(gprs->rax);
377 reg->operand = (addr_t)&(gprs->rcx);
380 reg->operand = (addr_t)&(gprs->rdx);
383 reg->operand = (addr_t)&(gprs->rbx);
386 if (reg->size == 1) {
387 reg->operand = (addr_t)&(gprs->rax) + 1;
389 reg->operand = (addr_t)&(gprs->rsp);
393 if (reg->size == 1) {
394 reg->operand = (addr_t)&(gprs->rcx) + 1;
396 reg->operand = (addr_t)&(gprs->rbp);
400 if (reg->size == 1) {
401 reg->operand = (addr_t)&(gprs->rdx) + 1;
403 reg->operand = (addr_t)&(gprs->rsi);
407 if (reg->size == 1) {
408 reg->operand = (addr_t)&(gprs->rbx) + 1;
410 reg->operand = (addr_t)&(gprs->rdi);
414 reg->operand = (addr_t)&(gprs->r8);
417 reg->operand = (addr_t)&(gprs->r9);
420 reg->operand = (addr_t)&(gprs->r10);
423 reg->operand = (addr_t)&(gprs->r11);
426 reg->operand = (addr_t)&(gprs->r12);
429 reg->operand = (addr_t)&(gprs->r13);
432 reg->operand = (addr_t)&(gprs->r14);
435 reg->operand = (addr_t)&(gprs->r15);
438 PrintError("Invalid Reg Code (%d)\n", reg_code);
449 static inline int decode_cr(struct guest_info * core,
451 struct x86_operand * reg) {
453 struct v3_ctrl_regs * crs = &(core->ctrl_regs);
455 // PrintDebug("\t Ctrl regs %d\n", reg_code);
459 reg->operand = (addr_t)&(crs->cr0);
462 reg->operand = (addr_t)&(crs->cr2);
465 reg->operand = (addr_t)&(crs->cr3);
468 reg->operand = (addr_t)&(crs->cr4);
472 PrintError("Invalid Reg Code (%d)\n", reg_code);
479 // This converts the displacement into the appropriate masked value
481 QUESTION: Are the register Values signed ?????
483 #define MASK_DISPLACEMENT(reg, mode) ({ \
485 if (mode == DISP8) { \
486 val = (sint8_t)(reg & 0xff); \
487 } else if (mode == DISP16) { \
488 val = (sint16_t)(reg & 0xffff); \
489 } else if (mode == DISP32) { \
490 val = (sint32_t)(reg & 0xffffffff); \
492 PrintError("Error invalid displacement size (%d)\n", mode); \
499 #define ADDR_MASK(val, length) ({ \
500 ullong_t mask = 0x0LL; \
503 mask = 0x00000000000fffffLL; \
506 mask = 0x00000000ffffffffLL; \
509 mask = 0xffffffffffffffffLL; \
517 static int decode_rm_operand16(struct guest_info * core,
518 uint8_t * modrm_instr,
519 struct x86_instr * instr,
520 struct x86_operand * operand,
521 uint8_t * reg_code) {
523 struct v3_gprs * gprs = &(core->vm_regs);
524 struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
525 addr_t base_addr = 0;
526 modrm_mode_t mod_mode = 0;
527 uint8_t * instr_cursor = modrm_instr;
529 // PrintDebug("ModRM mod=%d\n", modrm->mod);
531 *reg_code = modrm->reg;
535 if (modrm->mod == 3) {
536 //PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
537 operand->type = REG_OPERAND;
539 decode_gpr(core, modrm->rm, operand);
542 struct v3_segment * seg = NULL;
544 operand->type = MEM_OPERAND;
546 if (modrm->mod == 0) {
548 } else if (modrm->mod == 1) {
550 } else if (modrm->mod == 2) {
553 PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
554 v3_print_instr(instr);
560 base_addr = gprs->rbx + ADDR_MASK(gprs->rsi, 2);
563 base_addr = gprs->rbx + ADDR_MASK(gprs->rdi, 2);
566 base_addr = gprs->rbp + ADDR_MASK(gprs->rsi, 2);
569 base_addr = gprs->rbp + ADDR_MASK(gprs->rdi, 2);
572 base_addr = ADDR_MASK(gprs->rsi, 2);
575 base_addr = ADDR_MASK(gprs->rdi, 2);
578 if (modrm->mod == 0) {
582 base_addr = ADDR_MASK(gprs->rbp, 2);
586 base_addr = ADDR_MASK(gprs->rbx, 2);
592 if (mod_mode == DISP8) {
593 base_addr += *(sint8_t *)instr_cursor;
595 } else if (mod_mode == DISP16) {
596 base_addr += *(sint16_t *)instr_cursor;
601 // get appropriate segment
602 if (instr->prefixes.cs_override) {
603 seg = &(core->segments.cs);
604 } else if (instr->prefixes.es_override) {
605 seg = &(core->segments.es);
606 } else if (instr->prefixes.ss_override) {
607 seg = &(core->segments.ss);
608 } else if (instr->prefixes.fs_override) {
609 seg = &(core->segments.fs);
610 } else if (instr->prefixes.gs_override) {
611 seg = &(core->segments.gs);
613 seg = &(core->segments.ds);
616 operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
617 get_addr_width(core, instr));
621 return (instr_cursor - modrm_instr);
625 // returns num_bytes parsed
626 static int decode_rm_operand32(struct guest_info * core,
627 uint8_t * modrm_instr,
628 struct x86_instr * instr,
629 struct x86_operand * operand,
630 uint8_t * reg_code) {
632 struct v3_gprs * gprs = &(core->vm_regs);
633 uint8_t * instr_cursor = modrm_instr;
634 struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
635 addr_t base_addr = 0;
636 modrm_mode_t mod_mode = 0;
637 uint_t has_sib_byte = 0;
640 *reg_code = modrm->reg;
644 if (modrm->mod == 3) {
645 operand->type = REG_OPERAND;
646 // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
648 decode_gpr(core, modrm->rm, operand);
651 struct v3_segment * seg = NULL;
653 operand->type = MEM_OPERAND;
655 if (modrm->mod == 0) {
657 } else if (modrm->mod == 1) {
659 } else if (modrm->mod == 2) {
662 PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
663 v3_print_instr(instr);
669 base_addr = gprs->rax;
672 base_addr = gprs->rcx;
675 base_addr = gprs->rdx;
678 base_addr = gprs->rbx;
684 if (modrm->mod == 0) {
688 base_addr = gprs->rbp;
692 base_addr = gprs->rsi;
695 base_addr = gprs->rdi;
701 struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
702 int scale = 0x1 << sib->scale;
706 switch (sib->index) {
708 base_addr = gprs->rax;
711 base_addr = gprs->rcx;
714 base_addr = gprs->rdx;
717 base_addr = gprs->rbx;
723 base_addr = gprs->rbp;
726 base_addr = gprs->rsi;
729 base_addr = gprs->rdi;
738 base_addr += MASK_DISPLACEMENT(gprs->rax, mod_mode);
741 base_addr += MASK_DISPLACEMENT(gprs->rcx, mod_mode);
744 base_addr += MASK_DISPLACEMENT(gprs->rdx, mod_mode);
747 base_addr += MASK_DISPLACEMENT(gprs->rbx, mod_mode);
750 base_addr += MASK_DISPLACEMENT(gprs->rsp, mod_mode);
753 if (modrm->mod != 0) {
754 base_addr += MASK_DISPLACEMENT(gprs->rbp, mod_mode);
758 base_addr += MASK_DISPLACEMENT(gprs->rsi, mod_mode);
761 base_addr += MASK_DISPLACEMENT(gprs->rdi, mod_mode);
768 if (mod_mode == DISP8) {
769 base_addr += *(sint8_t *)instr_cursor;
771 } else if (mod_mode == DISP32) {
772 base_addr += *(sint32_t *)instr_cursor;
776 // get appropriate segment
777 if (instr->prefixes.cs_override) {
778 seg = &(core->segments.cs);
779 } else if (instr->prefixes.es_override) {
780 seg = &(core->segments.es);
781 } else if (instr->prefixes.ss_override) {
782 seg = &(core->segments.ss);
783 } else if (instr->prefixes.fs_override) {
784 seg = &(core->segments.fs);
785 } else if (instr->prefixes.gs_override) {
786 seg = &(core->segments.gs);
788 seg = &(core->segments.ds);
791 operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
792 get_addr_width(core, instr));
796 return (instr_cursor - modrm_instr);
800 int decode_rm_operand64(struct guest_info * core, uint8_t * modrm_instr,
801 struct x86_instr * instr, struct x86_operand * operand,
802 uint8_t * reg_code) {
804 struct v3_gprs * gprs = &(core->vm_regs);
805 uint8_t * instr_cursor = modrm_instr;
806 struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
807 addr_t base_addr = 0;
808 modrm_mode_t mod_mode = 0;
809 uint_t has_sib_byte = 0;
814 *reg_code = modrm->reg;
815 *reg_code |= (instr->prefixes.rex_reg << 3);
817 if (modrm->mod == 3) {
818 uint8_t rm_val = modrm->rm;
820 rm_val |= (instr->prefixes.rex_rm << 3);
822 operand->type = REG_OPERAND;
823 // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
825 decode_gpr(core, rm_val, operand);
827 struct v3_segment * seg = NULL;
828 uint8_t rm_val = modrm->rm;
830 operand->type = MEM_OPERAND;
833 if (modrm->mod == 0) {
835 } else if (modrm->mod == 1) {
837 } else if (modrm->mod == 2) {
840 PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
841 v3_print_instr(instr);
848 rm_val |= (instr->prefixes.rex_rm << 3);
852 base_addr = gprs->rax;
855 base_addr = gprs->rcx;
858 base_addr = gprs->rdx;
861 base_addr = gprs->rbx;
864 if (modrm->mod == 0) {
868 base_addr = gprs->rbp;
872 base_addr = gprs->rsi;
875 base_addr = gprs->rdi;
878 base_addr = gprs->r8;
881 base_addr = gprs->r9;
884 base_addr = gprs->r10;
887 base_addr = gprs->r11;
890 base_addr = gprs->r12;
893 base_addr = gprs->r13;
896 base_addr = gprs->r14;
899 base_addr = gprs->r15;
908 struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
909 int scale = 0x1 << sib->scale;
910 uint8_t index_val = sib->index;
911 uint8_t base_val = sib->base;
913 index_val |= (instr->prefixes.rex_sib_idx << 3);
914 base_val |= (instr->prefixes.rex_rm << 3);
920 base_addr = gprs->rax;
923 base_addr = gprs->rcx;
926 base_addr = gprs->rdx;
929 base_addr = gprs->rbx;
935 base_addr = gprs->rbp;
938 base_addr = gprs->rsi;
941 base_addr = gprs->rdi;
944 base_addr = gprs->r8;
947 base_addr = gprs->r9;
950 base_addr = gprs->r10;
953 base_addr = gprs->r11;
956 base_addr = gprs->r12;
959 base_addr = gprs->r13;
962 base_addr = gprs->r14;
965 base_addr = gprs->r15;
974 base_addr += MASK_DISPLACEMENT(gprs->rax, mod_mode);
977 base_addr += MASK_DISPLACEMENT(gprs->rcx, mod_mode);
980 base_addr += MASK_DISPLACEMENT(gprs->rdx, mod_mode);
983 base_addr += MASK_DISPLACEMENT(gprs->rbx, mod_mode);
986 base_addr += MASK_DISPLACEMENT(gprs->rsp, mod_mode);
989 if (modrm->mod != 0) {
990 base_addr += MASK_DISPLACEMENT(gprs->rbp, mod_mode);
994 base_addr += MASK_DISPLACEMENT(gprs->rsi, mod_mode);
997 base_addr += MASK_DISPLACEMENT(gprs->rdi, mod_mode);
1000 base_addr += MASK_DISPLACEMENT(gprs->r8, mod_mode);
1003 base_addr += MASK_DISPLACEMENT(gprs->r9, mod_mode);
1006 base_addr += MASK_DISPLACEMENT(gprs->r10, mod_mode);
1009 base_addr += MASK_DISPLACEMENT(gprs->r11, mod_mode);
1012 base_addr += MASK_DISPLACEMENT(gprs->r12, mod_mode);
1015 base_addr += MASK_DISPLACEMENT(gprs->r13, mod_mode);
1018 base_addr += MASK_DISPLACEMENT(gprs->r14, mod_mode);
1021 base_addr += MASK_DISPLACEMENT(gprs->r15, mod_mode);
1028 if (mod_mode == DISP8) {
1029 base_addr += *(sint8_t *)instr_cursor;
1031 } else if (mod_mode == DISP32) {
1032 base_addr += *(sint32_t *)instr_cursor;
1038 Segments should be ignored
1039 // get appropriate segment
1040 if (instr->prefixes.cs_override) {
1041 seg = &(core->segments.cs);
1042 } else if (instr->prefixes.es_override) {
1043 seg = &(core->segments.es);
1044 } else if (instr->prefixes.ss_override) {
1045 seg = &(core->segments.ss);
1046 } else if (instr->prefixes.fs_override) {
1047 seg = &(core->segments.fs);
1048 } else if (instr->prefixes.gs_override) {
1049 seg = &(core->segments.gs);
1051 seg = &(core->segments.ds);
1055 operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
1056 get_addr_width(core, instr));
1060 return (instr_cursor - modrm_instr);
1066 static int decode_rm_operand(struct guest_info * core,
1067 uint8_t * instr_ptr, // input
1069 struct x86_instr * instr,
1070 struct x86_operand * operand,
1071 uint8_t * reg_code) {
1073 v3_cpu_mode_t mode = v3_get_vm_cpu_mode(core);
1075 operand->size = get_operand_width(core, instr, form);
1079 return decode_rm_operand16(core, instr_ptr, instr, operand, reg_code);
1081 if (instr->prefixes.rex_op_size) {
1082 return decode_rm_operand64(core, instr_ptr, instr, operand, reg_code);
1086 case LONG_32_COMPAT:
1087 return decode_rm_operand32(core, instr_ptr, instr, operand, reg_code);
1089 PrintError("Invalid CPU_MODE (%d)\n", mode);
1096 static inline op_form_t op_code_to_form_0f(uint8_t * instr, int * length) {
1101 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[2]);
1103 switch (modrm->reg) {
1111 return INVALID_INSTR;
1172 return INVALID_INSTR;
1177 static op_form_t op_code_to_form(uint8_t * instr, int * length) {
1201 return op_code_to_form_0f(instr, length);
1241 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1243 switch (modrm->reg) {
1257 return INVALID_INSTR;
1261 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1263 switch (modrm->reg) {
1277 return INVALID_INSTR;
1281 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1283 switch (modrm->reg) {
1285 return ADD_IMM2SX_8;
1289 return ADC_IMM2SX_8;
1291 return AND_IMM2SX_8;
1293 return SUB_IMM2SX_8;
1295 return XOR_IMM2SX_8;
1297 return INVALID_INSTR;
1326 return MOV_MEM2AL_8;
1330 return MOV_AL2MEM_8;
1354 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1356 switch (modrm->reg) {
1362 return INVALID_INSTR;
1366 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1368 switch (modrm->reg) {
1374 return INVALID_INSTR;
1380 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1382 switch (modrm->reg) {
1388 return INVALID_INSTR;
1393 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1395 switch (modrm->reg) {
1401 return INVALID_INSTR;
1406 return INVALID_INSTR;
1412 static char * op_form_to_str(op_form_t form) {
1415 case LMSW: return "LMSW";
1416 case SMSW: return "SMSW";
1417 case CLTS: return "CLTS";
1418 case INVLPG: return "INVLPG";
1419 case MOV_CR2: return "MOV_CR2";
1420 case MOV_2CR: return "MOV_2CR";
1421 case MOV_DR2: return "MOV_DR2";
1422 case MOV_2DR: return "MOV_2DR";
1423 case MOV_SR2: return "MOV_SR2";
1424 case MOV_2SR: return "MOV_2SR";
1425 case MOV_MEM2_8: return "MOV_MEM2_8";
1426 case MOV_MEM2: return "MOV_MEM2";
1427 case MOV_2MEM_8: return "MOV_2MEM_8";
1428 case MOV_2MEM: return "MOV_2MEM";
1429 case MOV_MEM2AL_8: return "MOV_MEM2AL_8";
1430 case MOV_MEM2AX: return "MOV_MEM2AX";
1431 case MOV_AL2MEM_8: return "MOV_AL2MEM_8";
1432 case MOV_AX2MEM: return "MOV_AX2MEM";
1433 case MOV_IMM2_8: return "MOV_IMM2_8";
1434 case MOV_IMM2: return "MOV_IMM2";
1435 case MOVS_8: return "MOVS_8";
1436 case MOVS: return "MOVS";
1437 case MOVSX_8: return "MOVSX_8";
1438 case MOVSX: return "MOVSX";
1439 case MOVZX_8: return "MOVZX_8";
1440 case MOVZX: return "MOVZX";
1441 case HLT: return "HLT";
1442 case PUSHF: return "PUSHF";
1443 case POPF: return "POPF";
1444 case ADC_2MEM_8: return "ADC_2MEM_8";
1445 case ADC_2MEM: return "ADC_2MEM";
1446 case ADC_MEM2_8: return "ADC_MEM2_8";
1447 case ADC_MEM2: return "ADC_MEM2";
1448 case ADC_IMM2_8: return "ADC_IMM2_8";
1449 case ADC_IMM2: return "ADC_IMM2";
1450 case ADC_IMM2SX_8: return "ADC_IMM2SX_8";
1451 case ADD_IMM2_8: return "ADD_IMM2_8";
1452 case ADD_IMM2: return "ADD_IMM2";
1453 case ADD_IMM2SX_8: return "ADD_IMM2SX_8";
1454 case ADD_2MEM_8: return "ADD_2MEM_8";
1455 case ADD_2MEM: return "ADD_2MEM";
1456 case ADD_MEM2_8: return "ADD_MEM2_8";
1457 case ADD_MEM2: return "ADD_MEM2";
1458 case AND_MEM2_8: return "AND_MEM2_8";
1459 case AND_MEM2: return "AND_MEM2";
1460 case AND_2MEM_8: return "AND_2MEM_8";
1461 case AND_2MEM: return "AND_2MEM";
1462 case AND_IMM2_8: return "AND_IMM2_8";
1463 case AND_IMM2: return "AND_IMM2";
1464 case AND_IMM2SX_8: return "AND_IMM2SX_8";
1465 case OR_2MEM_8: return "OR_2MEM_8";
1466 case OR_2MEM: return "OR_2MEM";
1467 case OR_MEM2_8: return "OR_MEM2_8";
1468 case OR_MEM2: return "OR_MEM2";
1469 case OR_IMM2_8: return "OR_IMM2_8";
1470 case OR_IMM2: return "OR_IMM2";
1471 case OR_IMM2SX_8: return "OR_IMM2SX_8";
1472 case SUB_2MEM_8: return "SUB_2MEM_8";
1473 case SUB_2MEM: return "SUB_2MEM";
1474 case SUB_MEM2_8: return "SUB_MEM2_8";
1475 case SUB_MEM2: return "SUB_MEM2";
1476 case SUB_IMM2_8: return "SUB_IMM2_8";
1477 case SUB_IMM2: return "SUB_IMM2";
1478 case SUB_IMM2SX_8: return "SUB_IMM2SX_8";
1479 case XOR_2MEM_8: return "XOR_2MEM_8";
1480 case XOR_2MEM: return "XOR_2MEM";
1481 case XOR_MEM2_8: return "XOR_MEM2_8";
1482 case XOR_MEM2: return "XOR_MEM2";
1483 case XOR_IMM2_8: return "XOR_IMM2_8";
1484 case XOR_IMM2: return "XOR_IMM2";
1485 case XOR_IMM2SX_8: return "XOR_IMM2SX_8";
1486 case INC_8: return "INC_8";
1487 case INC: return "INC";
1488 case DEC_8: return "DEC_8";
1489 case DEC: return "DEC";
1490 case NEG_8: return "NEG_8";
1491 case NEG: return "NEG";
1492 case NOT_8: return "NOT_8";
1493 case NOT: return "NOT";
1494 case XCHG_8: return "XCHG_8";
1495 case XCHG: return "XCHG";
1496 case SETB: return "SETB";
1497 case SETBE: return "SETBE";
1498 case SETL: return "SETL";
1499 case SETLE: return "SETLE";
1500 case SETNB: return "SETNB";
1501 case SETNBE: return "SETNBE";
1502 case SETNL: return "SETNL";
1503 case SETNLE: return "SETNLE";
1504 case SETNO: return "SETNO";
1505 case SETNP: return "SETNP";
1506 case SETNS: return "SETNS";
1507 case SETNZ: return "SETNZ";
1508 case SETP: return "SETP";
1509 case SETS: return "SETS";
1510 case SETZ: return "SETZ";
1511 case SETO: return "SETO";
1512 case STOS_8: return "STOS_8";
1513 case STOS: return "STOS";
1517 return "INVALID_INSTR";