3 * This file is part of the Palacios Virtual Machine Monitor developed
4 * by the V3VEE Project with funding from the United States National
5 * Science Foundation and the Department of Energy.
7 * The V3VEE Project is a joint project between Northwestern University
8 * and the University of New Mexico. You can find out more at
11 * Copyright (c) 2008, Peter Dinda <pdinda@northwestern.edu>
12 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
13 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
14 * All rights reserved.
16 * Author: Peter Dinda <pdinda@northwestern.edu>
17 * Jack Lange <jarusl@cs.northwestern.edu>
19 * This is free software. You are permitted to use,
20 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
32 #include <palacios/vmm_types.h>
35 /* 16 bit guest state */
36 #define VMCS_GUEST_ES_SELECTOR 0x00000800
37 #define VMCS_GUEST_CS_SELECTOR 0x00000802
38 #define VMCS_GUEST_SS_SELECTOR 0x00000804
39 #define VMCS_GUEST_DS_SELECTOR 0x00000806
40 #define VMCS_GUEST_FS_SELECTOR 0x00000808
41 #define VMCS_GUEST_GS_SELECTOR 0x0000080A
42 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C
43 #define VMCS_GUEST_TR_SELECTOR 0x0000080E
45 /* 16 bit host state */
46 #define VMCS_HOST_ES_SELECTOR 0x00000C00
47 #define VMCS_HOST_CS_SELECTOR 0x00000C02
48 #define VMCS_HOST_SS_SELECTOR 0x00000C04
49 #define VMCS_HOST_DS_SELECTOR 0x00000C06
50 #define VMCS_HOST_FS_SELECTOR 0x00000C08
51 #define VMCS_HOST_GS_SELECTOR 0x00000C0A
52 #define VMCS_HOST_TR_SELECTOR 0x00000C0C
54 /* 64 bit control fields */
55 #define IO_BITMAP_A_ADDR 0x00002000
56 #define IO_BITMAP_A_ADDR_HIGH 0x00002001
57 #define IO_BITMAP_B_ADDR 0x00002002
58 #define IO_BITMAP_B_ADDR_HIGH 0x00002003
59 // Only with "Use MSR Bitmaps" enabled
60 #define MSR_BITMAPS 0x00002004
61 #define MSR_BITMAPS_HIGH 0x00002005
63 #define VM_EXIT_MSR_STORE_ADDR 0x00002006
64 #define VM_EXIT_MSR_STORE_ADDR_HIGH 0x00002007
65 #define VM_EXIT_MSR_LOAD_ADDR 0x00002008
66 #define VM_EXIT_MSR_LOAD_ADDR_HIGH 0x00002009
67 #define VM_ENTRY_MSR_LOAD_ADDR 0x0000200A
68 #define VM_ENTRY_MSR_LOAD_ADDR_HIGH 0x0000200B
69 #define VMCS_EXEC_PTR 0x0000200C
70 #define VMCS_EXEC_PTR_HIGH 0x0000200D
71 #define TSC_OFFSET 0x00002010
72 #define TSC_OFFSET_HIGH 0x00002011
73 // Only with "Use TPR Shadow" enabled
74 #define VIRT_APIC_PAGE_ADDR 0x00002012
75 #define VIRT_APIC_PAGE_ADDR_HIGH 0x00002013
79 /* 64 bit guest state fields */
80 #define VMCS_LINK_PTR 0x00002800
81 #define VMCS_LINK_PTR_HIGH 0x00002801
82 #define GUEST_IA32_DEBUGCTL 0x00002802
83 #define GUEST_IA32_DEBUGCTL_HIGH 0x00002803
86 /* 32 bit control fields */
87 #define PIN_VM_EXEC_CTRLS 0x00004000
88 #define PROC_VM_EXEC_CTRLS 0x00004002
89 #define EXCEPTION_BITMAP 0x00004004
90 #define PAGE_FAULT_ERROR_MASK 0x00004006
91 #define PAGE_FAULT_ERROR_MATCH 0x00004008
92 #define CR3_TARGET_COUNT 0x0000400A
93 #define VM_EXIT_CTRLS 0x0000400C
94 #define VM_EXIT_MSR_STORE_COUNT 0x0000400E
95 #define VM_EXIT_MSR_LOAD_COUNT 0x00004010
96 #define VM_ENTRY_CTRLS 0x00004012
97 #define VM_ENTRY_MSR_LOAD_COUNT 0x00004014
98 #define VM_ENTRY_INT_INFO_FIELD 0x00004016
99 #define VM_ENTRY_EXCEPTION_ERROR 0x00004018
100 #define VM_ENTRY_INSTR_LENGTH 0x0000401A
101 // Only with "Use TPR Shadow" Enabled
102 #define TPR_THRESHOLD 0x0000401C
106 /* 32 bit Read Only data fields */
107 #define VM_INSTR_ERROR 0x00004400
108 #define EXIT_REASON 0x00004402
109 #define VM_EXIT_INT_INFO 0x00004404
110 #define VM_EXIT_INT_ERROR 0x00004406
111 #define IDT_VECTOR_INFO 0x00004408
112 #define IDT_VECTOR_ERROR 0x0000440A
113 #define VM_EXIT_INSTR_LENGTH 0x0000440C
114 #define VMX_INSTR_INFO 0x0000440E
116 /* 32 bit Guest state fields */
117 #define GUEST_ES_LIMIT 0x00004800
118 #define GUEST_CS_LIMIT 0x00004802
119 #define GUEST_SS_LIMIT 0x00004804
120 #define GUEST_DS_LIMIT 0x00004806
121 #define GUEST_FS_LIMIT 0x00004808
122 #define GUEST_GS_LIMIT 0x0000480A
123 #define GUEST_LDTR_LIMIT 0x0000480C
124 #define GUEST_TR_LIMIT 0x0000480E
125 #define GUEST_GDTR_LIMIT 0x00004810
126 #define GUEST_IDTR_LIMIT 0x00004812
127 #define GUEST_ES_ACCESS 0x00004814
128 #define GUEST_CS_ACCESS 0x00004816
129 #define GUEST_SS_ACCESS 0x00004818
130 #define GUEST_DS_ACCESS 0x0000481A
131 #define GUEST_FS_ACCESS 0x0000481C
132 #define GUEST_GS_ACCESS 0x0000481E
133 #define GUEST_LDTR_ACCESS 0x00004820
134 #define GUEST_TR_ACCESS 0x00004822
135 #define GUEST_INT_STATE 0x00004824
136 #define GUEST_ACTIVITY_STATE 0x00004826
137 #define GUEST_SMBASE 0x00004828
138 #define GUEST_IA32_SYSENTER_CS 0x0000482A
141 /* 32 bit host state field */
142 #define HOST_IA32_SYSENTER_CS 0x00004C00
144 /* Natural Width Control Fields */
145 #define CR0_GUEST_HOST_MASK 0x00006000
146 #define CR4_GUEST_HOST_MASK 0x00006002
147 #define CR0_READ_SHADOW 0x00006004
148 #define CR4_READ_SHADOW 0x00006006
149 #define CR3_TARGET_VALUE_0 0x00006008
150 #define CR3_TARGET_VALUE_1 0x0000600A
151 #define CR3_TARGET_VALUE_2 0x0000600C
152 #define CR3_TARGET_VALUE_3 0x0000600E
155 /* Natural Width Read Only Fields */
156 #define EXIT_QUALIFICATION 0x00006400
157 #define IO_RCX 0x00006402
158 #define IO_RSI 0x00006404
159 #define IO_RDI 0x00006406
160 #define IO_RIP 0x00006408
161 #define GUEST_LINEAR_ADDR 0x0000640A
163 /* Natural Width Guest State Fields */
164 #define GUEST_CR0 0x00006800
165 #define GUEST_CR3 0x00006802
166 #define GUEST_CR4 0x00006804
167 #define GUEST_ES_BASE 0x00006806
168 #define GUEST_CS_BASE 0x00006808
169 #define GUEST_SS_BASE 0x0000680A
170 #define GUEST_DS_BASE 0x0000680C
171 #define GUEST_FS_BASE 0x0000680E
172 #define GUEST_GS_BASE 0x00006810
173 #define GUEST_LDTR_BASE 0x00006812
174 #define GUEST_TR_BASE 0x00006814
175 #define GUEST_GDTR_BASE 0x00006816
176 #define GUEST_IDTR_BASE 0x00006818
177 #define GUEST_DR7 0x0000681A
178 #define GUEST_RSP 0x0000681C
179 #define GUEST_RIP 0x0000681E
180 #define GUEST_RFLAGS 0x00006820
181 #define GUEST_PENDING_DEBUG_EXCS 0x00006822
182 #define GUEST_IA32_SYSENTER_ESP 0x00006824
183 #define GUEST_IA32_SYSENTER_EIP 0x00006826
186 /* Natural Width Host State Fields */
187 #define HOST_CR0 0x00006C00
188 #define HOST_CR3 0x00006C02
189 #define HOST_CR4 0x00006C04
190 #define HOST_FS_BASE 0x00006C06
191 #define HOST_GS_BASE 0x00006C08
192 #define HOST_TR_BASE 0x00006C0A
193 #define HOST_GDTR_BASE 0x00006C0C
194 #define HOST_IDTR_BASE 0x00006C0E
195 #define HOST_IA32_SYSENTER_ESP 0x00006C10
196 #define HOST_IA32_SYSENTER_EIP 0x00006C12
197 #define HOST_RSP 0x00006C14
198 #define HOST_RIP 0x00006C16
200 /* Pin Based VM Execution Controls */
201 /* INTEL MANUAL: 20-10 vol 3B */
202 #define EXTERNAL_INTERRUPT_EXITING 0x00000001
203 #define NMI_EXITING 0x00000008
204 #define VIRTUAL_NMIS 0x00000020
207 /* Processor Based VM Execution Controls */
208 /* INTEL MANUAL: 20-11 vol. 3B */
209 #define INTERRUPT_WINDOWS_EXIT 0x00000004
210 #define USE_TSC_OFFSETTING 0x00000008
211 #define HLT_EXITING 0x00000080
212 #define INVLPG_EXITING 0x00000200
213 #define MWAIT_EXITING 0x00000400
214 #define RDPMC_EXITING 0x00000800
215 #define RDTSC_EXITING 0x00001000
216 #define CR8_LOAD_EXITING 0x00080000
217 #define CR8_STORE_EXITING 0x00100000
218 #define USE_TPR_SHADOW 0x00200000
219 #define NMI_WINDOW_EXITING 0x00400000
220 #define MOVDR_EXITING 0x00800000
221 #define UNCONDITION_IO_EXITING 0x01000000
222 #define USE_IO_BITMAPS 0x02000000
223 #define USE_MSR_BITMAPS 0x10000000
224 #define MONITOR_EXITING 0x20000000
225 #define PAUSE_EXITING 0x40000000
227 /* VM-Exit Controls */
228 /* INTEL MANUAL: 20-16 vol. 3B */
229 #define HOST_ADDR_SPACE_SIZE 0x00000200
230 #define ACK_IRQ_ON_EXIT 0x00008000
233 #define VM_EXIT_REASON_INFO_EXCEPTION_OR_NMI 0
234 #define VM_EXIT_REASON_EXTERNAL_INTR 1
235 #define VM_EXIT_REASON_TRIPLE_FAULT 2
236 #define VM_EXIT_REASON_INIT_SIGNAL 3
237 #define VM_EXIT_REASON_STARTUP_IPI 4
238 #define VM_EXIT_REASON_IO_SMI 5
239 #define VM_EXIT_REASON_OTHER_SMI 6
240 #define VM_EXIT_REASON_INTR_WINDOW 7
241 #define VM_EXIT_REASON_NMI_WINDOW 8
242 #define VM_EXIT_REASON_TASK_SWITCH 9
243 #define VM_EXIT_REASON_CPUID 10
244 #define VM_EXIT_REASON_HLT 12
245 #define VM_EXIT_REASON_INVD 13
246 #define VM_EXIT_REASON_INVLPG 14
247 #define VM_EXIT_REASON_RDPMC 15
248 #define VM_EXIT_REASON_RDTSC 16
249 #define VM_EXIT_REASON_RSM 17
250 #define VM_EXIT_REASON_VMCALL 18
251 #define VM_EXIT_REASON_VMCLEAR 19
252 #define VM_EXIT_REASON_VMLAUNCH 20
253 #define VM_EXIT_REASON_VMPTRLD 21
254 #define VM_EXIT_REASON_VMPTRST 22
255 #define VM_EXIT_REASON_VMREAD 23
256 #define VM_EXIT_REASON_VMRESUME 24
257 #define VM_EXIT_REASON_VMWRITE 25
258 #define VM_EXIT_REASON_VMXOFF 26
259 #define VM_EXIT_REASON_VMXON 27
260 #define VM_EXIT_REASON_CR_REG_ACCESSES 28
261 #define VM_EXIT_REASON_MOV_DR 29
262 #define VM_EXIT_REASON_IO_INSTR 30
263 #define VM_EXIT_REASON_RDMSR 31
264 #define VM_EXIT_REASON_WRMSR 32
265 #define VM_EXIT_REASON_ENTRY_FAIL_INVALID_GUEST_STATE 33
266 #define VM_EXIT_REASON_ENTRY_FAIL_MSR_LOAD 34
267 #define VM_EXIT_REASON_MWAIT 36
268 #define VM_EXIT_REASON_MONITOR 39
269 #define VM_EXIT_REASON_PAUSE 40
270 #define VM_EXIT_REASON_ENTRY_FAILURE_MACHINE_CHECK 41
271 #define VM_EXIT_REASON_TPR_BELOW_THRESHOLD 43
274 extern char *exception_names[];
275 extern char *exception_type_names[];
285 /* VMCS Exit QUALIFICATIONs */
286 struct VMExitIOQual {
287 uint_t accessSize : 3; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
288 uint_t dir : 1; // (0: Out ;; 1: In)
289 uint_t string : 1; // (0: not string ;; 1: string)
290 uint_t REP : 1; // (0: not REP ;; 1: REP)
291 uint_t opEnc : 1; // (0: DX ;; 1: immediate)
292 uint_t rsvd : 9; // Set to 0
293 uint_t port : 16; // IO Port Number
294 } __attribute__((packed));
298 struct VMExitDBGQual {
299 uint_t B0 : 1; // Breakpoint 0 condition met
300 uint_t B1 : 1; // Breakpoint 1 condition met
301 uint_t B2 : 1; // Breakpoint 2 condition met
302 uint_t B3 : 1; // Breakpoint 3 condition met
303 uint_t rsvd : 9; // reserved to 0
304 uint_t BD : 1; // detected DBG reg access
305 uint_t BS : 1; // cause either single instr or taken branch
306 } __attribute__((packed));
309 struct VMExitTSQual {
310 uint_t selector : 16; // selector of destination TSS
311 uint_t rsvd : 14; // reserved to 0
312 uint_t src : 2; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
313 } __attribute__((packed));
315 struct VMExitCRQual {
316 uint_t crID : 4; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
317 uint_t accessType : 2; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
318 uint_t lmswOpType : 1; // (0: register ; 1: memory)
319 uint_t rsvd1 : 1; // reserved to 0
320 uint_t gpr : 4; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
321 uint_t rsvd2 : 4; // reserved to 0
322 uint_t lmswSrc : 16; // src data for lmsw
323 } __attribute__((packed));
325 struct VMExitMovDRQual {
326 uint_t regID : 3; // debug register number
327 uint_t rsvd1 : 1; // reserved to 0
328 uint_t dir : 1; // (0: MOV to DR , 1: MOV from DR)
329 uint_t rsvd2 : 3; // reserved to 0
330 uint_t gpr : 4; // (0:RAX, 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
331 } __attribute__((packed));
333 /* End Exit Qualifications */
335 /* Exit Vector Info */
336 struct VMExitIntInfo {
337 uint_t nr : 8; // IRQ number, exception vector, NMI = 2
338 uint_t type : 3; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
339 uint_t errorCode : 1; // 1: error Code present
340 uint_t iret : 1; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
341 uint_t rsvd : 18; // always 0
342 uint_t valid : 1; // always 1 if valid
343 } __attribute__((packed));
348 /* End Exit Vector Info */
353 /* Segment Selector Access Rights (32 bits) */
354 /* INTEL Manual: 20-4 vol 3B */
363 uint_t L : 1; // CS only (64 bit active), reserved otherwise
365 uint_t granularity : 1;
368 } __attribute__((packed)) as_fields;
370 } __attribute__((packed));
375 union SegAccess access;
377 uint_t baseAddr ; // should be 64 bits?
382 struct VMCSGuestStateArea {
383 /* (1) Guest State Area */
384 /* (1.1) Guest Register State */
385 uint_t cr0 ; // should be 64 bits?
386 uint_t cr3 ; // should be 64 bits?
387 uint_t cr4 ; // should be 64 bits?
388 uint_t dr7 ; // should be 64 bits?
389 uint_t rsp ; // should be 64 bits?
390 uint_t rip ; // should be 64 bits?
391 uint_t rflags ; // should be 64 bits?
394 struct VMCSSegment cs ;
395 struct VMCSSegment ss ;
396 struct VMCSSegment ds ;
397 struct VMCSSegment es ;
398 struct VMCSSegment fs ;
399 struct VMCSSegment gs ;
400 struct VMCSSegment ldtr ;
401 struct VMCSSegment tr ;
403 struct VMCSSegment gdtr ;
404 struct VMCSSegment idtr ;
409 ullong_t sysenter_esp ; // should be 64 bits?
410 ullong_t sysenter_eip ; // should be 64 bits?
414 /* (1.2) Guest Non-register State */
415 uint_t activity ; /* (0=Active, 1=HLT, 2=Shutdown, 3=Wait-for-SIPI)
416 (listed in MSR: IA32_VMX_MISC) */
418 uint_t interrupt_state ; // see Table 20-3 (page 20-6) INTEL MANUAL 3B
420 ullong_t pending_dbg_exceptions ; // should be 64 bits?
421 /* Table 20-4 page 20-8 INTEL MANUAL 3B */
423 ullong_t vmcs_link ; // should be set to 0xffffffff_ffffffff
427 int CopyOutVMCSGuestStateArea(struct VMCSGuestStateArea * p);
428 int CopyInVMCSGuestStateArea(struct VMCSGuestStateArea * p);
432 struct VMCSHostStateArea {
433 /* (2) Host State Area */
434 ullong_t cr0 ; // Should be 64 bits?
435 ullong_t cr3 ; // should be 64 bits?
436 ullong_t cr4 ; // should be 64 bits?
437 ullong_t rsp ; // should be 64 bits?
438 ullong_t rip ; // should be 64 bits?
440 ushort_t csSelector ;
441 ushort_t ssSelector ;
442 ushort_t dsSelector ;
443 ushort_t esSelector ;
444 ushort_t fsSelector ;
445 ushort_t gsSelector ;
446 ushort_t trSelector ;
448 ullong_t fsBaseAddr ; // Should be 64 bits?
449 ullong_t gsBaseAddr ; // Should be 64 bits?
450 ullong_t trBaseAddr ; // Should be 64 bits?
451 ullong_t gdtrBaseAddr ; // Should be 64 bits?
452 ullong_t idtrBaseAddr ; // Should be 64 bits?
457 ullong_t sysenter_esp ; // Should be 64 bits?
458 ullong_t sysenter_eip ; // Should be 64 bits?
462 int CopyOutVMCSHostStateArea(struct VMCSHostStateArea *p);
463 int CopyInVMCSHostStateArea(struct VMCSHostStateArea *p);
466 struct VMCSExecCtrlFields {
467 uint_t pinCtrls ; // Table 20-5, Vol 3B. (pg. 20-10)
468 uint_t procCtrls ; // Table 20-6, Vol 3B. (pg. 20-11)
470 uint_t pageFaultErrorMask ;
471 uint_t pageFaultErrorMatch ;
475 uint_t cr0GuestHostMask ; // Should be 64 bits?
476 uint_t cr0ReadShadow ; // Should be 64 bits?
477 uint_t cr4GuestHostMask ; // Should be 64 bits?
478 uint_t cr4ReadShadow ; // Should be 64 bits?
479 uint_t cr3TargetValue0 ; // should be 64 bits?
480 uint_t cr3TargetValue1 ; // should be 64 bits?
481 uint_t cr3TargetValue2 ; // should be 64 bits?
482 uint_t cr3TargetValue3 ; // should be 64 bits?
483 uint_t cr3TargetCount ;
487 /* these fields enabled if "use TPR shadow"==1 */
488 /* may not need them */
489 ullong_t virtApicPageAddr ;
490 // uint_t virtApicPageAddrHigh
491 uint_t tprThreshold ;
494 ullong_t MSRBitmapsBaseAddr;
497 ullong_t vmcsExecPtr ;
501 int CopyOutVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
502 int CopyInVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
507 struct VMCSExitCtrlFields {
508 uint_t exitCtrls ; // Table 20-7, Vol. 3B (pg. 20-16)
509 uint_t msrStoreCount ;
510 ullong_t msrStoreAddr ;
511 uint_t msrLoadCount ;
512 ullong_t msrLoadAddr ;
515 int CopyOutVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
516 int CopyInVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
520 struct VMCSEntryCtrlFields {
521 uint_t entryCtrls ; // Table 20-9, Vol. 3B (pg. 20-18)
522 uint_t msrLoadCount ;
523 ullong_t msrLoadAddr ;
524 uint_t intInfo ; // Table 20-10, Vol. 3B (pg. 20-19)
525 uint_t exceptionErrorCode ;
530 int CopyOutVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
531 int CopyInVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
534 struct VMCSExitInfoFields {
535 uint_t reason; // Table 20-11, Vol. 3B (pg. 20-20)
536 uint_t qualification ; // Should be 64 bits?
538 uint_t intErrorCode ;
539 uint_t idtVectorInfo ;
540 uint_t idtVectorErrorCode ;
542 ullong_t guestLinearAddr ; // Should be 64 bits?
544 ullong_t ioRCX ; // Should be 64 bits?
545 ullong_t ioRSI ; // Should be 64 bits?
546 ullong_t ioRDI ; // Should be 64 bits?
547 ullong_t ioRIP ; // Should be 64 bits?
548 uint_t instrErrorField ;
553 int CopyOutVMCSExitInfoFields(struct VMCSExitInfoFields *p);
560 uint_t exitCtrlFlags;
561 struct VMCSGuestStateArea guestStateArea ;
562 struct VMCSHostStateArea hostStateArea ;
563 struct VMCSExecCtrlFields execCtrlFields ;
564 struct VMCSExitCtrlFields exitCtrlFields ;
565 struct VMCSEntryCtrlFields entryCtrlFields ;
566 struct VMCSExitInfoFields exitInfoFields ;
570 int CopyOutVMCSData(struct VMCSData *p);
571 int CopyInVMCSData(struct VMCSData *p);
584 void PrintTrace_VMX_Regs(struct VMXRegs *regs);
585 void PrintTrace_VMCSData(struct VMCSData * vmcs);
586 void PrintTrace_VMCSGuestStateArea(struct VMCSGuestStateArea * guestState);
587 void PrintTrace_VMCSHostStateArea(struct VMCSHostStateArea * hostState);
588 void PrintTrace_VMCSExecCtrlFields(struct VMCSExecCtrlFields * execCtrls);
589 void PrintTrace_VMCSExitCtrlFields(struct VMCSExitCtrlFields * exitCtrls);
590 void PrintTrace_VMCSEntryCtrlFields(struct VMCSEntryCtrlFields * entryCtrls);
591 void PrintTrace_VMCSExitInfoFields(struct VMCSExitInfoFields * exitInfo);
592 void PrintTrace_VMCSSegment(char * segname, struct VMCSSegment * seg, int abbr);
595 extern uint_t VMCS_WRITE();
596 extern uint_t VMCS_READ();
598 //uint_t VMCSRead(uint_t tag, void * val);
601 #include <palacios/vmcs_gen.h>
603 #endif // ! __V3VEE__