3 * This file is part of the Palacios Virtual Machine Monitor developed
4 * by the V3VEE Project with funding from the United States National
5 * Science Foundation and the Department of Energy.
7 * The V3VEE Project is a joint project between Northwestern University
8 * and the University of New Mexico. You can find out more at
11 * Copyright (c) 2008, Peter Dinda <pdinda@northwestern.edu>
12 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
13 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
14 * All rights reserved.
16 * Author: Peter Dinda <pdinda@northwestern.edu>
17 * Jack Lange <jarusl@cs.northwestern.edu>
19 * This is free software. You are permitted to use,
20 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
30 #include <palacios/vmm_types.h>
33 /* 16 bit guest state */
34 #define VMCS_GUEST_ES_SELECTOR 0x00000800
35 #define VMCS_GUEST_CS_SELECTOR 0x00000802
36 #define VMCS_GUEST_SS_SELECTOR 0x00000804
37 #define VMCS_GUEST_DS_SELECTOR 0x00000806
38 #define VMCS_GUEST_FS_SELECTOR 0x00000808
39 #define VMCS_GUEST_GS_SELECTOR 0x0000080A
40 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C
41 #define VMCS_GUEST_TR_SELECTOR 0x0000080E
43 /* 16 bit host state */
44 #define VMCS_HOST_ES_SELECTOR 0x00000C00
45 #define VMCS_HOST_CS_SELECTOR 0x00000C02
46 #define VMCS_HOST_SS_SELECTOR 0x00000C04
47 #define VMCS_HOST_DS_SELECTOR 0x00000C06
48 #define VMCS_HOST_FS_SELECTOR 0x00000C08
49 #define VMCS_HOST_GS_SELECTOR 0x00000C0A
50 #define VMCS_HOST_TR_SELECTOR 0x00000C0C
52 /* 64 bit control fields */
53 #define IO_BITMAP_A_ADDR 0x00002000
54 #define IO_BITMAP_A_ADDR_HIGH 0x00002001
55 #define IO_BITMAP_B_ADDR 0x00002002
56 #define IO_BITMAP_B_ADDR_HIGH 0x00002003
57 // Only with "Use MSR Bitmaps" enabled
58 #define MSR_BITMAPS 0x00002004
59 #define MSR_BITMAPS_HIGH 0x00002005
61 #define VM_EXIT_MSR_STORE_ADDR 0x00002006
62 #define VM_EXIT_MSR_STORE_ADDR_HIGH 0x00002007
63 #define VM_EXIT_MSR_LOAD_ADDR 0x00002008
64 #define VM_EXIT_MSR_LOAD_ADDR_HIGH 0x00002009
65 #define VM_ENTRY_MSR_LOAD_ADDR 0x0000200A
66 #define VM_ENTRY_MSR_LOAD_ADDR_HIGH 0x0000200B
67 #define VMCS_EXEC_PTR 0x0000200C
68 #define VMCS_EXEC_PTR_HIGH 0x0000200D
69 #define TSC_OFFSET 0x00002010
70 #define TSC_OFFSET_HIGH 0x00002011
71 // Only with "Use TPR Shadow" enabled
72 #define VIRT_APIC_PAGE_ADDR 0x00002012
73 #define VIRT_APIC_PAGE_ADDR_HIGH 0x00002013
77 /* 64 bit guest state fields */
78 #define VMCS_LINK_PTR 0x00002800
79 #define VMCS_LINK_PTR_HIGH 0x00002801
80 #define GUEST_IA32_DEBUGCTL 0x00002802
81 #define GUEST_IA32_DEBUGCTL_HIGH 0x00002803
84 /* 32 bit control fields */
85 #define PIN_VM_EXEC_CTRLS 0x00004000
86 #define PROC_VM_EXEC_CTRLS 0x00004002
87 #define EXCEPTION_BITMAP 0x00004004
88 #define PAGE_FAULT_ERROR_MASK 0x00004006
89 #define PAGE_FAULT_ERROR_MATCH 0x00004008
90 #define CR3_TARGET_COUNT 0x0000400A
91 #define VM_EXIT_CTRLS 0x0000400C
92 #define VM_EXIT_MSR_STORE_COUNT 0x0000400E
93 #define VM_EXIT_MSR_LOAD_COUNT 0x00004010
94 #define VM_ENTRY_CTRLS 0x00004012
95 #define VM_ENTRY_MSR_LOAD_COUNT 0x00004014
96 #define VM_ENTRY_INT_INFO_FIELD 0x00004016
97 #define VM_ENTRY_EXCEPTION_ERROR 0x00004018
98 #define VM_ENTRY_INSTR_LENGTH 0x0000401A
99 // Only with "Use TPR Shadow" Enabled
100 #define TPR_THRESHOLD 0x0000401C
104 /* 32 bit Read Only data fields */
105 #define VM_INSTR_ERROR 0x00004400
106 #define EXIT_REASON 0x00004402
107 #define VM_EXIT_INT_INFO 0x00004404
108 #define VM_EXIT_INT_ERROR 0x00004406
109 #define IDT_VECTOR_INFO 0x00004408
110 #define IDT_VECTOR_ERROR 0x0000440A
111 #define VM_EXIT_INSTR_LENGTH 0x0000440C
112 #define VMX_INSTR_INFO 0x0000440E
114 /* 32 bit Guest state fields */
115 #define GUEST_ES_LIMIT 0x00004800
116 #define GUEST_CS_LIMIT 0x00004802
117 #define GUEST_SS_LIMIT 0x00004804
118 #define GUEST_DS_LIMIT 0x00004806
119 #define GUEST_FS_LIMIT 0x00004808
120 #define GUEST_GS_LIMIT 0x0000480A
121 #define GUEST_LDTR_LIMIT 0x0000480C
122 #define GUEST_TR_LIMIT 0x0000480E
123 #define GUEST_GDTR_LIMIT 0x00004810
124 #define GUEST_IDTR_LIMIT 0x00004812
125 #define GUEST_ES_ACCESS 0x00004814
126 #define GUEST_CS_ACCESS 0x00004816
127 #define GUEST_SS_ACCESS 0x00004818
128 #define GUEST_DS_ACCESS 0x0000481A
129 #define GUEST_FS_ACCESS 0x0000481C
130 #define GUEST_GS_ACCESS 0x0000481E
131 #define GUEST_LDTR_ACCESS 0x00004820
132 #define GUEST_TR_ACCESS 0x00004822
133 #define GUEST_INT_STATE 0x00004824
134 #define GUEST_ACTIVITY_STATE 0x00004826
135 #define GUEST_SMBASE 0x00004828
136 #define GUEST_IA32_SYSENTER_CS 0x0000482A
139 /* 32 bit host state field */
140 #define HOST_IA32_SYSENTER_CS 0x00004C00
142 /* Natural Width Control Fields */
143 #define CR0_GUEST_HOST_MASK 0x00006000
144 #define CR4_GUEST_HOST_MASK 0x00006002
145 #define CR0_READ_SHADOW 0x00006004
146 #define CR4_READ_SHADOW 0x00006006
147 #define CR3_TARGET_VALUE_0 0x00006008
148 #define CR3_TARGET_VALUE_1 0x0000600A
149 #define CR3_TARGET_VALUE_2 0x0000600C
150 #define CR3_TARGET_VALUE_3 0x0000600E
153 /* Natural Width Read Only Fields */
154 #define EXIT_QUALIFICATION 0x00006400
155 #define IO_RCX 0x00006402
156 #define IO_RSI 0x00006404
157 #define IO_RDI 0x00006406
158 #define IO_RIP 0x00006408
159 #define GUEST_LINEAR_ADDR 0x0000640A
161 /* Natural Width Guest State Fields */
162 #define GUEST_CR0 0x00006800
163 #define GUEST_CR3 0x00006802
164 #define GUEST_CR4 0x00006804
165 #define GUEST_ES_BASE 0x00006806
166 #define GUEST_CS_BASE 0x00006808
167 #define GUEST_SS_BASE 0x0000680A
168 #define GUEST_DS_BASE 0x0000680C
169 #define GUEST_FS_BASE 0x0000680E
170 #define GUEST_GS_BASE 0x00006810
171 #define GUEST_LDTR_BASE 0x00006812
172 #define GUEST_TR_BASE 0x00006814
173 #define GUEST_GDTR_BASE 0x00006816
174 #define GUEST_IDTR_BASE 0x00006818
175 #define GUEST_DR7 0x0000681A
176 #define GUEST_RSP 0x0000681C
177 #define GUEST_RIP 0x0000681E
178 #define GUEST_RFLAGS 0x00006820
179 #define GUEST_PENDING_DEBUG_EXCS 0x00006822
180 #define GUEST_IA32_SYSENTER_ESP 0x00006824
181 #define GUEST_IA32_SYSENTER_EIP 0x00006826
184 /* Natural Width Host State Fields */
185 #define HOST_CR0 0x00006C00
186 #define HOST_CR3 0x00006C02
187 #define HOST_CR4 0x00006C04
188 #define HOST_FS_BASE 0x00006C06
189 #define HOST_GS_BASE 0x00006C08
190 #define HOST_TR_BASE 0x00006C0A
191 #define HOST_GDTR_BASE 0x00006C0C
192 #define HOST_IDTR_BASE 0x00006C0E
193 #define HOST_IA32_SYSENTER_ESP 0x00006C10
194 #define HOST_IA32_SYSENTER_EIP 0x00006C12
195 #define HOST_RSP 0x00006C14
196 #define HOST_RIP 0x00006C16
198 /* Pin Based VM Execution Controls */
199 /* INTEL MANUAL: 20-10 vol 3B */
200 #define EXTERNAL_INTERRUPT_EXITING 0x00000001
201 #define NMI_EXITING 0x00000008
202 #define VIRTUAL_NMIS 0x00000020
205 /* Processor Based VM Execution Controls */
206 /* INTEL MANUAL: 20-11 vol. 3B */
207 #define INTERRUPT_WINDOWS_EXIT 0x00000004
208 #define USE_TSC_OFFSETTING 0x00000008
209 #define HLT_EXITING 0x00000080
210 #define INVLPG_EXITING 0x00000200
211 #define MWAIT_EXITING 0x00000400
212 #define RDPMC_EXITING 0x00000800
213 #define RDTSC_EXITING 0x00001000
214 #define CR8_LOAD_EXITING 0x00080000
215 #define CR8_STORE_EXITING 0x00100000
216 #define USE_TPR_SHADOW 0x00200000
217 #define NMI_WINDOW_EXITING 0x00400000
218 #define MOVDR_EXITING 0x00800000
219 #define UNCONDITION_IO_EXITING 0x01000000
220 #define USE_IO_BITMAPS 0x02000000
221 #define USE_MSR_BITMAPS 0x10000000
222 #define MONITOR_EXITING 0x20000000
223 #define PAUSE_EXITING 0x40000000
225 /* VM-Exit Controls */
226 /* INTEL MANUAL: 20-16 vol. 3B */
227 #define HOST_ADDR_SPACE_SIZE 0x00000200
228 #define ACK_IRQ_ON_EXIT 0x00008000
231 #define VM_EXIT_REASON_INFO_EXCEPTION_OR_NMI 0
232 #define VM_EXIT_REASON_EXTERNAL_INTR 1
233 #define VM_EXIT_REASON_TRIPLE_FAULT 2
234 #define VM_EXIT_REASON_INIT_SIGNAL 3
235 #define VM_EXIT_REASON_STARTUP_IPI 4
236 #define VM_EXIT_REASON_IO_SMI 5
237 #define VM_EXIT_REASON_OTHER_SMI 6
238 #define VM_EXIT_REASON_INTR_WINDOW 7
239 #define VM_EXIT_REASON_NMI_WINDOW 8
240 #define VM_EXIT_REASON_TASK_SWITCH 9
241 #define VM_EXIT_REASON_CPUID 10
242 #define VM_EXIT_REASON_HLT 12
243 #define VM_EXIT_REASON_INVD 13
244 #define VM_EXIT_REASON_INVLPG 14
245 #define VM_EXIT_REASON_RDPMC 15
246 #define VM_EXIT_REASON_RDTSC 16
247 #define VM_EXIT_REASON_RSM 17
248 #define VM_EXIT_REASON_VMCALL 18
249 #define VM_EXIT_REASON_VMCLEAR 19
250 #define VM_EXIT_REASON_VMLAUNCH 20
251 #define VM_EXIT_REASON_VMPTRLD 21
252 #define VM_EXIT_REASON_VMPTRST 22
253 #define VM_EXIT_REASON_VMREAD 23
254 #define VM_EXIT_REASON_VMRESUME 24
255 #define VM_EXIT_REASON_VMWRITE 25
256 #define VM_EXIT_REASON_VMXOFF 26
257 #define VM_EXIT_REASON_VMXON 27
258 #define VM_EXIT_REASON_CR_REG_ACCESSES 28
259 #define VM_EXIT_REASON_MOV_DR 29
260 #define VM_EXIT_REASON_IO_INSTR 30
261 #define VM_EXIT_REASON_RDMSR 31
262 #define VM_EXIT_REASON_WRMSR 32
263 #define VM_EXIT_REASON_ENTRY_FAIL_INVALID_GUEST_STATE 33
264 #define VM_EXIT_REASON_ENTRY_FAIL_MSR_LOAD 34
265 #define VM_EXIT_REASON_MWAIT 36
266 #define VM_EXIT_REASON_MONITOR 39
267 #define VM_EXIT_REASON_PAUSE 40
268 #define VM_EXIT_REASON_ENTRY_FAILURE_MACHINE_CHECK 41
269 #define VM_EXIT_REASON_TPR_BELOW_THRESHOLD 43
272 extern char *exception_names[];
273 extern char *exception_type_names[];
283 /* VMCS Exit QUALIFICATIONs */
284 struct VMExitIOQual {
285 uint_t accessSize : 3; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
286 uint_t dir : 1; // (0: Out ;; 1: In)
287 uint_t string : 1; // (0: not string ;; 1: string)
288 uint_t REP : 1; // (0: not REP ;; 1: REP)
289 uint_t opEnc : 1; // (0: DX ;; 1: immediate)
290 uint_t rsvd : 9; // Set to 0
291 uint_t port : 16; // IO Port Number
292 } __attribute__((packed));
296 struct VMExitDBGQual {
297 uint_t B0 : 1; // Breakpoint 0 condition met
298 uint_t B1 : 1; // Breakpoint 1 condition met
299 uint_t B2 : 1; // Breakpoint 2 condition met
300 uint_t B3 : 1; // Breakpoint 3 condition met
301 uint_t rsvd : 9; // reserved to 0
302 uint_t BD : 1; // detected DBG reg access
303 uint_t BS : 1; // cause either single instr or taken branch
304 } __attribute__((packed));
307 struct VMExitTSQual {
308 uint_t selector : 16; // selector of destination TSS
309 uint_t rsvd : 14; // reserved to 0
310 uint_t src : 2; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
311 } __attribute__((packed));
313 struct VMExitCRQual {
314 uint_t crID : 4; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
315 uint_t accessType : 2; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
316 uint_t lmswOpType : 1; // (0: register ; 1: memory)
317 uint_t rsvd1 : 1; // reserved to 0
318 uint_t gpr : 4; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
319 uint_t rsvd2 : 4; // reserved to 0
320 uint_t lmswSrc : 16; // src data for lmsw
321 } __attribute__((packed));
323 struct VMExitMovDRQual {
324 uint_t regID : 3; // debug register number
325 uint_t rsvd1 : 1; // reserved to 0
326 uint_t dir : 1; // (0: MOV to DR , 1: MOV from DR)
327 uint_t rsvd2 : 3; // reserved to 0
328 uint_t gpr : 4; // (0:RAX, 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
329 } __attribute__((packed));
331 /* End Exit Qualifications */
333 /* Exit Vector Info */
334 struct VMExitIntInfo {
335 uint_t nr : 8; // IRQ number, exception vector, NMI = 2
336 uint_t type : 3; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
337 uint_t errorCode : 1; // 1: error Code present
338 uint_t iret : 1; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
339 uint_t rsvd : 18; // always 0
340 uint_t valid : 1; // always 1 if valid
341 } __attribute__((packed));
346 /* End Exit Vector Info */
351 /* Segment Selector Access Rights (32 bits) */
352 /* INTEL Manual: 20-4 vol 3B */
361 uint_t L : 1; // CS only (64 bit active), reserved otherwise
363 uint_t granularity : 1;
366 } __attribute__((packed)) as_fields;
368 } __attribute__((packed));
373 union SegAccess access;
375 uint_t baseAddr ; // should be 64 bits?
380 struct VMCSGuestStateArea {
381 /* (1) Guest State Area */
382 /* (1.1) Guest Register State */
383 uint_t cr0 ; // should be 64 bits?
384 uint_t cr3 ; // should be 64 bits?
385 uint_t cr4 ; // should be 64 bits?
386 uint_t dr7 ; // should be 64 bits?
387 uint_t rsp ; // should be 64 bits?
388 uint_t rip ; // should be 64 bits?
389 uint_t rflags ; // should be 64 bits?
392 struct VMCSSegment cs ;
393 struct VMCSSegment ss ;
394 struct VMCSSegment ds ;
395 struct VMCSSegment es ;
396 struct VMCSSegment fs ;
397 struct VMCSSegment gs ;
398 struct VMCSSegment ldtr ;
399 struct VMCSSegment tr ;
401 struct VMCSSegment gdtr ;
402 struct VMCSSegment idtr ;
407 ullong_t sysenter_esp ; // should be 64 bits?
408 ullong_t sysenter_eip ; // should be 64 bits?
412 /* (1.2) Guest Non-register State */
413 uint_t activity ; /* (0=Active, 1=HLT, 2=Shutdown, 3=Wait-for-SIPI)
414 (listed in MSR: IA32_VMX_MISC) */
416 uint_t interrupt_state ; // see Table 20-3 (page 20-6) INTEL MANUAL 3B
418 ullong_t pending_dbg_exceptions ; // should be 64 bits?
419 /* Table 20-4 page 20-8 INTEL MANUAL 3B */
421 ullong_t vmcs_link ; // should be set to 0xffffffff_ffffffff
425 int CopyOutVMCSGuestStateArea(struct VMCSGuestStateArea * p);
426 int CopyInVMCSGuestStateArea(struct VMCSGuestStateArea * p);
430 struct VMCSHostStateArea {
431 /* (2) Host State Area */
432 ullong_t cr0 ; // Should be 64 bits?
433 ullong_t cr3 ; // should be 64 bits?
434 ullong_t cr4 ; // should be 64 bits?
435 ullong_t rsp ; // should be 64 bits?
436 ullong_t rip ; // should be 64 bits?
438 ushort_t csSelector ;
439 ushort_t ssSelector ;
440 ushort_t dsSelector ;
441 ushort_t esSelector ;
442 ushort_t fsSelector ;
443 ushort_t gsSelector ;
444 ushort_t trSelector ;
446 ullong_t fsBaseAddr ; // Should be 64 bits?
447 ullong_t gsBaseAddr ; // Should be 64 bits?
448 ullong_t trBaseAddr ; // Should be 64 bits?
449 ullong_t gdtrBaseAddr ; // Should be 64 bits?
450 ullong_t idtrBaseAddr ; // Should be 64 bits?
455 ullong_t sysenter_esp ; // Should be 64 bits?
456 ullong_t sysenter_eip ; // Should be 64 bits?
460 int CopyOutVMCSHostStateArea(struct VMCSHostStateArea *p);
461 int CopyInVMCSHostStateArea(struct VMCSHostStateArea *p);
464 struct VMCSExecCtrlFields {
465 uint_t pinCtrls ; // Table 20-5, Vol 3B. (pg. 20-10)
466 uint_t procCtrls ; // Table 20-6, Vol 3B. (pg. 20-11)
468 uint_t pageFaultErrorMask ;
469 uint_t pageFaultErrorMatch ;
473 uint_t cr0GuestHostMask ; // Should be 64 bits?
474 uint_t cr0ReadShadow ; // Should be 64 bits?
475 uint_t cr4GuestHostMask ; // Should be 64 bits?
476 uint_t cr4ReadShadow ; // Should be 64 bits?
477 uint_t cr3TargetValue0 ; // should be 64 bits?
478 uint_t cr3TargetValue1 ; // should be 64 bits?
479 uint_t cr3TargetValue2 ; // should be 64 bits?
480 uint_t cr3TargetValue3 ; // should be 64 bits?
481 uint_t cr3TargetCount ;
485 /* these fields enabled if "use TPR shadow"==1 */
486 /* may not need them */
487 ullong_t virtApicPageAddr ;
488 // uint_t virtApicPageAddrHigh
489 uint_t tprThreshold ;
492 ullong_t MSRBitmapsBaseAddr;
495 ullong_t vmcsExecPtr ;
499 int CopyOutVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
500 int CopyInVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
505 struct VMCSExitCtrlFields {
506 uint_t exitCtrls ; // Table 20-7, Vol. 3B (pg. 20-16)
507 uint_t msrStoreCount ;
508 ullong_t msrStoreAddr ;
509 uint_t msrLoadCount ;
510 ullong_t msrLoadAddr ;
513 int CopyOutVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
514 int CopyInVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
518 struct VMCSEntryCtrlFields {
519 uint_t entryCtrls ; // Table 20-9, Vol. 3B (pg. 20-18)
520 uint_t msrLoadCount ;
521 ullong_t msrLoadAddr ;
522 uint_t intInfo ; // Table 20-10, Vol. 3B (pg. 20-19)
523 uint_t exceptionErrorCode ;
528 int CopyOutVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
529 int CopyInVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
532 struct VMCSExitInfoFields {
533 uint_t reason; // Table 20-11, Vol. 3B (pg. 20-20)
534 uint_t qualification ; // Should be 64 bits?
536 uint_t intErrorCode ;
537 uint_t idtVectorInfo ;
538 uint_t idtVectorErrorCode ;
540 ullong_t guestLinearAddr ; // Should be 64 bits?
542 ullong_t ioRCX ; // Should be 64 bits?
543 ullong_t ioRSI ; // Should be 64 bits?
544 ullong_t ioRDI ; // Should be 64 bits?
545 ullong_t ioRIP ; // Should be 64 bits?
546 uint_t instrErrorField ;
551 int CopyOutVMCSExitInfoFields(struct VMCSExitInfoFields *p);
558 uint_t exitCtrlFlags;
559 struct VMCSGuestStateArea guestStateArea ;
560 struct VMCSHostStateArea hostStateArea ;
561 struct VMCSExecCtrlFields execCtrlFields ;
562 struct VMCSExitCtrlFields exitCtrlFields ;
563 struct VMCSEntryCtrlFields entryCtrlFields ;
564 struct VMCSExitInfoFields exitInfoFields ;
568 int CopyOutVMCSData(struct VMCSData *p);
569 int CopyInVMCSData(struct VMCSData *p);
582 void PrintTrace_VMX_Regs(struct VMXRegs *regs);
583 void PrintTrace_VMCSData(struct VMCSData * vmcs);
584 void PrintTrace_VMCSGuestStateArea(struct VMCSGuestStateArea * guestState);
585 void PrintTrace_VMCSHostStateArea(struct VMCSHostStateArea * hostState);
586 void PrintTrace_VMCSExecCtrlFields(struct VMCSExecCtrlFields * execCtrls);
587 void PrintTrace_VMCSExitCtrlFields(struct VMCSExitCtrlFields * exitCtrls);
588 void PrintTrace_VMCSEntryCtrlFields(struct VMCSEntryCtrlFields * entryCtrls);
589 void PrintTrace_VMCSExitInfoFields(struct VMCSExitInfoFields * exitInfo);
590 void PrintTrace_VMCSSegment(char * segname, struct VMCSSegment * seg, int abbr);
593 extern uint_t VMCS_WRITE();
594 extern uint_t VMCS_READ();
596 //uint_t VMCSRead(uint_t tag, void * val);
599 #include <palacios/vmcs_gen.h>
601 #endif // ! __V3VEE__