6 #define VMCB_CTRL_AREA_OFFSET 0x0
7 #define VMCB_STATE_SAVE_AREA_OFFSET 0x400
10 #define GET_VMCB_CTRL_AREA(page) (page + VMCB_CONTROL_AREA_OFFSET)
11 #define GET_VMCB_SAVE_STATE_AREA(page) (page + VMCB_STATE_SAVE_AREA_OFFSET)
17 #define PACKED __attribute__((packed))
20 union Ctrl_Registers {
21 ushort_t bitmap PACKED;
23 uint_t cr0 : 1 PACKED;
24 uint_t cr1 : 1 PACKED;
25 uint_t cr2 : 1 PACKED;
26 uint_t cr3 : 1 PACKED;
27 uint_t cr4 : 1 PACKED;
28 uint_t cr5 : 1 PACKED;
29 uint_t cr6 : 1 PACKED;
30 uint_t cr7 : 1 PACKED;
31 uint_t cr8 : 1 PACKED;
32 uint_t cr9 : 1 PACKED;
33 uint_t cr10 : 1 PACKED;
34 uint_t cr11 : 1 PACKED;
35 uint_t cr12 : 1 PACKED;
36 uint_t cr13 : 1 PACKED;
37 uint_t cr14 : 1 PACKED;
38 uint_t cr15 : 1 PACKED;
43 union Debug_Registers {
44 ushort_t bitmap PACKED;
46 uint_t dr0 : 1 PACKED;
47 uint_t dr1 : 1 PACKED;
48 uint_t dr2 : 1 PACKED;
49 uint_t dr3 : 1 PACKED;
50 uint_t dr4 : 1 PACKED;
51 uint_t dr5 : 1 PACKED;
52 uint_t dr6 : 1 PACKED;
53 uint_t dr7 : 1 PACKED;
54 uint_t dr8 : 1 PACKED;
55 uint_t dr9 : 1 PACKED;
56 uint_t dr10 : 1 PACKED;
57 uint_t dr11 : 1 PACKED;
58 uint_t dr12 : 1 PACKED;
59 uint_t dr13 : 1 PACKED;
60 uint_t dr14 : 1 PACKED;
61 uint_t dr15 : 1 PACKED;
66 union Exception_Vectors {
69 uint_t ex0 : 1 PACKED;
70 uint_t ex1 : 1 PACKED;
71 uint_t ex2 : 1 PACKED;
72 uint_t ex3 : 1 PACKED;
73 uint_t ex4 : 1 PACKED;
74 uint_t ex5 : 1 PACKED;
75 uint_t ex6 : 1 PACKED;
76 uint_t ex7 : 1 PACKED;
77 uint_t ex8 : 1 PACKED;
78 uint_t ex9 : 1 PACKED;
79 uint_t ex10 : 1 PACKED;
80 uint_t ex11 : 1 PACKED;
81 uint_t ex12 : 1 PACKED;
82 uint_t ex13 : 1 PACKED;
83 uint_t ex14 : 1 PACKED;
84 uint_t ex15 : 1 PACKED;
85 uint_t ex16 : 1 PACKED;
86 uint_t ex17 : 1 PACKED;
87 uint_t ex18 : 1 PACKED;
88 uint_t ex19 : 1 PACKED;
89 uint_t ex20 : 1 PACKED;
90 uint_t ex21 : 1 PACKED;
91 uint_t ex22 : 1 PACKED;
92 uint_t ex23 : 1 PACKED;
93 uint_t ex24 : 1 PACKED;
94 uint_t ex25 : 1 PACKED;
95 uint_t ex26 : 1 PACKED;
96 uint_t ex27 : 1 PACKED;
97 uint_t ex28 : 1 PACKED;
98 uint_t ex29 : 1 PACKED;
99 uint_t ex30 : 1 PACKED;
100 uint_t ex31 : 1 PACKED;
105 union Instr_Intercepts {
106 uint_t bitmap PACKED;
108 uint_t INTR : 1 PACKED;
109 uint_t NMI : 1 PACKED;
110 uint_t SMI : 1 PACKED;
111 uint_t INIT : 1 PACKED;
112 uint_t VINTR : 1 PACKED;
113 uint_t CR0 : 1 PACKED;
114 uint_t RD_IDTR : 1 PACKED;
115 uint_t RD_GDTR : 1 PACKED;
116 uint_t RD_LDTR : 1 PACKED;
117 uint_t RD_TR : 1 PACKED;
118 uint_t WR_IDTR : 1 PACKED;
119 uint_t WR_GDTR : 1 PACKED;
120 uint_t WR_LDTR : 1 PACKED;
121 uint_t WR_TR : 1 PACKED;
122 uint_t RDTSC : 1 PACKED;
123 uint_t RDPMC : 1 PACKED;
124 uint_t PUSHF : 1 PACKED;
125 uint_t POPF : 1 PACKED;
126 uint_t CPUID : 1 PACKED;
127 uint_t RSM : 1 PACKED;
128 uint_t IRET : 1 PACKED;
129 uint_t INTn : 1 PACKED;
130 uint_t INVD : 1 PACKED;
131 uint_t PAUSE : 1 PACKED;
132 uint_t HLT : 1 PACKED;
133 uint_t INVPLG : 1 PACKED;
134 uint_t INVPLGA : 1 PACKED;
135 uint_t IOIO_PROT : 1 PACKED;
136 uint_t MSR_PROT : 1 PACKED;
137 uint_t task_switch : 1 PACKED;
138 uint_t FERR_FREEZE : 1 PACKED;
139 uint_t shutdown_evts: 1 PACKED;
143 union SVM_Instr_Intercepts {
144 uint_t bitmap PACKED;
146 uint_t VMRUN : 1 PACKED;
147 uint_t VMMCALL : 1 PACKED;
148 uint_t VMLOAD : 1 PACKED;
149 uint_t VMSAVE : 1 PACKED;
150 uint_t STGI : 1 PACKED;
151 uint_t CLGI : 1 PACKED;
152 uint_t SKINIT : 1 PACKED;
153 uint_t RDTSCP : 1 PACKED;
154 uint_t ICEBP : 1 PACKED;
155 uint_t WBINVD : 1 PACKED;
156 uint_t MONITOR : 1 PACKED;
157 uint_t MWAIT_always : 1 PACKED;
158 uint_t MWAIT_if_armed : 1 PACKED;
159 uint_t reserved : 19 PACKED; // Should be 0
164 union Guest_Control {
165 uint_t bitmap PACKED;
167 uchar_t V_TPR PACKED;
168 uint_t V_IRQ : 1 PACKED;
169 uint_t rsvd1 : 7 PACKED; // Should be 0
170 uint_t V_INTR_PRIO : 4 PACKED;
171 uint_t V_IGN_TPR : 1 PACKED;
172 uint_t rsvd2 : 3 PACKED; // Should be 0
173 uint_t V_INTR_MASKING : 1 PACKED;
174 uint_t rsvd3 : 7 PACKED; // Should be 0
175 uchar_t V_INTR_VECTOR PACKED;
176 uint_t rsvd4 : 24 PACKED; // Should be 0
182 typedef struct VMCB_Control_Area {
184 union Ctrl_Registers cr_reads PACKED;
185 union Ctrl_Registers cr_writes PACKED;
186 union Debug_Registers dr_reads PACKED;
187 union Debug_Registers dr_writes PACKED;
188 union Exception_Vectors exceptions PACKED;
189 union Instr_Intercepts instrs PACKED;
190 union SVM_Instr_Intercepts svm_instrs PACKED;
192 uchar_t rsvd1[43] PACKED; // Should be 0
195 ullong_t IOPM_BASE_PA PACKED;
196 ullong_t MSRPM_BASE_PA PACKED;
197 ullong_t TSC_OFFSET PACKED;
199 uint_t guest_ASID PACKED;
200 uchar_t TLB_CONTROL PACKED;
202 uchar_t rsvd2[3] PACKED; // Should be 0
204 union Guest_Control guest_ctrl PACKED;
206 uint_t interrupt_shadow : 1 PACKED;
207 uint_t rsvd3 : 31 PACKED; // Should be 0
208 uint_t rsvd4 PACKED; // Should be 0
210 ullong_t exit_code PACKED;
211 ullong_t exit_info1 PACKED;
212 ullong_t exit_info2 PACKED;
214 /* This could be a typo in the manual....
215 * It doesn't actually say that there is a reserved bit
216 * But it does say that the EXITINTINFO field is in bits 63-1
217 * ALL other occurances mention a 1 bit reserved field
219 uint_t rsvd5 : 1 PACKED;
220 ullong_t exit_int_info : 63 PACKED;
223 uint_t NP_ENABLE : 1 PACKED;
224 ullong_t rsvd6 : 63 PACKED; // Should be 0
226 uchar_t rsvd7[15] PACKED; // Should be 0
229 ullong_t EVENTINJ PACKED;
232 /* This could be a typo in the manual....
233 * It doesn't actually say that there is a reserved bit
234 * But it does say that the EXITINTINFO field is in bits 63-1
235 * ALL other occurances mention a 1 bit reserved field
237 uint_t rsvd8 : 1 PACKED;
238 ullong_t N_CR3 : 63 PACKED;
241 uint_t LBR_VIRTUALIZATION_ENABLE : 1 PACKED;
242 ullong_t rsvd9 : 63 PACKED; // Should be 0
251 struct vmcb_selector {
252 ushort_t selector PACKED;
253 ushort_t attrib PACKED;
255 ullong_t base PACKED;
259 typedef struct VMCB_State_Save_Area {
260 struct vmcb_selector es PACKED; // only lower 32 bits of base are implemented
261 struct vmcb_selector cs PACKED; // only lower 32 bits of base are implemented
262 struct vmcb_selector ss PACKED; // only lower 32 bits of base are implemented
263 struct vmcb_selector ds PACKED; // only lower 32 bits of base are implemented
264 struct vmcb_selector fs PACKED;
265 struct vmcb_selector gs PACKED;
267 struct vmcb_selector gdtr PACKED; // selector+attrib are reserved, only lower 16 bits of limit are implemented
268 struct vmcb_selector ldtr PACKED;
269 struct vmcb_selector idtr PACKED; // selector+attrib are reserved, only lower 16 bits of limit are implemented
270 struct vmcb_selector tr PACKED;
272 uchar_t rsvd1[42] PACKED;
275 uchar_t cpl PACKED; // if the guest is real-mode then the CPL is forced to 0
276 // if the guest is virtual-mode then the CPL is forced to 3
281 ullong_t efer PACKED;
283 uchar_t rsvd3[111] PACKED;
291 ullong_t rflags PACKED;
294 uchar_t rsvd4[87] PACKED;
299 uchar_t rsvd5[23] PACKED;
303 ullong_t star PACKED;
304 ullong_t lstar PACKED;
305 ullong_t cstar PACKED;
306 ullong_t sfmask PACKED;
307 ullong_t KernelGsBase PACKED;
308 ullong_t sysenter_cs PACKED;
309 ullong_t sysenter_esp PACKED;
310 ullong_t sysenter_eip PACKED;
314 uchar_t rsvd6[31] PACKED;
317 ullong_t g_pat PACKED; // Guest PAT
318 // -- only used if nested paging is enabled
319 ullong_t dbgctl PACKED; // Guest DBGCTL MSR
320 // -- only used if the LBR registers are virtualized
321 ullong_t br_from PACKED; // Guest LastBranchFromIP MSR
322 // -- only used if the LBR registers are virtualized
323 ullong_t br_to PACKED; // Guest LastBranchToIP MSR
324 // -- only used if the LBR registers are virtualized
325 ullong_t lastexcpfrom PACKED; // Guest LastExceptionFromIP MSR
326 // -- only used if the LBR registers are virtualized
327 ullong_t lastexcpto PACKED; // Guest LastExceptionToIP MSR
328 // -- only used if the LBR registers are virtualized
330 } vmcb_saved_state_t;