2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2009, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #ifndef __DEVICES_PCI_TYPES_H__
21 #define __DEVICES_PCI_TYPES_H__
24 #include <palacios/vmm_types.h>
26 // struct pci_device_config
27 struct pci_config_header {
40 uint8_t cache_line_size;
42 uint8_t header_type; // bits 6-0: 00: other, 01: pci-pci bridge, 02: pci-cardbus; bit 7: 1=multifunction
52 uint32_t cardbus_cis_pointer;
53 uint16_t subsystem_vendor_id;
54 uint16_t subsystem_id;
55 uint32_t expansion_rom_address;
56 uint8_t cap_ptr; // capabilities list offset in config space
59 uint8_t intr_line; // 00=none, 01=IRQ1, etc.
60 uint8_t intr_pin; // 00=none, otherwise INTA# to INTD#
61 uint8_t min_grant; // min busmaster time - units of 250ns
62 uint8_t max_latency; // units of 250ns - busmasters
63 } __attribute__((packed));
66 typedef enum { PCI_CLASS_PRE2 = 0x00,
67 PCI_CLASS_STORAGE = 0x01,
68 PCI_CLASS_NETWORK = 0x02,
69 PCI_CLASS_DISPLAY = 0x03,
70 PCI_CLASS_MMEDIA = 0x04,
71 PCI_CLASS_MEMORY = 0x05,
72 PCI_CLASS_BRIDGE = 0x06,
73 PCI_CLASS_COMM_CTRL = 0x07,
74 PCI_CLASS_BASE_PERIPH = 0x08,
75 PCI_CLASS_INPUT = 0x09,
76 PCI_CLASS_DOCK = 0x0a,
77 PCI_CLASS_PROC = 0x0b,
78 PCI_CLASS_SERIAL = 0x0c,
79 PCI_CLASS_MISC = 0xff } pci_class_t;
81 typedef enum { PCI_STORAGE_SUBCLASS_SCSI = 0x00,
82 PCI_STORAGE_SUBCLASS_IDE = 0x01,
83 PCI_STORAGE_SUBCLASS_FLOPPY = 0x02,
84 PCI_STORAGE_SUBCLASS_IPI = 0x03,
85 PCI_STORAGE_SUBCLASS_RAID = 0x04,
86 PCI_STORAGE_SUBCLASS_SATA = 0x06,
87 PCI_STORAGE_SUBCLASS_SAS = 0x07,
88 PCI_STORAGE_SUBCLASS_OTHER = 0x80 } pci_storage_subclass_t;
92 typedef enum { PCI_NET_SUBCLASS_ETHER = 0x00,
93 PCI_NET_SUBCLASS_TOKRING = 0x01,
94 PCI_NET_SUBCLASS_FDDI = 0x02,
95 PCI_NET_SUBCLASS_ATM = 0x03,
96 PCI_NET_SUBCLASS_OTHER = 0x80 } pci_network_subclass_t;
98 typedef enum { PCI_DISPLAY_SUBCLASS_VGA = 0x00,
99 PCI_DISPLAY_SUBCLASS_XGA = 0x01,
100 PCI_DISPLAY_SUBCLASS_OTHER = 0x80 } pci_display_subclass_t;
102 typedef enum { PCI_MMEDIA_SUBCLASS_VIDEO = 0x00,
103 PCI_MMEDIA_SUBCLASS_AUDIO = 0x01,
104 PCI_MMEDIA_SUBCLASS_OTHER = 0x80 } pci_multimedia_subclass_t;
106 typedef enum { PCI_MEM_SUBCLASS_RAM = 0x00,
107 PCI_MEM_SUBCLASS_FLASH = 0x01,
108 PCI_MEM_SUBCLASS_OTHER = 0x80 } pci_memory_subclass_t;
110 typedef enum { PCI_BRIDGE_SUBCLASS_HOST_PCI = 0x00,
111 PCI_BRIDGE_SUBCLASS_PCI_ISA = 0x01,
112 PCI_BRIDGE_SUBCLASS_PCI_EISA = 0x02,
113 PCI_BRIDGE_SUBCLASS_PCI_MICRO = 0x03,
114 PCI_BRIDGE_SUBCLASS_PCI_PCI = 0x04,
115 PCI_BRIDGE_SUBCLASS_PCI_PCMCIA = 0x05,
116 PCI_BRIDGE_SUBCLASS_PCI_NUBUS = 0x06,
117 PCI_BRIDGE_SUBCLASS_PCI_CARDBUS = 0x07,
118 PCI_BRIDGE_SUBCLASS_PCI_OTHER = 0x80 } pci_bridge_subclass_t;
123 struct pci_class_desc {
128 static struct pci_class_desc pci_class_descriptions[] = {
129 { 0x0100, "SCSI controller"},
130 { 0x0101, "IDE controller"},
131 { 0x0102, "Floppy controller"},
132 { 0x0103, "IPI controller"},
133 { 0x0104, "RAID controller"},
134 { 0x0106, "SATA controller"},
135 { 0x0107, "SAS controller"},
136 { 0x0180, "Storage controller"},
137 { 0x0200, "Ethernet controller"},
138 { 0x0201, "Token Ring controller"},
139 { 0x0202, "FDDI controller"},
140 { 0x0203, "ATM controller"},
141 { 0x0280, "Network controller"},
142 { 0x0300, "VGA controller"},
143 { 0x0301, "XGA controller"},
144 { 0x0302, "3D controller"},
145 { 0x0380, "Display controller"},
146 { 0x0400, "Video controller"},
147 { 0x0401, "Audio controller"},
149 { 0x0480, "Multimedia controller"},
150 { 0x0500, "RAM controller"},
151 { 0x0501, "Flash controller"},
152 { 0x0580, "Memory controller"},
153 { 0x0600, "Host bridge"},
154 { 0x0601, "ISA bridge"},
155 { 0x0602, "EISA bridge"},
156 { 0x0603, "MC bridge"},
157 { 0x0604, "PCI bridge"},
158 { 0x0605, "PCMCIA bridge"},
159 { 0x0606, "NUBUS bridge"},
160 { 0x0607, "CARDBUS bridge"},
161 { 0x0608, "RACEWAY bridge"},
163 { 0x0c03, "USB controller"},