2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
11 * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
12 * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
13 * All rights reserved.
15 * Author: Lei Xia <lxia@northwestern.edu>
16 * Chang Seok Bae <jhuell@gmail.com>
18 * This is free software. You are permitted to use,
19 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
22 #ifndef __DEVICES_PCI_H__
23 #define __DEVICES_PCI_H__
28 #include <palacios/vmm_types.h>
29 #include <palacios/vmm_rbtree.h>
31 #include <devices/pci_types.h>
37 typedef enum { PCI_BAR_IO,
43 PCI_BAR_NONE } pci_bar_type_t;
45 typedef enum {PCI_STD_DEVICE, PCI_TO_PCI_BRIDGE, PCI_CARDBUS, PCI_MULTIFUNCTION, PCI_PASSTHROUGH} pci_device_type_t;
49 // For the rest of the subclass codes see:
50 // http://www.acm.uiuc.edu/sigops/roll_your_own/7.c.1.html
52 #define PCI_AUTO_DEV_NUM (-1)
62 addr_t default_base_addr;
63 int (*mem_read)(struct guest_info * core, addr_t guest_addr, void * dst, uint_t length, void * private_data);
64 int (*mem_write)(struct guest_info * core, addr_t guest_addr, void * src, uint_t length, void * private_data);
69 uint16_t default_base_port;
70 int (*io_read)(struct guest_info * core, uint16_t port, void * src, uint_t length, void * private_data);
71 int (*io_write)(struct guest_info * core, uint16_t port, void * src, uint_t length, void * private_data);
75 int (*bar_init)(int bar_num, uint32_t * dst, void * private_data);
76 int (*bar_write)(int bar_num, uint32_t * src, void * private_data);
89 #define PCI_IO_MASK 0xfffffffc
90 #define PCI_MEM24_MASK 0x000ffff0
91 #define PCI_MEM_MASK 0xfffffff0
92 #define PCI_MEM64_MASK_HI 0xffffffff
93 #define PCI_MEM64_MASK_LO 0xfffffff0
94 #define PCI_EXP_ROM_MASK 0xfffff800
98 #define PCI_IO_BASE(bar_val) (bar_val & PCI_IO_MASK)
99 #define PCI_MEM24_BASE(bar_val) (bar_val & PCI_MEM24_MASK)
100 #define PCI_MEM32_BASE(bar_val) (bar_val & PCI_MEM_MASK)
101 #define PCI_MEM64_BASE_HI(bar_val) (bar_val & PCI_MEM64_MASK_HI)
102 #define PCI_MEM64_BASE_LO(bar_val) (bar_val & PCI_MEM64_MASK_LO)
103 #define PCI_EXP_ROM_BASE(rom_val) (rom_val & PCI_EXP_ROM_MASK)
108 pci_device_type_t type;
111 uint8_t config_space[256];
114 struct pci_config_header config_header;
115 uint8_t config_data[192];
116 } __attribute__((packed));
117 } __attribute__((packed));
119 struct v3_pci_bar bar[6];
121 struct rb_node dev_tree_node;
130 } __attribute__((packed));
131 } __attribute__((packed));
135 int (*config_update)(uint_t reg_num, void * src, uint_t length, void * priv_data);
137 int (*cmd_update)(struct pci_device * pci_dev, uchar_t io_enabled, uchar_t mem_enabled);
138 int (*exp_rom_update)(struct pci_device * pci_dev, uint32_t * src, void * private_data);
140 int (*config_write)(uint_t reg_num, void * src, uint_t length, void * private_data);
141 int (*config_read)(uint_t reg_num, void * dst, uint_t length, void * private_data);
144 int exp_rom_update_flag;
151 int v3_pci_set_irq_bridge(struct vm_device * pci_bus, int bus_num,
152 int (*raise_pci_irq)(struct vm_device * dev, struct pci_device * pci_dev),
153 int (*lower_pci_irq)(struct vm_device * dev, struct pci_device * pci_dev),
154 struct vm_device * bridge_dev);
157 int v3_pci_raise_irq(struct vm_device * pci_bus, int bus_num, struct pci_device * dev);
158 int v3_pci_lower_irq(struct vm_device * pci_bus, int bus_num, struct pci_device * dev);
161 v3_pci_register_device(struct vm_device * pci,
162 pci_device_type_t dev_type,
167 struct v3_pci_bar * bars,
168 int (*config_update)(uint_t reg_num, void * src, uint_t length, void * private_data),
169 int (*cmd_update)(struct pci_device *pci_dev, uchar_t io_enabled, uchar_t mem_enabled),
170 int (*exp_rom_update)(struct pci_device * pci_dev, uint32_t * src, void * private_data),
175 v3_pci_register_passthrough_device(struct vm_device * pci,
180 int (*config_write)(uint_t reg_num, void * src, uint_t length, void * private_data),
181 int (*config_read)(uint_t reg_num, void * dst, uint_t length, void * private_data),
182 void * private_data);