1 // Utility functions for AMD
13 #define AMD_NUM_PMU_COUNTERS 4
14 #define AMD_NUM_PMU_CONTROLS 4
18 * MSR OFFSETS FOR PMU RELATED:
22 * MSR_K7_EVNTSEL0-3 is in msr-index.h
24 * MSR_K7_PERFCTR0-3 is also in msr-index.h
28 * bit info according to AMD manual
29 performance monitoring counters: core performance event-select registers
32 #define AMD_USR_BIT 16
34 #define AMD_EDGE_BIT 18
35 #define AMD_INT_BIT 20
37 #define AMD_INV_BIT 23
38 #define AMD_CMASK_BIT 24
39 #define AMD_UMASK_BIT 8
40 #define AMD_EVENT_BIT 0
46 #define AMD_CTR_READ(msrs, c) do {rdmsrl((MSR_K7_PERFCTR0 + (c)), (msrs).q);} while (0)
47 #define AMD_CTR_WRITE(msrs, c) do {wrmsrl((MSR_K7_PERFCTR0 + (c)), (msrs).q);} while (0)
49 #define AMD_CTRL_READ(msrs, c) do {rdmsrl((MSR_K7_EVNTSEL0 + (c)), (msrs).q);} while (0)
50 #define AMD_CTRL_WRITE(msrs, c) \
52 (msrs).q |= 0x1<<21; \
53 wrmsrl((MSR_K7_EVNTSEL0 + (c)), (msrs).q); \
56 // given even and mask, make it to track it on all ring levels
57 #define AMD_CTRL_START(event, mask, i) \
60 tmp |= (mask)<<AMD_UMASK_BIT; \
61 tmp |= (event)<<AMD_EVENT_BIT; \
62 tmp |= 0x3<<AMD_USR_BIT; \
63 tmp |= 0x1<<AMD_EN_BIT; \
64 wrmsrl((MSR_K7_EVNTSEL0 + (i)), tmp); \
65 wrmsrl((MSR_K7_PERFCTR0 + (i)), 0x0); \
68 #define AMD_CTRL_STOP(i) do { wrmsrl((MSR_K7_EVNTSEL0 + (i)), 0x0); } while(0) \
71 * SELECTED PMU EVENTS AND UMASKS
72 * BIOS and Kernel Developer's Guid (BKDG) For AMD Family 11h Processors, July 2008
73 * 3.14 Performance Counter Events
77 // CLK and INSTRUCTIONS events
78 #define AMD_CLK_NOT_HALTED 0x76 // event
79 #define AMD_RETIRED_INSTRUCTIONS 0xc0 // event
82 #define AMD_PREFETCH_INST_DISPATCHED 0x4B// event
83 #define AMD_LOAD 0x1 // umask
84 #define AMD_STORE 0x2 // umask
86 // MEM LOAD events and umasks
87 #define AMD_DATA_CACHE_ACCESSES 0x40 // event
88 #define AMD_DATA_CACHE_MISSES 0x41 // event
89 #define AMD_L1_DTLB_AND_L2_DTLB_MISS 0x46 // event
91 // LLC MISSES events: per intel doc, it is advised to use this for perf measures
92 //#define INTEL_LLC_MISSES 0x2E
93 //#define INTEL_LLC_MISSES_UMASK 0x41