4 #include <lwk/kernel.h>
5 #include <arch/cache.h>
8 #define L1_CACHE_ALIGN(x) ALIGN(x, L1_CACHE_BYTES)
11 #ifndef SMP_CACHE_BYTES
12 #define SMP_CACHE_BYTES L1_CACHE_BYTES
19 #ifndef ____cacheline_aligned
20 #define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
23 #ifndef ____cacheline_aligned_in_smp
24 #define ____cacheline_aligned_in_smp ____cacheline_aligned
27 #ifndef __cacheline_aligned
28 #define __cacheline_aligned \
29 __attribute__((__aligned__(SMP_CACHE_BYTES), \
30 __section__(".data.cacheline_aligned")))
33 #ifndef __cacheline_aligned_in_smp
34 #define __cacheline_aligned_in_smp __cacheline_aligned
38 * The maximum alignment needed for some critical structures
39 * These could be inter-node cacheline sizes/L3 cacheline
40 * size etc. Define this in asm/cache.h for your arch
42 #ifndef INTERNODE_CACHE_SHIFT
43 #define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT
46 #if !defined(____cacheline_internodealigned_in_smp)
47 #define ____cacheline_internodealigned_in_smp \
48 __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))
51 #endif /* _LWK_CACHE_H */